From f2efd68a2e53d2bd9da89ea176f5bf5d3583bff2 Mon Sep 17 00:00:00 2001 From: Anton Vorontsov Date: Fri, 5 Oct 2007 21:46:47 +0400 Subject: [PATCH] --- yaml --- r: 67520 b: refs/heads/master c: 803dedb60849a8e4ec38e66ca41f51188c18a87d h: refs/heads/master v: v3 --- [refs] | 2 +- .../arch/powerpc/platforms/85xx/mpc85xx_mds.c | 28 +++++++++++-------- 2 files changed, 17 insertions(+), 13 deletions(-) diff --git a/[refs] b/[refs] index 46e7178de8ba..a1a057dc700d 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: af6521ea8af210fea094b183a9ad29ab73945ee1 +refs/heads/master: 803dedb60849a8e4ec38e66ca41f51188c18a87d diff --git a/trunk/arch/powerpc/platforms/85xx/mpc85xx_mds.c b/trunk/arch/powerpc/platforms/85xx/mpc85xx_mds.c index 57e840a1c027..6913e99c1279 100644 --- a/trunk/arch/powerpc/platforms/85xx/mpc85xx_mds.c +++ b/trunk/arch/powerpc/platforms/85xx/mpc85xx_mds.c @@ -113,18 +113,22 @@ static void __init mpc85xx_mds_setup_arch(void) } if (bcsr_regs) { - u8 bcsr_phy; - - /* Reset the Ethernet PHY */ - bcsr_phy = in_be8(&bcsr_regs[9]); - bcsr_phy &= ~0x20; - out_be8(&bcsr_regs[9], bcsr_phy); - - udelay(1000); - - bcsr_phy = in_be8(&bcsr_regs[9]); - bcsr_phy |= 0x20; - out_be8(&bcsr_regs[9], bcsr_phy); +#define BCSR_UCC1_GETH_EN (0x1 << 7) +#define BCSR_UCC2_GETH_EN (0x1 << 7) +#define BCSR_UCC1_MODE_MSK (0x3 << 4) +#define BCSR_UCC2_MODE_MSK (0x3 << 0) + + /* Turn off UCC1 & UCC2 */ + clrbits8(&bcsr_regs[8], BCSR_UCC1_GETH_EN); + clrbits8(&bcsr_regs[9], BCSR_UCC2_GETH_EN); + + /* Mode is RGMII, all bits clear */ + clrbits8(&bcsr_regs[11], BCSR_UCC1_MODE_MSK | + BCSR_UCC2_MODE_MSK); + + /* Turn UCC1 & UCC2 on */ + setbits8(&bcsr_regs[8], BCSR_UCC1_GETH_EN); + setbits8(&bcsr_regs[9], BCSR_UCC2_GETH_EN); iounmap(bcsr_regs); }