From f30038c34890926cded4af8c7b9f4598d9a00113 Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Tue, 11 Oct 2011 16:16:13 -0600 Subject: [PATCH] --- yaml --- r: 272867 b: refs/heads/master c: f62f548c1c04742f68c15e21f173712dd6633791 h: refs/heads/master i: 272865: cbadd15982b3c961df8df97cea9d56d10e6a4dbd 272863: 3daf4544d49b34c7da2ca79cdce11f6604b9e140 v: v3 --- [refs] | 2 +- .../devicetree/bindings/pinmux/pinmux_nvidia.txt | 5 +++++ trunk/arch/arm/boot/dts/tegra20.dtsi | 8 ++++++++ 3 files changed, 14 insertions(+), 1 deletion(-) create mode 100644 trunk/Documentation/devicetree/bindings/pinmux/pinmux_nvidia.txt diff --git a/[refs] b/[refs] index 364f403eb7a4..6888e5e4a710 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 940dd96fe9dec5b6ba4bb7ebc33212ff66db243c +refs/heads/master: f62f548c1c04742f68c15e21f173712dd6633791 diff --git a/trunk/Documentation/devicetree/bindings/pinmux/pinmux_nvidia.txt b/trunk/Documentation/devicetree/bindings/pinmux/pinmux_nvidia.txt new file mode 100644 index 000000000000..36f82dbdd14d --- /dev/null +++ b/trunk/Documentation/devicetree/bindings/pinmux/pinmux_nvidia.txt @@ -0,0 +1,5 @@ +NVIDIA Tegra 2 pinmux controller + +Required properties: +- compatible : "nvidia,tegra20-pinmux" + diff --git a/trunk/arch/arm/boot/dts/tegra20.dtsi b/trunk/arch/arm/boot/dts/tegra20.dtsi index 5727595cde61..65d7e6a333eb 100644 --- a/trunk/arch/arm/boot/dts/tegra20.dtsi +++ b/trunk/arch/arm/boot/dts/tegra20.dtsi @@ -77,6 +77,14 @@ gpio-controller; }; + pinmux: pinmux@70000000 { + compatible = "nvidia,tegra20-pinmux"; + reg = < 0x70000014 0x10 /* Tri-state registers */ + 0x70000080 0x20 /* Mux registers */ + 0x700000a0 0x14 /* Pull-up/down registers */ + 0x70000868 0xa8 >; /* Pad control registers */ + }; + serial@70006000 { compatible = "nvidia,tegra20-uart"; reg = <0x70006000 0x40>;