From f3843bba5359f9a707786968b38d640a407b2d42 Mon Sep 17 00:00:00 2001
From: Matt Carlson <mcarlson@broadcom.com>
Date: Wed, 17 Feb 2010 15:16:56 +0000
Subject: [PATCH] --- yaml --- r: 184313 b: refs/heads/master c:
 a4153d401ac440c73e0721db0b6b031e8e6f77d1 h: refs/heads/master i:   184311:
 7dd20b4939376303d081a782270b5947e7086f2a v: v3

---
 [refs]                  | 2 +-
 trunk/drivers/net/tg3.c | 6 ++++++
 trunk/drivers/net/tg3.h | 4 ++++
 3 files changed, 11 insertions(+), 1 deletion(-)

diff --git a/[refs] b/[refs]
index b0980a79b0f7..b36c7c405ab3 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: d110114281fad580dd9ce629507d17b123169cff
+refs/heads/master: a4153d401ac440c73e0721db0b6b031e8e6f77d1
diff --git a/trunk/drivers/net/tg3.c b/trunk/drivers/net/tg3.c
index 051b18ad3f0c..f08e4b846458 100644
--- a/trunk/drivers/net/tg3.c
+++ b/trunk/drivers/net/tg3.c
@@ -12753,6 +12753,12 @@ static void __devinit tg3_read_sb_ver(struct tg3 *tp, u32 val)
 	case TG3_EEPROM_SB_REVISION_3:
 		offset = TG3_EEPROM_SB_F1R3_EDH_OFF;
 		break;
+	case TG3_EEPROM_SB_REVISION_4:
+		offset = TG3_EEPROM_SB_F1R4_EDH_OFF;
+		break;
+	case TG3_EEPROM_SB_REVISION_5:
+		offset = TG3_EEPROM_SB_F1R5_EDH_OFF;
+		break;
 	default:
 		return;
 	}
diff --git a/trunk/drivers/net/tg3.h b/trunk/drivers/net/tg3.h
index b4fd59623cfb..ffc12b1cb388 100644
--- a/trunk/drivers/net/tg3.h
+++ b/trunk/drivers/net/tg3.h
@@ -1864,6 +1864,8 @@
 #define TG3_EEPROM_SB_REVISION_0	0x00000000
 #define TG3_EEPROM_SB_REVISION_2	0x00020000
 #define TG3_EEPROM_SB_REVISION_3	0x00030000
+#define TG3_EEPROM_SB_REVISION_4	0x00040000
+#define TG3_EEPROM_SB_REVISION_5	0x00050000
 #define TG3_EEPROM_MAGIC_HW		0xabcd
 #define TG3_EEPROM_MAGIC_HW_MSK		0xffff
 
@@ -1881,6 +1883,8 @@
 #define TG3_EEPROM_SB_F1R2_EDH_OFF	0x14
 #define TG3_EEPROM_SB_F1R2_MBA_OFF	0x10
 #define TG3_EEPROM_SB_F1R3_EDH_OFF	0x18
+#define TG3_EEPROM_SB_F1R4_EDH_OFF	0x1c
+#define TG3_EEPROM_SB_F1R5_EDH_OFF	0x20
 #define TG3_EEPROM_SB_EDH_MAJ_MASK	0x00000700
 #define TG3_EEPROM_SB_EDH_MAJ_SHFT	8
 #define TG3_EEPROM_SB_EDH_MIN_MASK	0x000000ff