From f38572fd2ea4181a48aba8c02886e371ea3762d2 Mon Sep 17 00:00:00 2001
From: Richard Kennedy <richard@rsk.demon.co.uk>
Date: Fri, 4 Jul 2008 13:56:16 +0100
Subject: [PATCH] --- yaml --- r: 99410 b: refs/heads/master c:
 84e65b0a84a2c856bef36f13d122047678408b0a h: refs/heads/master v: v3

---
 [refs]                            | 2 +-
 trunk/include/asm-x86/processor.h | 6 +-----
 2 files changed, 2 insertions(+), 6 deletions(-)

diff --git a/[refs] b/[refs]
index dc480efb8d42..993a3838c1e3 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 95c60b08c6af6db2165837139da10f593462d51c
+refs/heads/master: 84e65b0a84a2c856bef36f13d122047678408b0a
diff --git a/trunk/include/asm-x86/processor.h b/trunk/include/asm-x86/processor.h
index 559105220a47..4ab2ede6f4b9 100644
--- a/trunk/include/asm-x86/processor.h
+++ b/trunk/include/asm-x86/processor.h
@@ -262,16 +262,12 @@ struct tss_struct {
 	unsigned long		io_bitmap_max;
 	struct thread_struct	*io_bitmap_owner;
 
-	/*
-	 * Pad the TSS to be cacheline-aligned (size is 0x100):
-	 */
-	unsigned long		__cacheline_filler[35];
 	/*
 	 * .. and then another 0x100 bytes for the emergency kernel stack:
 	 */
 	unsigned long		stack[64];
 
-} __attribute__((packed));
+} ____cacheline_aligned;
 
 DECLARE_PER_CPU(struct tss_struct, init_tss);