From f3bce0ba5e8a1eba82ca3a5115e9b28cefa79eb3 Mon Sep 17 00:00:00 2001 From: Lars-Peter Clausen Date: Sat, 19 Jun 2010 04:08:11 +0000 Subject: [PATCH] --- yaml --- r: 204567 b: refs/heads/master c: c863a2368ced0e6df07121d13933ee0f5a5ee681 h: refs/heads/master i: 204565: b83b5775d9ec0f469ff8695c3b4a26a2a245844b 204563: 8c419110dc09364e6d7227f1bd6b131c8dd9dc34 204559: a1394561eb841a52c84bfecb7e9c83ded0d8a1cf v: v3 --- [refs] | 2 +- trunk/arch/mips/jz4740/pm.c | 56 ++++++++++++++++++++++++ trunk/arch/mips/jz4740/reset.c | 79 ++++++++++++++++++++++++++++++++++ trunk/arch/mips/jz4740/reset.h | 6 +++ 4 files changed, 142 insertions(+), 1 deletion(-) create mode 100644 trunk/arch/mips/jz4740/pm.c create mode 100644 trunk/arch/mips/jz4740/reset.c create mode 100644 trunk/arch/mips/jz4740/reset.h diff --git a/[refs] b/[refs] index 8d70b6437656..b44eb32c4e20 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: b200eff6d16cf53dfaf14eb6f1934890d2db2237 +refs/heads/master: c863a2368ced0e6df07121d13933ee0f5a5ee681 diff --git a/trunk/arch/mips/jz4740/pm.c b/trunk/arch/mips/jz4740/pm.c new file mode 100644 index 000000000000..a9994585424d --- /dev/null +++ b/trunk/arch/mips/jz4740/pm.c @@ -0,0 +1,56 @@ +/* + * Copyright (C) 2010, Lars-Peter Clausen + * JZ4740 SoC power management support + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 675 Mass Ave, Cambridge, MA 02139, USA. + * + */ + +#include +#include +#include +#include + +#include + +#include "clock.h" +#include "irq.h" + +static int jz4740_pm_enter(suspend_state_t state) +{ + jz4740_intc_suspend(); + jz4740_clock_suspend(); + + jz4740_clock_set_wait_mode(JZ4740_WAIT_MODE_SLEEP); + + __asm__(".set\tmips3\n\t" + "wait\n\t" + ".set\tmips0"); + + jz4740_clock_set_wait_mode(JZ4740_WAIT_MODE_IDLE); + + jz4740_clock_resume(); + jz4740_intc_resume(); + + return 0; +} + +static struct platform_suspend_ops jz4740_pm_ops = { + .valid = suspend_valid_only_mem, + .enter = jz4740_pm_enter, +}; + +static int __init jz4740_pm_init(void) +{ + suspend_set_ops(&jz4740_pm_ops); + return 0; + +} +late_initcall(jz4740_pm_init); diff --git a/trunk/arch/mips/jz4740/reset.c b/trunk/arch/mips/jz4740/reset.c new file mode 100644 index 000000000000..5f1fb95c0d0d --- /dev/null +++ b/trunk/arch/mips/jz4740/reset.c @@ -0,0 +1,79 @@ +/* + * Copyright (C) 2010, Lars-Peter Clausen + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 675 Mass Ave, Cambridge, MA 02139, USA. + * + */ + +#include +#include +#include + +#include + +#include +#include + +static void jz4740_halt(void) +{ + while (1) { + __asm__(".set push;\n" + ".set mips3;\n" + "wait;\n" + ".set pop;\n" + ); + } +} + +#define JZ_REG_WDT_DATA 0x00 +#define JZ_REG_WDT_COUNTER_ENABLE 0x04 +#define JZ_REG_WDT_COUNTER 0x08 +#define JZ_REG_WDT_CTRL 0x0c + +static void jz4740_restart(char *command) +{ + void __iomem *wdt_base = ioremap(JZ4740_WDT_BASE_ADDR, 0x0f); + + jz4740_timer_enable_watchdog(); + + writeb(0, wdt_base + JZ_REG_WDT_COUNTER_ENABLE); + + writew(0, wdt_base + JZ_REG_WDT_COUNTER); + writew(0, wdt_base + JZ_REG_WDT_DATA); + writew(BIT(2), wdt_base + JZ_REG_WDT_CTRL); + + writeb(1, wdt_base + JZ_REG_WDT_COUNTER_ENABLE); + jz4740_halt(); +} + +#define JZ_REG_RTC_CTRL 0x00 +#define JZ_REG_RTC_HIBERNATE 0x20 + +#define JZ_RTC_CTRL_WRDY BIT(7) + +static void jz4740_power_off(void) +{ + void __iomem *rtc_base = ioremap(JZ4740_RTC_BASE_ADDR, 0x24); + uint32_t ctrl; + + do { + ctrl = readl(rtc_base + JZ_REG_RTC_CTRL); + } while (!(ctrl & JZ_RTC_CTRL_WRDY)); + + writel(1, rtc_base + JZ_REG_RTC_HIBERNATE); + jz4740_halt(); +} + +void jz4740_reset_init(void) +{ + _machine_restart = jz4740_restart; + _machine_halt = jz4740_halt; + pm_power_off = jz4740_power_off; +} diff --git a/trunk/arch/mips/jz4740/reset.h b/trunk/arch/mips/jz4740/reset.h new file mode 100644 index 000000000000..5202ab4ad9db --- /dev/null +++ b/trunk/arch/mips/jz4740/reset.h @@ -0,0 +1,6 @@ +#ifndef __MIPS_JZ4740_RESET_H__ +#define __MIPS_JZ4740_RESET_H__ + +extern void jz4740_reset_init(void); + +#endif