From f46650ead21d8fcd2b082a5b08e330beee18e96d Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Tue, 18 Sep 2012 15:40:02 +1000 Subject: [PATCH] --- yaml --- r: 331441 b: refs/heads/master c: cbf13821d36848819ad5d75d97a7626415bfbf95 h: refs/heads/master i: 331439: 6a6466296401400d66718320682b3ecabd82892d v: v3 --- [refs] | 2 +- trunk/arch/m68k/include/asm/m5307sim.h | 12 ++++++------ 2 files changed, 7 insertions(+), 7 deletions(-) diff --git a/[refs] b/[refs] index aeb57358e236..a6b809ba334a 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 39dc5b7fcebe3cca65b775f743416107ec321e0b +refs/heads/master: cbf13821d36848819ad5d75d97a7626415bfbf95 diff --git a/trunk/arch/m68k/include/asm/m5307sim.h b/trunk/arch/m68k/include/asm/m5307sim.h index a8e7519c4985..5d0bb7ec31f8 100644 --- a/trunk/arch/m68k/include/asm/m5307sim.h +++ b/trunk/arch/m68k/include/asm/m5307sim.h @@ -127,9 +127,9 @@ /* * Generic GPIO support */ -#define MCFGPIO_PIN_MAX 16 -#define MCFGPIO_IRQ_MAX -1 -#define MCFGPIO_IRQ_VECBASE -1 +#define MCFGPIO_PIN_MAX 16 +#define MCFGPIO_IRQ_MAX -1 +#define MCFGPIO_IRQ_VECBASE -1 /* Definition offset address for CS2-7 -- old mask 5307 */ @@ -167,9 +167,9 @@ /* * Defines for the IRQPAR Register */ -#define IRQ5_LEVEL4 0x80 -#define IRQ3_LEVEL6 0x40 -#define IRQ1_LEVEL2 0x20 +#define IRQ5_LEVEL4 0x80 +#define IRQ3_LEVEL6 0x40 +#define IRQ1_LEVEL2 0x20 /* * Define system peripheral IRQ usage.