From f52d3fcbb0b238779080cad91950f5ec365b792a Mon Sep 17 00:00:00 2001 From: David Woodhouse Date: Thu, 13 May 2010 16:12:43 +0100 Subject: [PATCH] --- yaml --- r: 195941 b: refs/heads/master c: aadff49c56f921d18cc280cbf087a550c67bbd02 h: refs/heads/master i: 195939: b037ece6b1f7a38009e15aa69cc6fa8d7c557ab1 v: v3 --- [refs] | 2 +- trunk/drivers/mtd/nand/denali.c | 22 +++++++++++----------- 2 files changed, 12 insertions(+), 12 deletions(-) diff --git a/[refs] b/[refs] index e8cd7920740b..ccf01d9dae31 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: ce082596ae4308f67f0953a67db508bb085520fa +refs/heads/master: aadff49c56f921d18cc280cbf087a550c67bbd02 diff --git a/trunk/drivers/mtd/nand/denali.c b/trunk/drivers/mtd/nand/denali.c index 8a6ce0dd9537..ca03428b59cc 100644 --- a/trunk/drivers/mtd/nand/denali.c +++ b/trunk/drivers/mtd/nand/denali.c @@ -1424,7 +1424,7 @@ static bool handle_ecc(struct denali_nand_info *denali, uint8_t *buf, } /* programs the controller to either enable/disable DMA transfers */ -static void enable_dma(struct denali_nand_info *denali, bool en) +static void denali_enable_dma(struct denali_nand_info *denali, bool en) { uint32_t reg_val = 0x0; @@ -1435,7 +1435,7 @@ static void enable_dma(struct denali_nand_info *denali, bool en) } /* setups the HW to perform the data DMA */ -static void setup_dma(struct denali_nand_info *denali, int op) +static void denali_setup_dma(struct denali_nand_info *denali, int op) { uint32_t mode = 0x0; const int page_count = 1; @@ -1494,9 +1494,9 @@ static void write_page(struct mtd_info *mtd, struct nand_chip *chip, pci_dma_sync_single_for_device(pci_dev, addr, size, PCI_DMA_TODEVICE); clear_interrupts(denali); - enable_dma(denali, true); + denali_enable_dma(denali, true); - setup_dma(denali, DENALI_WRITE); + denali_setup_dma(denali, DENALI_WRITE); /* wait for operation to complete */ irq_status = wait_for_irq(denali, irq_mask); @@ -1509,7 +1509,7 @@ static void write_page(struct mtd_info *mtd, struct nand_chip *chip, PASS; } - enable_dma(denali, false); + denali_enable_dma(denali, false); pci_dma_sync_single_for_cpu(pci_dev, addr, size, PCI_DMA_TODEVICE); } @@ -1569,11 +1569,11 @@ static int denali_read_page(struct mtd_info *mtd, struct nand_chip *chip, setup_ecc_for_xfer(denali, true, false); - enable_dma(denali, true); + denali_enable_dma(denali, true); pci_dma_sync_single_for_device(pci_dev, addr, size, PCI_DMA_FROMDEVICE); clear_interrupts(denali); - setup_dma(denali, DENALI_READ); + denali_setup_dma(denali, DENALI_READ); /* wait for operation to complete */ irq_status = wait_for_irq(denali, irq_mask); @@ -1583,7 +1583,7 @@ static int denali_read_page(struct mtd_info *mtd, struct nand_chip *chip, memcpy(buf, denali->buf.buf, mtd->writesize); check_erased_page = handle_ecc(denali, buf, chip->oob_poi, irq_status); - enable_dma(denali, false); + denali_enable_dma(denali, false); if (check_erased_page) { @@ -1618,19 +1618,19 @@ static int denali_read_page_raw(struct mtd_info *mtd, struct nand_chip *chip, uint32_t irq_mask = INTR_STATUS0__DMA_CMD_COMP; setup_ecc_for_xfer(denali, false, true); - enable_dma(denali, true); + denali_enable_dma(denali, true); pci_dma_sync_single_for_device(pci_dev, addr, size, PCI_DMA_FROMDEVICE); clear_interrupts(denali); - setup_dma(denali, DENALI_READ); + denali_setup_dma(denali, DENALI_READ); /* wait for operation to complete */ irq_status = wait_for_irq(denali, irq_mask); pci_dma_sync_single_for_cpu(pci_dev, addr, size, PCI_DMA_FROMDEVICE); - enable_dma(denali, false); + denali_enable_dma(denali, false); memcpy(buf, denali->buf.buf, mtd->writesize); memcpy(chip->oob_poi, denali->buf.buf + mtd->writesize, mtd->oobsize);