From f57173ee6e6e883b5705199de0144d4c0b5f95c4 Mon Sep 17 00:00:00 2001
From: Daniel Vetter <daniel.vetter@ffwll.ch>
Date: Sun, 20 May 2012 20:00:25 +0200
Subject: [PATCH] --- yaml --- r: 307463 b: refs/heads/master c:
 98b6bd998ae057611d2bc040ace1fc847f575b84 h: refs/heads/master i:   307461:
 8b0e70a7733ee89b191816e7d2603f72c1df8142   307459:
 5e6c4375cf74ef864f64a14895cf5ab119ca75ce   307455:
 a04b7ef5d79a7caee997218753b197a217654c50 v: v3

---
 [refs]                                     |  2 +-
 trunk/drivers/gpu/drm/i915/intel_display.c | 11 +++++++++++
 2 files changed, 12 insertions(+), 1 deletion(-)

diff --git a/[refs] b/[refs]
index 997e34fb0418..44c05516a9d9 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 2da8af54059bd8c0d7bdf1f56b39cbec7f9c6f05
+refs/heads/master: 98b6bd998ae057611d2bc040ace1fc847f575b84
diff --git a/trunk/drivers/gpu/drm/i915/intel_display.c b/trunk/drivers/gpu/drm/i915/intel_display.c
index f3d39f4f6909..3c71850ddf20 100644
--- a/trunk/drivers/gpu/drm/i915/intel_display.c
+++ b/trunk/drivers/gpu/drm/i915/intel_display.c
@@ -2911,6 +2911,17 @@ static struct intel_pch_pll *intel_get_pch_pll(struct intel_crtc *intel_crtc, u3
 		goto prepare;
 	}
 
+	if (HAS_PCH_IBX(dev_priv->dev)) {
+		/* Ironlake PCH has a fixed PLL->PCH pipe mapping. */
+		i = intel_crtc->pipe;
+		pll = &dev_priv->pch_plls[i];
+
+		DRM_DEBUG_KMS("CRTC:%d using pre-allocated PCH PLL %x\n",
+			      intel_crtc->base.base.id, pll->pll_reg);
+
+		goto found;
+	}
+
 	for (i = 0; i < dev_priv->num_pch_pll; i++) {
 		pll = &dev_priv->pch_plls[i];