From f58881875352f08069de2cf8084f049aa20a6f80 Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Mon, 15 Sep 2008 13:13:34 -0700 Subject: [PATCH] --- yaml --- r: 115715 b: refs/heads/master c: 28af0a2767412937e8424364a8ece9b230bdbc83 h: refs/heads/master i: 115713: e02d60eabe5b314fb563216749748f94c9ab1c67 115711: e281c12e6d78a68ba5311872c14802097f9980a2 v: v3 --- [refs] | 2 +- trunk/drivers/gpu/drm/i915/i915_gem_tiling.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/[refs] b/[refs] index 9aca4ae4249d..1c5c9d846989 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 4f481ed22ec0d412336a13dc4477f6d0f3688882 +refs/heads/master: 28af0a2767412937e8424364a8ece9b230bdbc83 diff --git a/trunk/drivers/gpu/drm/i915/i915_gem_tiling.c b/trunk/drivers/gpu/drm/i915/i915_gem_tiling.c index 0c1b3a0834e1..6b3f1e4a34a1 100644 --- a/trunk/drivers/gpu/drm/i915/i915_gem_tiling.c +++ b/trunk/drivers/gpu/drm/i915/i915_gem_tiling.c @@ -96,7 +96,7 @@ i915_gem_detect_bit_6_swizzle(struct drm_device *dev) */ swizzle_x = I915_BIT_6_SWIZZLE_NONE; swizzle_y = I915_BIT_6_SWIZZLE_NONE; - } else if (!IS_I965G(dev) || IS_I965GM(dev)) { + } else if ((!IS_I965G(dev) && !IS_G33(dev)) || IS_I965GM(dev)) { uint32_t dcc; /* On 915-945 and GM965, channel interleave by the CPU is