From f65480482ca29161e18fd092efd0a6abe3a0506c Mon Sep 17 00:00:00 2001 From: Matt Reimer Date: Wed, 24 Jan 2007 01:30:37 +0100 Subject: [PATCH] --- yaml --- r: 45928 b: refs/heads/master c: 7baced8a5923ce13d3d42d50a042a869092ab4e5 h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/include/asm-arm/arch-s3c2410/regs-mem.h | 14 +++++++------- 2 files changed, 8 insertions(+), 8 deletions(-) diff --git a/[refs] b/[refs] index ad6186aece10..7bab33bd2bf6 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: d4e1c889c1ec547371227558e1da5f2f50c7dd5e +refs/heads/master: 7baced8a5923ce13d3d42d50a042a869092ab4e5 diff --git a/trunk/include/asm-arm/arch-s3c2410/regs-mem.h b/trunk/include/asm-arm/arch-s3c2410/regs-mem.h index 375dca50364e..e4d82341f7ba 100644 --- a/trunk/include/asm-arm/arch-s3c2410/regs-mem.h +++ b/trunk/include/asm-arm/arch-s3c2410/regs-mem.h @@ -133,10 +133,10 @@ #define S3C2410_BANKCON_SDRAM (0x3 << 15) /* next bits only for EDO DRAM in 6,7 */ -#define S3C2400_BANKCON_EDO_Trdc1 (0x00 << 4) -#define S3C2400_BANKCON_EDO_Trdc2 (0x01 << 4) -#define S3C2400_BANKCON_EDO_Trdc3 (0x02 << 4) -#define S3C2400_BANKCON_EDO_Trdc4 (0x03 << 4) +#define S3C2400_BANKCON_EDO_Trcd1 (0x00 << 4) +#define S3C2400_BANKCON_EDO_Trcd2 (0x01 << 4) +#define S3C2400_BANKCON_EDO_Trcd3 (0x02 << 4) +#define S3C2400_BANKCON_EDO_Trcd4 (0x03 << 4) /* CAS pulse width */ #define S3C2400_BANKCON_EDO_PULSE1 (0x00 << 3) @@ -153,9 +153,9 @@ #define S3C2400_BANKCON_EDO_SCANb11 (0x03 << 0) /* next bits only for SDRAM in 6,7 */ -#define S3C2410_BANKCON_Trdc2 (0x00 << 2) -#define S3C2410_BANKCON_Trdc3 (0x01 << 2) -#define S3C2410_BANKCON_Trdc4 (0x02 << 2) +#define S3C2410_BANKCON_Trcd2 (0x00 << 2) +#define S3C2410_BANKCON_Trcd3 (0x01 << 2) +#define S3C2410_BANKCON_Trcd4 (0x02 << 2) /* control column address select */ #define S3C2410_BANKCON_SCANb8 (0x00 << 0)