From f7136fb2cee85d4f9a3832624e4fd4f56bc3f211 Mon Sep 17 00:00:00 2001 From: Thomas Petazzoni Date: Tue, 20 Nov 2012 16:03:12 +0100 Subject: [PATCH] --- yaml --- r: 344291 b: refs/heads/master c: 0122eee890e28e466d682cdc4e1d125cc0ad9fdf h: refs/heads/master i: 344289: 3eb89acba045a01197b15e77a822eea33b7cbeae 344287: e641b662ba82197b2254a7049f675c341d68c6e6 v: v3 --- [refs] | 2 +- trunk/arch/arm/boot/dts/armada-370.dtsi | 36 +++++++++++++++++++++++++ 2 files changed, 37 insertions(+), 1 deletion(-) diff --git a/[refs] b/[refs] index 7719154cffe0..a6e40058f61f 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 49f175b9fed5dbfc370057ae0a2a57d1be750c0a +refs/heads/master: 0122eee890e28e466d682cdc4e1d125cc0ad9fdf diff --git a/trunk/arch/arm/boot/dts/armada-370.dtsi b/trunk/arch/arm/boot/dts/armada-370.dtsi index 175df2887076..7fbac28b01f3 100644 --- a/trunk/arch/arm/boot/dts/armada-370.dtsi +++ b/trunk/arch/arm/boot/dts/armada-370.dtsi @@ -89,6 +89,42 @@ #clock-cells = <1>; }; + xor@d0060800 { + compatible = "marvell,orion-xor"; + reg = <0xd0060800 0x100 + 0xd0060A00 0x100>; + status = "okay"; + xor00 { + interrupts = <51>; + dmacap,memcpy; + dmacap,xor; + }; + xor01 { + interrupts = <52>; + dmacap,memcpy; + dmacap,xor; + dmacap,memset; + }; + }; + + xor@d0060900 { + compatible = "marvell,orion-xor"; + reg = <0xd0060900 0x100 + 0xd0060b00 0x100>; + status = "okay"; + + xor10 { + interrupts = <94>; + dmacap,memcpy; + dmacap,xor; + }; + xor11 { + interrupts = <95>; + dmacap,memcpy; + dmacap,xor; + dmacap,memset; + }; + }; }; };