diff --git a/[refs] b/[refs] index 7e9484b65a85..6ed3694be221 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 70a062286b9dfcbd24d2e11601aecfead5cf709a +refs/heads/master: e45ff01d3f79bc71e6f514302a776cc8815eaecc diff --git a/trunk/.mailmap b/trunk/.mailmap index 1eba28acab64..581fd39193a2 100644 --- a/trunk/.mailmap +++ b/trunk/.mailmap @@ -23,7 +23,6 @@ Andy Adamson Arnaud Patard Arnd Bergmann Axel Dyks -Axel Lin Ben Gardner Ben M Cahill Björn Steinbrink diff --git a/trunk/Documentation/feature-removal-schedule.txt b/trunk/Documentation/feature-removal-schedule.txt index b3f35e5f9c95..b959659c5df4 100644 --- a/trunk/Documentation/feature-removal-schedule.txt +++ b/trunk/Documentation/feature-removal-schedule.txt @@ -603,19 +603,3 @@ Why: The adm9240, w83792d and w83793 hardware monitoring drivers have Who: Jean Delvare ---------------------------- - -What: noswapaccount kernel command line parameter -When: 2.6.40 -Why: The original implementation of memsw feature enabled by - CONFIG_CGROUP_MEM_RES_CTLR_SWAP could be disabled by the noswapaccount - kernel parameter (introduced in 2.6.29-rc1). Later on, this decision - turned out to be not ideal because we cannot have the feature compiled - in and disabled by default and let only interested to enable it - (e.g. general distribution kernels might need it). Therefore we have - added swapaccount[=0|1] parameter (introduced in 2.6.37) which provides - the both possibilities. If we remove noswapaccount we will have - less command line parameters with the same functionality and we - can also cleanup the parameter handling a bit (). -Who: Michal Hocko - ----------------------------- diff --git a/trunk/Documentation/filesystems/ntfs.txt b/trunk/Documentation/filesystems/ntfs.txt index 933bc66ccff1..6ef8cf3bc9a3 100644 --- a/trunk/Documentation/filesystems/ntfs.txt +++ b/trunk/Documentation/filesystems/ntfs.txt @@ -460,8 +460,6 @@ Note, a technical ChangeLog aimed at kernel hackers is in fs/ntfs/ChangeLog. 2.1.30: - Fix writev() (it kept writing the first segment over and over again instead of moving onto subsequent segments). - - Fix crash in ntfs_mft_record_alloc() when mapping the new extent mft - record failed. 2.1.29: - Fix a deadlock when mounting read-write. 2.1.28: diff --git a/trunk/Documentation/kernel-parameters.txt b/trunk/Documentation/kernel-parameters.txt index 89835a4766a6..b72e071a3e5b 100644 --- a/trunk/Documentation/kernel-parameters.txt +++ b/trunk/Documentation/kernel-parameters.txt @@ -43,11 +43,11 @@ parameter is applicable: AVR32 AVR32 architecture is enabled. AX25 Appropriate AX.25 support is enabled. BLACKFIN Blackfin architecture is enabled. - DRM Direct Rendering Management support is enabled. - DYNAMIC_DEBUG Build in debug messages and enable them at runtime EDD BIOS Enhanced Disk Drive Services (EDD) is enabled EFI EFI Partitioning (GPT) is enabled EIDE EIDE/ATAPI support is enabled. + DRM Direct Rendering Management support is enabled. + DYNAMIC_DEBUG Build in debug messages and enable them at runtime FB The frame buffer device is enabled. GCOV GCOV profiling is enabled. HW Appropriate hardware is enabled. diff --git a/trunk/Documentation/scheduler/sched-stats.txt b/trunk/Documentation/scheduler/sched-stats.txt index 1cd5d51bc761..01e69404ee5e 100644 --- a/trunk/Documentation/scheduler/sched-stats.txt +++ b/trunk/Documentation/scheduler/sched-stats.txt @@ -1,7 +1,3 @@ -Version 15 of schedstats dropped counters for some sched_yield: -yld_exp_empty, yld_act_empty and yld_both_empty. Otherwise, it is -identical to version 14. - Version 14 of schedstats includes support for sched_domains, which hit the mainline kernel in 2.6.20 although it is identical to the stats from version 12 which was in the kernel from 2.6.13-2.6.19 (version 13 never saw a kernel @@ -32,25 +28,32 @@ to write their own scripts, the fields are described here. CPU statistics -------------- -cpu 1 2 3 4 5 6 7 8 9 +cpu 1 2 3 4 5 6 7 8 9 10 11 12 + +NOTE: In the sched_yield() statistics, the active queue is considered empty + if it has only one process in it, since obviously the process calling + sched_yield() is that process. -First field is a sched_yield() statistic: - 1) # of times sched_yield() was called +First four fields are sched_yield() statistics: + 1) # of times both the active and the expired queue were empty + 2) # of times just the active queue was empty + 3) # of times just the expired queue was empty + 4) # of times sched_yield() was called Next three are schedule() statistics: - 2) # of times we switched to the expired queue and reused it - 3) # of times schedule() was called - 4) # of times schedule() left the processor idle + 5) # of times we switched to the expired queue and reused it + 6) # of times schedule() was called + 7) # of times schedule() left the processor idle Next two are try_to_wake_up() statistics: - 5) # of times try_to_wake_up() was called - 6) # of times try_to_wake_up() was called to wake up the local cpu + 8) # of times try_to_wake_up() was called + 9) # of times try_to_wake_up() was called to wake up the local cpu Next three are statistics describing scheduling latency: - 7) sum of all time spent running by tasks on this processor (in jiffies) - 8) sum of all time spent waiting to run by tasks on this processor (in + 10) sum of all time spent running by tasks on this processor (in jiffies) + 11) sum of all time spent waiting to run by tasks on this processor (in jiffies) - 9) # of timeslices run on this cpu + 12) # of timeslices run on this cpu Domain statistics diff --git a/trunk/Documentation/sound/alsa/HD-Audio-Models.txt b/trunk/Documentation/sound/alsa/HD-Audio-Models.txt index 0caf77e59be4..16ae4300c747 100644 --- a/trunk/Documentation/sound/alsa/HD-Audio-Models.txt +++ b/trunk/Documentation/sound/alsa/HD-Audio-Models.txt @@ -296,7 +296,6 @@ Conexant 5066 ============= laptop Basic Laptop config (default) hp-laptop HP laptops, e g G60 - asus Asus K52JU, Lenovo G560 dell-laptop Dell laptops dell-vostro Dell Vostro olpc-xo-1_5 OLPC XO 1.5 diff --git a/trunk/MAINTAINERS b/trunk/MAINTAINERS index 531c5cf150ba..190c2a4c4824 100644 --- a/trunk/MAINTAINERS +++ b/trunk/MAINTAINERS @@ -978,8 +978,6 @@ S: Maintained F: arch/arm/plat-samsung/ F: arch/arm/plat-s3c24xx/ F: arch/arm/plat-s5p/ -F: drivers/*/*s3c2410* -F: drivers/*/*/*s3c2410* ARM/S3C2410 ARM ARCHITECTURE M: Ben Dooks @@ -3141,12 +3139,6 @@ S: Maintained F: net/ieee802154/ F: drivers/ieee802154/ -IKANOS/ADI EAGLE ADSL USB DRIVER -M: Matthieu Castet -M: Stanislaw Gruszka -S: Maintained -F: drivers/usb/atm/ueagle-atm.c - INTEGRITY MEASUREMENT ARCHITECTURE (IMA) M: Mimi Zohar S: Supported @@ -5615,20 +5607,18 @@ F: include/linux/sfi*.h SIMTEC EB110ATX (Chalice CATS) P: Ben Dooks -P: Vincent Sanders -M: Simtec Linux Team +M: Vincent Sanders W: http://www.simtec.co.uk/products/EB110ATX/ S: Supported SIMTEC EB2410ITX (BAST) P: Ben Dooks -P: Vincent Sanders -M: Simtec Linux Team +M: Vincent Sanders W: http://www.simtec.co.uk/products/EB2410ITX/ S: Supported -F: arch/arm/mach-s3c2410/mach-bast.c -F: arch/arm/mach-s3c2410/bast-ide.c -F: arch/arm/mach-s3c2410/bast-irq.c +F: arch/arm/mach-s3c2410/ +F: drivers/*/*s3c2410* +F: drivers/*/*/*s3c2410* TI DAVINCI MACHINE SUPPORT M: Kevin Hilman @@ -6603,16 +6593,6 @@ S: Maintained F: drivers/char/virtio_console.c F: include/linux/virtio_console.h -VIRTIO CORE, NET AND BLOCK DRIVERS -M: Rusty Russell -M: "Michael S. Tsirkin" -L: virtualization@lists.linux-foundation.org -S: Maintained -F: drivers/virtio/ -F: drivers/net/virtio_net.c -F: drivers/block/virtio_blk.c -F: include/linux/virtio_*.h - VIRTIO HOST (VHOST) M: "Michael S. Tsirkin" L: kvm@vger.kernel.org diff --git a/trunk/Makefile b/trunk/Makefile index c9c8c8fd2591..1f474953427f 100644 --- a/trunk/Makefile +++ b/trunk/Makefile @@ -1,7 +1,7 @@ VERSION = 2 PATCHLEVEL = 6 SUBLEVEL = 38 -EXTRAVERSION = -rc4 +EXTRAVERSION = -rc2 NAME = Flesh-Eating Bats with Fangs # *DOCUMENTATION* diff --git a/trunk/arch/arm/include/asm/hardware/sp810.h b/trunk/arch/arm/include/asm/hardware/sp810.h index 721847dc68ab..a101f10bb5b1 100644 --- a/trunk/arch/arm/include/asm/hardware/sp810.h +++ b/trunk/arch/arm/include/asm/hardware/sp810.h @@ -50,12 +50,6 @@ #define SCPCELLID2 0xFF8 #define SCPCELLID3 0xFFC -#define SCCTRL_TIMEREN0SEL_REFCLK (0 << 15) -#define SCCTRL_TIMEREN0SEL_TIMCLK (1 << 15) - -#define SCCTRL_TIMEREN1SEL_REFCLK (0 << 17) -#define SCCTRL_TIMEREN1SEL_TIMCLK (1 << 17) - static inline void sysctl_soft_reset(void __iomem *base) { /* writing any value to SCSYSSTAT reg will reset system */ diff --git a/trunk/arch/arm/include/asm/io.h b/trunk/arch/arm/include/asm/io.h index d66605dea55a..20e0f7c9e03e 100644 --- a/trunk/arch/arm/include/asm/io.h +++ b/trunk/arch/arm/include/asm/io.h @@ -95,15 +95,6 @@ static inline void __iomem *__typesafe_io(unsigned long addr) return (void __iomem *)addr; } -/* IO barriers */ -#ifdef CONFIG_ARM_DMA_MEM_BUFFERABLE -#define __iormb() rmb() -#define __iowmb() wmb() -#else -#define __iormb() do { } while (0) -#define __iowmb() do { } while (0) -#endif - /* * Now, pick up the machine-defined IO definitions */ @@ -134,17 +125,17 @@ static inline void __iomem *__typesafe_io(unsigned long addr) * The {in,out}[bwl] macros are for emulating x86-style PCI/ISA IO space. */ #ifdef __io -#define outb(v,p) ({ __iowmb(); __raw_writeb(v,__io(p)); }) -#define outw(v,p) ({ __iowmb(); __raw_writew((__force __u16) \ - cpu_to_le16(v),__io(p)); }) -#define outl(v,p) ({ __iowmb(); __raw_writel((__force __u32) \ - cpu_to_le32(v),__io(p)); }) +#define outb(v,p) __raw_writeb(v,__io(p)) +#define outw(v,p) __raw_writew((__force __u16) \ + cpu_to_le16(v),__io(p)) +#define outl(v,p) __raw_writel((__force __u32) \ + cpu_to_le32(v),__io(p)) -#define inb(p) ({ __u8 __v = __raw_readb(__io(p)); __iormb(); __v; }) +#define inb(p) ({ __u8 __v = __raw_readb(__io(p)); __v; }) #define inw(p) ({ __u16 __v = le16_to_cpu((__force __le16) \ - __raw_readw(__io(p))); __iormb(); __v; }) + __raw_readw(__io(p))); __v; }) #define inl(p) ({ __u32 __v = le32_to_cpu((__force __le32) \ - __raw_readl(__io(p))); __iormb(); __v; }) + __raw_readl(__io(p))); __v; }) #define outsb(p,d,l) __raw_writesb(__io(p),d,l) #define outsw(p,d,l) __raw_writesw(__io(p),d,l) @@ -201,6 +192,14 @@ extern void _memset_io(volatile void __iomem *, int, size_t); #define writel_relaxed(v,c) ((void)__raw_writel((__force u32) \ cpu_to_le32(v),__mem_pci(c))) +#ifdef CONFIG_ARM_DMA_MEM_BUFFERABLE +#define __iormb() rmb() +#define __iowmb() wmb() +#else +#define __iormb() do { } while (0) +#define __iowmb() do { } while (0) +#endif + #define readb(c) ({ u8 __v = readb_relaxed(c); __iormb(); __v; }) #define readw(c) ({ u16 __v = readw_relaxed(c); __iormb(); __v; }) #define readl(c) ({ u32 __v = readl_relaxed(c); __iormb(); __v; }) diff --git a/trunk/arch/arm/include/asm/memory.h b/trunk/arch/arm/include/asm/memory.h index d0ee74b7cf86..23c2e8e5c0fa 100644 --- a/trunk/arch/arm/include/asm/memory.h +++ b/trunk/arch/arm/include/asm/memory.h @@ -188,7 +188,7 @@ * translation for translating DMA addresses. Use the driver * DMA support - see dma-mapping.h. */ -static inline unsigned long virt_to_phys(const volatile void *x) +static inline unsigned long virt_to_phys(void *x) { return __virt_to_phys((unsigned long)(x)); } diff --git a/trunk/arch/arm/kernel/head.S b/trunk/arch/arm/kernel/head.S index c0225da3fb21..f17d9a09e8fb 100644 --- a/trunk/arch/arm/kernel/head.S +++ b/trunk/arch/arm/kernel/head.S @@ -392,22 +392,24 @@ ENDPROC(__turn_mmu_on) #ifdef CONFIG_SMP_ON_UP __fixup_smp: - and r3, r9, #0x000f0000 @ architecture version - teq r3, #0x000f0000 @ CPU ID supported? + mov r4, #0x00070000 + orr r3, r4, #0xff000000 @ mask 0xff070000 + orr r4, r4, #0x41000000 @ val 0x41070000 + and r0, r9, r3 + teq r0, r4 @ ARM CPU and ARMv6/v7? bne __fixup_smp_on_up @ no, assume UP - bic r3, r9, #0x00ff0000 - bic r3, r3, #0x0000000f @ mask 0xff00fff0 - mov r4, #0x41000000 + orr r3, r3, #0x0000ff00 + orr r3, r3, #0x000000f0 @ mask 0xff07fff0 orr r4, r4, #0x0000b000 - orr r4, r4, #0x00000020 @ val 0x4100b020 - teq r3, r4 @ ARM 11MPCore? + orr r4, r4, #0x00000020 @ val 0x4107b020 + and r0, r9, r3 + teq r0, r4 @ ARM 11MPCore? moveq pc, lr @ yes, assume SMP mrc p15, 0, r0, c0, c0, 5 @ read MPIDR - and r0, r0, #0xc0000000 @ multiprocessing extensions and - teq r0, #0x80000000 @ not part of a uniprocessor system? - moveq pc, lr @ yes, assume SMP + tst r0, #1 << 31 + movne pc, lr @ bit 31 => SMP __fixup_smp_on_up: adr r0, 1f diff --git a/trunk/arch/arm/kernel/smp_twd.c b/trunk/arch/arm/kernel/smp_twd.c index 60636f499cb3..fd9156698ab9 100644 --- a/trunk/arch/arm/kernel/smp_twd.c +++ b/trunk/arch/arm/kernel/smp_twd.c @@ -36,7 +36,6 @@ static void twd_set_mode(enum clock_event_mode mode, /* timer load already set up */ ctrl = TWD_TIMER_CONTROL_ENABLE | TWD_TIMER_CONTROL_IT_ENABLE | TWD_TIMER_CONTROL_PERIODIC; - __raw_writel(twd_timer_rate / HZ, twd_base + TWD_TIMER_LOAD); break; case CLOCK_EVT_MODE_ONESHOT: /* period set, and timer enabled in 'next_event' hook */ @@ -82,7 +81,7 @@ int twd_timer_ack(void) static void __cpuinit twd_calibrate_rate(void) { - unsigned long count; + unsigned long load, count; u64 waitjiffies; /* @@ -117,6 +116,10 @@ static void __cpuinit twd_calibrate_rate(void) printk("%lu.%02luMHz.\n", twd_timer_rate / 1000000, (twd_timer_rate / 1000000) % 100); } + + load = twd_timer_rate / HZ; + + __raw_writel(load, twd_base + TWD_TIMER_LOAD); } /* diff --git a/trunk/arch/arm/mach-ep93xx/core.c b/trunk/arch/arm/mach-ep93xx/core.c index 82079545adc4..ffdf87be2958 100644 --- a/trunk/arch/arm/mach-ep93xx/core.c +++ b/trunk/arch/arm/mach-ep93xx/core.c @@ -838,7 +838,7 @@ EXPORT_SYMBOL(ep93xx_i2s_release); static struct resource ep93xx_ac97_resources[] = { { .start = EP93XX_AAC_PHYS_BASE, - .end = EP93XX_AAC_PHYS_BASE + 0xac - 1, + .end = EP93XX_AAC_PHYS_BASE + 0xb0 - 1, .flags = IORESOURCE_MEM, }, { diff --git a/trunk/arch/arm/mach-ep93xx/gpio.c b/trunk/arch/arm/mach-ep93xx/gpio.c index bec34b834958..f3dc76fdcea8 100644 --- a/trunk/arch/arm/mach-ep93xx/gpio.c +++ b/trunk/arch/arm/mach-ep93xx/gpio.c @@ -427,13 +427,6 @@ void __init ep93xx_gpio_init(void) { int i; - /* Set Ports C, D, E, G, and H for GPIO use */ - ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_KEYS | - EP93XX_SYSCON_DEVCFG_GONK | - EP93XX_SYSCON_DEVCFG_EONIDE | - EP93XX_SYSCON_DEVCFG_GONIDE | - EP93XX_SYSCON_DEVCFG_HONIDE); - for (i = 0; i < ARRAY_SIZE(ep93xx_gpio_banks); i++) gpiochip_add(&ep93xx_gpio_banks[i].chip); } diff --git a/trunk/arch/arm/mach-footbridge/include/mach/debug-macro.S b/trunk/arch/arm/mach-footbridge/include/mach/debug-macro.S index 30b971d65815..3c9e0c40c679 100644 --- a/trunk/arch/arm/mach-footbridge/include/mach/debug-macro.S +++ b/trunk/arch/arm/mach-footbridge/include/mach/debug-macro.S @@ -17,8 +17,8 @@ /* For NetWinder debugging */ .macro addruart, rp, rv mov \rp, #0x000003f8 - orr \rv, \rp, #0xff000000 @ virtual - orr \rp, \rp, #0x7c000000 @ physical + orr \rv, \rp, #0x7c000000 @ physical + orr \rp, \rp, #0xff000000 @ virtual .endm #define UART_SHIFT 0 diff --git a/trunk/arch/arm/mach-imx/mach-mx25_3ds.c b/trunk/arch/arm/mach-imx/mach-mx25_3ds.c index 8382e7902078..aa76cfd9f348 100644 --- a/trunk/arch/arm/mach-imx/mach-mx25_3ds.c +++ b/trunk/arch/arm/mach-imx/mach-mx25_3ds.c @@ -180,7 +180,7 @@ static const uint32_t mx25pdk_keymap[] = { KEY(3, 3, KEY_POWER), }; -static const struct matrix_keymap_data mx25pdk_keymap_data __initconst = { +static const struct matrix_keymap_data mx25pdk_keymap_data __initdata = { .keymap = mx25pdk_keymap, .keymap_size = ARRAY_SIZE(mx25pdk_keymap), }; diff --git a/trunk/arch/arm/mach-ixp4xx/common.c b/trunk/arch/arm/mach-ixp4xx/common.c index 9fd894271d5d..4dc68d6bb6be 100644 --- a/trunk/arch/arm/mach-ixp4xx/common.c +++ b/trunk/arch/arm/mach-ixp4xx/common.c @@ -432,7 +432,7 @@ static struct clocksource clocksource_ixp4xx = { .flags = CLOCK_SOURCE_IS_CONTINUOUS, }; -unsigned long ixp4xx_timer_freq = IXP4XX_TIMER_FREQ; +unsigned long ixp4xx_timer_freq = FREQ; EXPORT_SYMBOL(ixp4xx_timer_freq); static void __init ixp4xx_clocksource_init(void) { @@ -496,7 +496,7 @@ static struct clock_event_device clockevent_ixp4xx = { static void __init ixp4xx_clockevent_init(void) { - clockevent_ixp4xx.mult = div_sc(IXP4XX_TIMER_FREQ, NSEC_PER_SEC, + clockevent_ixp4xx.mult = div_sc(FREQ, NSEC_PER_SEC, clockevent_ixp4xx.shift); clockevent_ixp4xx.max_delta_ns = clockevent_delta2ns(0xfffffffe, &clockevent_ixp4xx); diff --git a/trunk/arch/arm/mach-ixp4xx/include/mach/timex.h b/trunk/arch/arm/mach-ixp4xx/include/mach/timex.h index c9e930f29339..2c3f93c3eb79 100644 --- a/trunk/arch/arm/mach-ixp4xx/include/mach/timex.h +++ b/trunk/arch/arm/mach-ixp4xx/include/mach/timex.h @@ -10,7 +10,6 @@ * 66.66... MHz. We do a convulted calculation of CLOCK_TICK_RATE b/c the * timer register ignores the bottom 2 bits of the LATCH value. */ -#define IXP4XX_TIMER_FREQ 66666000 -#define CLOCK_TICK_RATE \ - (((IXP4XX_TIMER_FREQ / HZ & ~IXP4XX_OST_RELOAD_MASK) + 1) * HZ) +#define FREQ 66666000 +#define CLOCK_TICK_RATE (((FREQ / HZ & ~IXP4XX_OST_RELOAD_MASK) + 1) * HZ) diff --git a/trunk/arch/arm/mach-ixp4xx/ixp4xx_qmgr.c b/trunk/arch/arm/mach-ixp4xx/ixp4xx_qmgr.c index 852f7c9f87d0..bfdbe4b5a3cc 100644 --- a/trunk/arch/arm/mach-ixp4xx/ixp4xx_qmgr.c +++ b/trunk/arch/arm/mach-ixp4xx/ixp4xx_qmgr.c @@ -265,11 +265,6 @@ void qmgr_release_queue(unsigned int queue) qmgr_queue_descs[queue], queue); qmgr_queue_descs[queue][0] = '\x0'; #endif - - while ((addr = qmgr_get_entry(queue))) - printk(KERN_ERR "qmgr: released queue %i not empty: 0x%08X\n", - queue, addr); - __raw_writel(0, &qmgr_regs->sram[queue]); used_sram_bitmap[0] &= ~mask[0]; @@ -280,6 +275,10 @@ void qmgr_release_queue(unsigned int queue) spin_unlock_irq(&qmgr_lock); module_put(THIS_MODULE); + + while ((addr = qmgr_get_entry(queue))) + printk(KERN_ERR "qmgr: released queue %i not empty: 0x%08X\n", + queue, addr); } static int qmgr_init(void) diff --git a/trunk/arch/arm/mach-mxs/clock-mx23.c b/trunk/arch/arm/mach-mxs/clock-mx23.c index ca72a05ed9c1..b1a362ebfded 100644 --- a/trunk/arch/arm/mach-mxs/clock-mx23.c +++ b/trunk/arch/arm/mach-mxs/clock-mx23.c @@ -304,7 +304,7 @@ static int name##_set_rate(struct clk *clk, unsigned long rate) \ reg = __raw_readl(CLKCTRL_BASE_ADDR + HW_CLKCTRL_##dr); \ reg &= ~BM_CLKCTRL_##dr##_DIV; \ reg |= div << BP_CLKCTRL_##dr##_DIV; \ - if (reg & (1 << clk->enable_shift)) { \ + if (reg | (1 << clk->enable_shift)) { \ pr_err("%s: clock is gated\n", __func__); \ return -EINVAL; \ } \ @@ -347,7 +347,7 @@ static int name##_set_parent(struct clk *clk, struct clk *parent) \ { \ if (parent != clk->parent) { \ __raw_writel(BM_CLKCTRL_CLKSEQ_BYPASS_##bit, \ - CLKCTRL_BASE_ADDR + HW_CLKCTRL_CLKSEQ_TOG); \ + HW_CLKCTRL_CLKSEQ_TOG); \ clk->parent = parent; \ } \ \ diff --git a/trunk/arch/arm/mach-mxs/clock-mx28.c b/trunk/arch/arm/mach-mxs/clock-mx28.c index fd1c4c54b8e5..56312c092a9e 100644 --- a/trunk/arch/arm/mach-mxs/clock-mx28.c +++ b/trunk/arch/arm/mach-mxs/clock-mx28.c @@ -355,12 +355,12 @@ static int name##_set_rate(struct clk *clk, unsigned long rate) \ } else { \ reg &= ~BM_CLKCTRL_##dr##_DIV; \ reg |= div << BP_CLKCTRL_##dr##_DIV; \ - if (reg & (1 << clk->enable_shift)) { \ + if (reg | (1 << clk->enable_shift)) { \ pr_err("%s: clock is gated\n", __func__); \ return -EINVAL; \ } \ } \ - __raw_writel(reg, CLKCTRL_BASE_ADDR + HW_CLKCTRL_##dr); \ + __raw_writel(reg, CLKCTRL_BASE_ADDR + HW_CLKCTRL_CPU); \ \ for (i = 10000; i; i--) \ if (!(__raw_readl(CLKCTRL_BASE_ADDR + \ @@ -483,7 +483,7 @@ static int name##_set_parent(struct clk *clk, struct clk *parent) \ { \ if (parent != clk->parent) { \ __raw_writel(BM_CLKCTRL_CLKSEQ_BYPASS_##bit, \ - CLKCTRL_BASE_ADDR + HW_CLKCTRL_CLKSEQ_TOG); \ + HW_CLKCTRL_CLKSEQ_TOG); \ clk->parent = parent; \ } \ \ @@ -609,6 +609,7 @@ static struct clk_lookup lookups[] = { _REGISTER_CLOCK("duart", NULL, uart_clk) _REGISTER_CLOCK("imx28-fec.0", NULL, fec_clk) _REGISTER_CLOCK("imx28-fec.1", NULL, fec_clk) + _REGISTER_CLOCK("fec.0", NULL, fec_clk) _REGISTER_CLOCK("rtc", NULL, rtc_clk) _REGISTER_CLOCK("pll2", NULL, pll2_clk) _REGISTER_CLOCK(NULL, "hclk", hbus_clk) diff --git a/trunk/arch/arm/mach-mxs/clock.c b/trunk/arch/arm/mach-mxs/clock.c index a7093c88e6a6..e7d2269cf70e 100644 --- a/trunk/arch/arm/mach-mxs/clock.c +++ b/trunk/arch/arm/mach-mxs/clock.c @@ -57,6 +57,7 @@ static void __clk_disable(struct clk *clk) if (clk->disable) clk->disable(clk); __clk_disable(clk->parent); + __clk_disable(clk->secondary); } } @@ -67,6 +68,7 @@ static int __clk_enable(struct clk *clk) if (clk->usecount++ == 0) { __clk_enable(clk->parent); + __clk_enable(clk->secondary); if (clk->enable) clk->enable(clk); diff --git a/trunk/arch/arm/mach-mxs/gpio.c b/trunk/arch/arm/mach-mxs/gpio.c index cb0c0e83a527..d7ad7a61366d 100644 --- a/trunk/arch/arm/mach-mxs/gpio.c +++ b/trunk/arch/arm/mach-mxs/gpio.c @@ -139,8 +139,6 @@ static void mxs_gpio_irq_handler(u32 irq, struct irq_desc *desc) struct mxs_gpio_port *port = (struct mxs_gpio_port *)get_irq_data(irq); u32 gpio_irq_no_base = port->virtual_irq_start; - desc->irq_data.chip->irq_ack(&desc->irq_data); - irq_stat = __raw_readl(port->base + PINCTRL_IRQSTAT(port->id)) & __raw_readl(port->base + PINCTRL_IRQEN(port->id)); diff --git a/trunk/arch/arm/mach-mxs/include/mach/clock.h b/trunk/arch/arm/mach-mxs/include/mach/clock.h index 592c9ab5d760..041e276d8a32 100644 --- a/trunk/arch/arm/mach-mxs/include/mach/clock.h +++ b/trunk/arch/arm/mach-mxs/include/mach/clock.h @@ -29,6 +29,8 @@ struct clk { int id; /* Source clock this clk depends on */ struct clk *parent; + /* Secondary clock to enable/disable with this clock */ + struct clk *secondary; /* Reference count of clock enable/disable */ __s8 usecount; /* Register bit position for clock's enable/disable control. */ diff --git a/trunk/arch/arm/mach-omap1/include/mach/entry-macro.S b/trunk/arch/arm/mach-omap1/include/mach/entry-macro.S index bfb4fb1d7382..c9be6d4d83e2 100644 --- a/trunk/arch/arm/mach-omap1/include/mach/entry-macro.S +++ b/trunk/arch/arm/mach-omap1/include/mach/entry-macro.S @@ -14,6 +14,19 @@ #include #include +/* + * We use __glue to avoid errors with multiple definitions of + * .globl omap_irq_flags as it's included from entry-armv.S but not + * from entry-common.S. + */ +#ifdef __glue + .pushsection .data + .globl omap_irq_flags +omap_irq_flags: + .word 0 + .popsection +#endif + .macro disable_fiq .endm diff --git a/trunk/arch/arm/mach-omap1/irq.c b/trunk/arch/arm/mach-omap1/irq.c index 731dd33bff51..47701584df35 100644 --- a/trunk/arch/arm/mach-omap1/irq.c +++ b/trunk/arch/arm/mach-omap1/irq.c @@ -57,7 +57,6 @@ struct omap_irq_bank { unsigned long wake_enable; }; -u32 omap_irq_flags; static unsigned int irq_bank_count; static struct omap_irq_bank *irq_banks; @@ -177,6 +176,7 @@ static struct irq_chip omap_irq_chip = { void __init omap_init_irq(void) { + extern unsigned int omap_irq_flags; int i, j; #if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850) diff --git a/trunk/arch/arm/mach-omap1/lcd_dma.c b/trunk/arch/arm/mach-omap1/lcd_dma.c index 453809359ba6..c9088d85da04 100644 --- a/trunk/arch/arm/mach-omap1/lcd_dma.c +++ b/trunk/arch/arm/mach-omap1/lcd_dma.c @@ -37,7 +37,7 @@ int omap_lcd_dma_running(void) * On OMAP1510, internal LCD controller will start the transfer * when it gets enabled, so assume DMA running if LCD enabled. */ - if (cpu_is_omap15xx()) + if (cpu_is_omap1510()) if (omap_readw(OMAP_LCDC_CONTROL) & OMAP_LCDC_CTRL_LCD_EN) return 1; @@ -95,7 +95,7 @@ EXPORT_SYMBOL(omap_set_lcd_dma_single_transfer); void omap_set_lcd_dma_b1_rotation(int rotate) { - if (cpu_is_omap15xx()) { + if (cpu_is_omap1510()) { printk(KERN_ERR "DMA rotation is not supported in 1510 mode\n"); BUG(); return; @@ -106,7 +106,7 @@ EXPORT_SYMBOL(omap_set_lcd_dma_b1_rotation); void omap_set_lcd_dma_b1_mirror(int mirror) { - if (cpu_is_omap15xx()) { + if (cpu_is_omap1510()) { printk(KERN_ERR "DMA mirror is not supported in 1510 mode\n"); BUG(); } @@ -116,7 +116,7 @@ EXPORT_SYMBOL(omap_set_lcd_dma_b1_mirror); void omap_set_lcd_dma_b1_vxres(unsigned long vxres) { - if (cpu_is_omap15xx()) { + if (cpu_is_omap1510()) { printk(KERN_ERR "DMA virtual resulotion is not supported " "in 1510 mode\n"); BUG(); @@ -127,7 +127,7 @@ EXPORT_SYMBOL(omap_set_lcd_dma_b1_vxres); void omap_set_lcd_dma_b1_scale(unsigned int xscale, unsigned int yscale) { - if (cpu_is_omap15xx()) { + if (cpu_is_omap1510()) { printk(KERN_ERR "DMA scale is not supported in 1510 mode\n"); BUG(); } @@ -177,7 +177,7 @@ static void set_b1_regs(void) bottom = PIXADDR(lcd_dma.xres - 1, lcd_dma.yres - 1); /* 1510 DMA requires the bottom address to be 2 more * than the actual last memory access location. */ - if (cpu_is_omap15xx() && + if (cpu_is_omap1510() && lcd_dma.data_type == OMAP_DMA_DATA_TYPE_S32) bottom += 2; ei = PIXSTEP(0, 0, 1, 0); @@ -241,7 +241,7 @@ static void set_b1_regs(void) return; /* Suppress warning about uninitialized vars */ } - if (cpu_is_omap15xx()) { + if (cpu_is_omap1510()) { omap_writew(top >> 16, OMAP1510_DMA_LCD_TOP_F1_U); omap_writew(top, OMAP1510_DMA_LCD_TOP_F1_L); omap_writew(bottom >> 16, OMAP1510_DMA_LCD_BOT_F1_U); @@ -343,7 +343,7 @@ void omap_free_lcd_dma(void) BUG(); return; } - if (!cpu_is_omap15xx()) + if (!cpu_is_omap1510()) omap_writew(omap_readw(OMAP1610_DMA_LCD_CCR) & ~1, OMAP1610_DMA_LCD_CCR); lcd_dma.reserved = 0; @@ -360,7 +360,7 @@ void omap_enable_lcd_dma(void) * connected. Otherwise the OMAP internal controller will * start the transfer when it gets enabled. */ - if (cpu_is_omap15xx() || !lcd_dma.ext_ctrl) + if (cpu_is_omap1510() || !lcd_dma.ext_ctrl) return; w = omap_readw(OMAP1610_DMA_LCD_CTRL); @@ -378,14 +378,14 @@ EXPORT_SYMBOL(omap_enable_lcd_dma); void omap_setup_lcd_dma(void) { BUG_ON(lcd_dma.active); - if (!cpu_is_omap15xx()) { + if (!cpu_is_omap1510()) { /* Set some reasonable defaults */ omap_writew(0x5440, OMAP1610_DMA_LCD_CCR); omap_writew(0x9102, OMAP1610_DMA_LCD_CSDP); omap_writew(0x0004, OMAP1610_DMA_LCD_LCH_CTRL); } set_b1_regs(); - if (!cpu_is_omap15xx()) { + if (!cpu_is_omap1510()) { u16 w; w = omap_readw(OMAP1610_DMA_LCD_CCR); @@ -407,7 +407,7 @@ void omap_stop_lcd_dma(void) u16 w; lcd_dma.active = 0; - if (cpu_is_omap15xx() || !lcd_dma.ext_ctrl) + if (cpu_is_omap1510() || !lcd_dma.ext_ctrl) return; w = omap_readw(OMAP1610_DMA_LCD_CCR); diff --git a/trunk/arch/arm/mach-omap1/time.c b/trunk/arch/arm/mach-omap1/time.c index 6885d2fac183..f83fc335c613 100644 --- a/trunk/arch/arm/mach-omap1/time.c +++ b/trunk/arch/arm/mach-omap1/time.c @@ -44,6 +44,7 @@ #include #include #include +#include #include #include diff --git a/trunk/arch/arm/mach-omap2/board-devkit8000.c b/trunk/arch/arm/mach-omap2/board-devkit8000.c index 9a2a31e011ce..e906e05bb41b 100644 --- a/trunk/arch/arm/mach-omap2/board-devkit8000.c +++ b/trunk/arch/arm/mach-omap2/board-devkit8000.c @@ -115,6 +115,9 @@ static struct omap2_hsmmc_info mmc[] = { static int devkit8000_panel_enable_lcd(struct omap_dss_device *dssdev) { + twl_i2c_write_u8(TWL4030_MODULE_GPIO, 0x80, REG_GPIODATADIR1); + twl_i2c_write_u8(TWL4030_MODULE_LED, 0x0, 0x0); + if (gpio_is_valid(dssdev->reset_gpio)) gpio_set_value_cansleep(dssdev->reset_gpio, 1); return 0; @@ -244,8 +247,6 @@ static struct gpio_led gpio_leds[]; static int devkit8000_twl_gpio_setup(struct device *dev, unsigned gpio, unsigned ngpio) { - int ret; - omap_mux_init_gpio(29, OMAP_PIN_INPUT); /* gpio + 0 is "mmc0_cd" (input/IRQ) */ mmc[0].gpio_cd = gpio + 0; @@ -254,23 +255,17 @@ static int devkit8000_twl_gpio_setup(struct device *dev, /* TWL4030_GPIO_MAX + 1 == ledB, PMU_STAT (out, active low LED) */ gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1; - /* TWL4030_GPIO_MAX + 0 is "LCD_PWREN" (out, active high) */ - devkit8000_lcd_device.reset_gpio = gpio + TWL4030_GPIO_MAX + 0; - ret = gpio_request_one(devkit8000_lcd_device.reset_gpio, - GPIOF_DIR_OUT | GPIOF_INIT_LOW, "LCD_PWREN"); - if (ret < 0) { - devkit8000_lcd_device.reset_gpio = -EINVAL; - printk(KERN_ERR "Failed to request GPIO for LCD_PWRN\n"); - } + /* gpio + 1 is "LCD_PWREN" (out, active high) */ + devkit8000_lcd_device.reset_gpio = gpio + 1; + gpio_request(devkit8000_lcd_device.reset_gpio, "LCD_PWREN"); + /* Disable until needed */ + gpio_direction_output(devkit8000_lcd_device.reset_gpio, 0); /* gpio + 7 is "DVI_PD" (out, active low) */ devkit8000_dvi_device.reset_gpio = gpio + 7; - ret = gpio_request_one(devkit8000_dvi_device.reset_gpio, - GPIOF_DIR_OUT | GPIOF_INIT_LOW, "DVI PowerDown"); - if (ret < 0) { - devkit8000_dvi_device.reset_gpio = -EINVAL; - printk(KERN_ERR "Failed to request GPIO for DVI PowerDown\n"); - } + gpio_request(devkit8000_dvi_device.reset_gpio, "DVI PowerDown"); + /* Disable until needed */ + gpio_direction_output(devkit8000_dvi_device.reset_gpio, 0); return 0; } diff --git a/trunk/arch/arm/mach-omap2/board-omap4panda.c b/trunk/arch/arm/mach-omap2/board-omap4panda.c index e944025d5ef8..e001a048dc0c 100644 --- a/trunk/arch/arm/mach-omap2/board-omap4panda.c +++ b/trunk/arch/arm/mach-omap2/board-omap4panda.c @@ -409,6 +409,8 @@ static void __init omap4_panda_init(void) platform_add_devices(panda_devices, ARRAY_SIZE(panda_devices)); omap_serial_init(); omap4_twl6030_hsmmc_init(mmc); + /* OMAP4 Panda uses internal transceiver so register nop transceiver */ + usb_nop_xceiv_register(); omap4_ehci_init(); usb_musb_init(&musb_board_data); } diff --git a/trunk/arch/arm/mach-omap2/board-rm680.c b/trunk/arch/arm/mach-omap2/board-rm680.c index 39a71bb8a308..cb77be7ac44f 100644 --- a/trunk/arch/arm/mach-omap2/board-rm680.c +++ b/trunk/arch/arm/mach-omap2/board-rm680.c @@ -40,6 +40,9 @@ static struct regulator_consumer_supply rm680_vemmc_consumers[] = { static struct regulator_init_data rm680_vemmc = { .constraints = { .name = "rm680_vemmc", + .min_uV = 2900000, + .max_uV = 2900000, + .apply_uV = 1, .valid_modes_mask = REGULATOR_MODE_NORMAL | REGULATOR_MODE_STANDBY, .valid_ops_mask = REGULATOR_CHANGE_STATUS diff --git a/trunk/arch/arm/mach-omap2/dma.c b/trunk/arch/arm/mach-omap2/dma.c index 34922b2d2e3f..d2f15f5cfd36 100644 --- a/trunk/arch/arm/mach-omap2/dma.c +++ b/trunk/arch/arm/mach-omap2/dma.c @@ -264,7 +264,7 @@ static int __init omap2_system_dma_init_dev(struct omap_hwmod *oh, void *unused) if (IS_ERR(od)) { pr_err("%s: Cant build omap_device for %s:%s.\n", __func__, name, oh->name); - return PTR_ERR(od); + return IS_ERR(od); } mem = platform_get_resource(&od->pdev, IORESOURCE_MEM, 0); diff --git a/trunk/arch/arm/mach-omap2/include/mach/entry-macro.S b/trunk/arch/arm/mach-omap2/include/mach/entry-macro.S index 81985a665cb3..befa321c4c13 100644 --- a/trunk/arch/arm/mach-omap2/include/mach/entry-macro.S +++ b/trunk/arch/arm/mach-omap2/include/mach/entry-macro.S @@ -38,6 +38,20 @@ */ #ifdef MULTI_OMAP2 + +/* + * We use __glue to avoid errors with multiple definitions of + * .globl omap_irq_base as it's included from entry-armv.S but not + * from entry-common.S. + */ +#ifdef __glue + .pushsection .data + .globl omap_irq_base +omap_irq_base: + .word 0 + .popsection +#endif + /* * Configure the interrupt base on the first interrupt. * See also omap_irq_base_init for setting omap_irq_base. diff --git a/trunk/arch/arm/mach-omap2/io.c b/trunk/arch/arm/mach-omap2/io.c index c2032041d26f..e66687b0b9de 100644 --- a/trunk/arch/arm/mach-omap2/io.c +++ b/trunk/arch/arm/mach-omap2/io.c @@ -314,13 +314,14 @@ static int _set_hwmod_postsetup_state(struct omap_hwmod *oh, void *data) return omap_hwmod_set_postsetup_state(oh, *(u8 *)data); } -void __iomem *omap_irq_base; - /* * Initialize asm_irq_base for entry-macro.S */ static inline void omap_irq_base_init(void) { + extern void __iomem *omap_irq_base; + +#ifdef MULTI_OMAP2 if (cpu_is_omap24xx()) omap_irq_base = OMAP2_L4_IO_ADDRESS(OMAP24XX_IC_BASE); else if (cpu_is_omap34xx()) @@ -329,6 +330,7 @@ static inline void omap_irq_base_init(void) omap_irq_base = OMAP2_L4_IO_ADDRESS(OMAP44XX_GIC_CPU_BASE); else pr_err("Could not initialize omap_irq_base\n"); +#endif } void __init omap2_init_common_infrastructure(void) diff --git a/trunk/arch/arm/mach-omap2/mux.c b/trunk/arch/arm/mach-omap2/mux.c index 98148b6c36e9..df8d2f2872c6 100644 --- a/trunk/arch/arm/mach-omap2/mux.c +++ b/trunk/arch/arm/mach-omap2/mux.c @@ -160,7 +160,7 @@ static int __init _omap_mux_get_by_name(struct omap_mux_partition *partition, struct omap_mux *mux = NULL; struct omap_mux_entry *e; const char *mode_name; - int found = 0, found_mode = 0, mode0_len = 0; + int found = 0, found_mode, mode0_len = 0; struct list_head *muxmodes = &partition->muxmodes; mode_name = strchr(muxname, '.'); @@ -1000,7 +1000,6 @@ int __init omap_mux_init(const char *name, u32 flags, if (!partition->base) { pr_err("%s: Could not ioremap mux partition at 0x%08x\n", __func__, partition->phys); - kfree(partition); return -ENODEV; } diff --git a/trunk/arch/arm/mach-omap2/pm24xx.c b/trunk/arch/arm/mach-omap2/pm24xx.c index 97feb3ab6a69..9e5dc8ed51e9 100644 --- a/trunk/arch/arm/mach-omap2/pm24xx.c +++ b/trunk/arch/arm/mach-omap2/pm24xx.c @@ -134,7 +134,7 @@ static void omap2_enter_full_retention(void) /* Block console output in case it is on one of the OMAP UARTs */ if (!is_suspending()) - if (!console_trylock()) + if (try_acquire_console_sem()) goto no_sleep; omap_uart_prepare_idle(0); @@ -151,7 +151,7 @@ static void omap2_enter_full_retention(void) omap_uart_resume_idle(0); if (!is_suspending()) - console_unlock(); + release_console_sem(); no_sleep: if (omap2_pm_debug) { diff --git a/trunk/arch/arm/mach-omap2/pm34xx.c b/trunk/arch/arm/mach-omap2/pm34xx.c index 2f864e4b085d..8cbbeade4b8a 100644 --- a/trunk/arch/arm/mach-omap2/pm34xx.c +++ b/trunk/arch/arm/mach-omap2/pm34xx.c @@ -168,10 +168,9 @@ static void omap3_core_restore_context(void) * once during boot sequence, but this works as we are not using secure * services. */ -static void omap3_save_secure_ram_context(void) +static void omap3_save_secure_ram_context(u32 target_mpu_state) { u32 ret; - int mpu_next_state = pwrdm_read_next_pwrst(mpu_pwrdm); if (omap_type() != OMAP2_DEVICE_TYPE_GP) { /* @@ -182,7 +181,7 @@ static void omap3_save_secure_ram_context(void) pwrdm_set_next_pwrst(mpu_pwrdm, PWRDM_POWER_ON); ret = _omap_save_secure_sram((u32 *) __pa(omap3_secure_ram_storage)); - pwrdm_set_next_pwrst(mpu_pwrdm, mpu_next_state); + pwrdm_set_next_pwrst(mpu_pwrdm, target_mpu_state); /* Following is for error tracking, it should not happen */ if (ret) { printk(KERN_ERR "save_secure_sram() returns %08x\n", @@ -399,7 +398,7 @@ void omap_sram_idle(void) if (!is_suspending()) if (per_next_state < PWRDM_POWER_ON || core_next_state < PWRDM_POWER_ON) - if (!console_trylock()) + if (try_acquire_console_sem()) goto console_still_active; /* PER */ @@ -482,7 +481,7 @@ void omap_sram_idle(void) } if (!is_suspending()) - console_unlock(); + release_console_sem(); console_still_active: /* Disable IO-PAD and IO-CHAIN wakeup */ @@ -1095,7 +1094,7 @@ static int __init omap3_pm_init(void) local_fiq_disable(); omap_dma_global_context_save(); - omap3_save_secure_ram_context(); + omap3_save_secure_ram_context(PWRDM_POWER_ON); omap_dma_global_context_restore(); local_irq_enable(); diff --git a/trunk/arch/arm/mach-omap2/serial.c b/trunk/arch/arm/mach-omap2/serial.c index 32e91a9c8b6b..302da7403a10 100644 --- a/trunk/arch/arm/mach-omap2/serial.c +++ b/trunk/arch/arm/mach-omap2/serial.c @@ -812,7 +812,7 @@ void __init omap_serial_init_port(struct omap_board_data *bdata) oh->dev_attr = uart; - console_lock(); /* in case the earlycon is on the UART */ + acquire_console_sem(); /* in case the earlycon is on the UART */ /* * Because of early UART probing, UART did not get idled @@ -838,7 +838,7 @@ void __init omap_serial_init_port(struct omap_board_data *bdata) omap_uart_block_sleep(uart); uart->timeout = DEFAULT_TIMEOUT; - console_unlock(); + release_console_sem(); if ((cpu_is_omap34xx() && uart->padconf) || (uart->wk_en && uart->wk_mask)) { diff --git a/trunk/arch/arm/mach-omap2/smartreflex.c b/trunk/arch/arm/mach-omap2/smartreflex.c index c37e823266d3..77ecebf3fae2 100644 --- a/trunk/arch/arm/mach-omap2/smartreflex.c +++ b/trunk/arch/arm/mach-omap2/smartreflex.c @@ -780,7 +780,8 @@ static int omap_sr_autocomp_show(void *data, u64 *val) struct omap_sr *sr_info = (struct omap_sr *) data; if (!sr_info) { - pr_warning("%s: omap_sr struct not found\n", __func__); + pr_warning("%s: omap_sr struct for sr_%s not found\n", + __func__, sr_info->voltdm->name); return -EINVAL; } @@ -794,7 +795,8 @@ static int omap_sr_autocomp_store(void *data, u64 val) struct omap_sr *sr_info = (struct omap_sr *) data; if (!sr_info) { - pr_warning("%s: omap_sr struct not found\n", __func__); + pr_warning("%s: omap_sr struct for sr_%s not found\n", + __func__, sr_info->voltdm->name); return -EINVAL; } @@ -832,8 +834,7 @@ static int __init omap_sr_probe(struct platform_device *pdev) if (!pdata) { dev_err(&pdev->dev, "%s: platform data missing\n", __func__); - ret = -EINVAL; - goto err_free_devinfo; + return -EINVAL; } mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); @@ -965,7 +966,7 @@ static int __devexit omap_sr_remove(struct platform_device *pdev) } sr_info = _sr_lookup(pdata->voltdm); - if (IS_ERR(sr_info)) { + if (!sr_info) { dev_warn(&pdev->dev, "%s: omap_sr struct not found\n", __func__); return -EINVAL; diff --git a/trunk/arch/arm/mach-omap2/voltage.c b/trunk/arch/arm/mach-omap2/voltage.c index 12be525b8df4..ed6079c94c57 100644 --- a/trunk/arch/arm/mach-omap2/voltage.c +++ b/trunk/arch/arm/mach-omap2/voltage.c @@ -471,7 +471,6 @@ static void __init vdd_debugfs_init(struct omap_vdd_info *vdd) strcat(name, vdd->voltdm.name); vdd->debug_dir = debugfs_create_dir(name, voltage_dir); - kfree(name); if (IS_ERR(vdd->debug_dir)) { pr_warning("%s: Unable to create debugfs directory for" " vdd_%s\n", __func__, vdd->voltdm.name); diff --git a/trunk/arch/arm/mach-realview/Kconfig b/trunk/arch/arm/mach-realview/Kconfig index 7ca138a943a9..b4575ae9648e 100644 --- a/trunk/arch/arm/mach-realview/Kconfig +++ b/trunk/arch/arm/mach-realview/Kconfig @@ -2,56 +2,52 @@ menu "RealView platform type" depends on ARCH_REALVIEW config MACH_REALVIEW_EB - bool "Support RealView(R) Emulation Baseboard" + bool "Support RealView/EB platform" select ARM_GIC help - Include support for the ARM(R) RealView(R) Emulation Baseboard - platform. + Include support for the ARM(R) RealView Emulation Baseboard platform. config REALVIEW_EB_A9MP - bool "Support Multicore Cortex-A9 Tile" + bool "Support Multicore Cortex-A9" depends on MACH_REALVIEW_EB select CPU_V7 help - Enable support for the Cortex-A9MPCore tile fitted to the - Realview(R) Emulation Baseboard platform. + Enable support for the Cortex-A9MPCore tile on the Realview platform. config REALVIEW_EB_ARM11MP - bool "Support ARM11MPCore Tile" + bool "Support ARM11MPCore tile" depends on MACH_REALVIEW_EB select CPU_V6 select ARCH_HAS_BARRIERS if SMP help - Enable support for the ARM11MPCore tile fitted to the Realview(R) - Emulation Baseboard platform. + Enable support for the ARM11MPCore tile on the Realview platform. config REALVIEW_EB_ARM11MP_REVB - bool "Support ARM11MPCore RevB Tile" + bool "Support ARM11MPCore RevB tile" depends on REALVIEW_EB_ARM11MP help - Enable support for the ARM11MPCore Revision B tile on the - Realview(R) Emulation Baseboard platform. Since there are device - address differences, a kernel built with this option enabled is - not compatible with other revisions of the ARM11MPCore tile. + Enable support for the ARM11MPCore RevB tile on the Realview + platform. Since there are device address differences, a + kernel built with this option enabled is not compatible with + other revisions of the ARM11MPCore tile. config MACH_REALVIEW_PB11MP - bool "Support RealView(R) Platform Baseboard for ARM11MPCore" + bool "Support RealView/PB11MPCore platform" select CPU_V6 select ARM_GIC select HAVE_PATA_PLATFORM select ARCH_HAS_BARRIERS if SMP help - Include support for the ARM(R) RealView(R) Platform Baseboard for - the ARM11MPCore. This platform has an on-board ARM11MPCore and has + Include support for the ARM(R) RealView MPCore Platform Baseboard. + PB11MPCore is a platform with an on-board ARM11MPCore and has support for PCI-E and Compact Flash. config MACH_REALVIEW_PB1176 - bool "Support RealView(R) Platform Baseboard for ARM1176JZF-S" + bool "Support RealView/PB1176 platform" select CPU_V6 select ARM_GIC help - Include support for the ARM(R) RealView(R) Platform Baseboard for - ARM1176JZF-S. + Include support for the ARM(R) RealView ARM1176 Platform Baseboard. config REALVIEW_PB1176_SECURE_FLASH bool "Allow access to the secure flash memory block" @@ -63,24 +59,23 @@ config REALVIEW_PB1176_SECURE_FLASH block (64MB @ 0x3c000000) is required. config MACH_REALVIEW_PBA8 - bool "Support RealView(R) Platform Baseboard for Cortex(tm)-A8 platform" + bool "Support RealView/PB-A8 platform" select CPU_V7 select ARM_GIC select HAVE_PATA_PLATFORM help - Include support for the ARM(R) RealView Platform Baseboard for - Cortex(tm)-A8. This platform has an on-board Cortex-A8 and has - support for PCI-E and Compact Flash. + Include support for the ARM(R) RealView Cortex-A8 Platform Baseboard. + PB-A8 is a platform with an on-board Cortex-A8 and has support for + PCI-E and Compact Flash. config MACH_REALVIEW_PBX - bool "Support RealView(R) Platform Baseboard Explore" + bool "Support RealView/PBX platform" select ARM_GIC select HAVE_PATA_PLATFORM select ARCH_SPARSEMEM_ENABLE if CPU_V7 && !REALVIEW_HIGH_PHYS_OFFSET select ZONE_DMA if SPARSEMEM help - Include support for the ARM(R) RealView(R) Platform Baseboard - Explore. + Include support for the ARM(R) RealView PBX platform. config REALVIEW_HIGH_PHYS_OFFSET bool "High physical base address for the RealView platform" diff --git a/trunk/arch/arm/mach-realview/platsmp.c b/trunk/arch/arm/mach-realview/platsmp.c index 6959d13d908a..a22bf67f2f78 100644 --- a/trunk/arch/arm/mach-realview/platsmp.c +++ b/trunk/arch/arm/mach-realview/platsmp.c @@ -41,7 +41,7 @@ volatile int __cpuinitdata pen_release = -1; * observers, irrespective of whether they're taking part in coherency * or not. This is necessary for the hotplug code to work reliably. */ -static void __cpuinit write_pen_release(int val) +static void write_pen_release(int val) { pen_release = val; smp_wmb(); diff --git a/trunk/arch/arm/mach-shmobile/Kconfig b/trunk/arch/arm/mach-shmobile/Kconfig index 0c8f6cf3e948..4d1b4c5c9389 100644 --- a/trunk/arch/arm/mach-shmobile/Kconfig +++ b/trunk/arch/arm/mach-shmobile/Kconfig @@ -60,8 +60,6 @@ endchoice config MACH_AG5EVM bool "AG5EVM board" - select ARCH_REQUIRE_GPIOLIB - select SH_LCD_MIPI_DSI depends on ARCH_SH73A0 config MACH_MACKEREL diff --git a/trunk/arch/arm/mach-shmobile/board-ag5evm.c b/trunk/arch/arm/mach-shmobile/board-ag5evm.c index 2123b96b5638..c18a740a4159 100644 --- a/trunk/arch/arm/mach-shmobile/board-ag5evm.c +++ b/trunk/arch/arm/mach-shmobile/board-ag5evm.c @@ -34,10 +34,9 @@ #include #include #include -#include -#include