From f8cfba4175609b8f2eaaa987d360a96dd3c1d961 Mon Sep 17 00:00:00 2001
From: Jayachandran C <jchandra@broadcom.com>
Date: Wed, 31 Oct 2012 12:01:29 +0000
Subject: [PATCH] --- yaml --- r: 344136 b: refs/heads/master c:
 d650484649643e5f18c9ff61f4ca1fc57fb61fb1 h: refs/heads/master v: v3

---
 [refs]                  | 2 +-
 trunk/arch/mips/Kconfig | 3 ++-
 2 files changed, 3 insertions(+), 2 deletions(-)

diff --git a/[refs] b/[refs]
index fcedc31493fc..321737a0a896 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 4be3d2f3966b9f010bb997dcab25e7af489a841e
+refs/heads/master: d650484649643e5f18c9ff61f4ca1fc57fb61fb1
diff --git a/trunk/arch/mips/Kconfig b/trunk/arch/mips/Kconfig
index a4919b0932ec..83980a07dc89 100644
--- a/trunk/arch/mips/Kconfig
+++ b/trunk/arch/mips/Kconfig
@@ -1542,6 +1542,7 @@ config CPU_XLP
 	select WEAK_ORDERING
 	select WEAK_REORDERING_BEYOND_LLSC
 	select CPU_HAS_PREFETCH
+	select CPU_MIPSR2
 	help
 	  Netlogic Microsystems XLP processors.
 endchoice
@@ -1755,7 +1756,7 @@ config CPU_SUPPORTS_UNCACHED_ACCELERATED
 	bool
 config MIPS_PGD_C0_CONTEXT
 	bool
-	default y if 64BIT && CPU_MIPSR2
+	default y if 64BIT && CPU_MIPSR2 && !CPU_XLP
 
 #
 # Set to y for ptrace access to watch registers.