From f9bd55a2e0f41f0ec10c282c43a8204c4aae30b8 Mon Sep 17 00:00:00 2001 From: Alex Hung Date: Wed, 20 Jun 2012 11:47:35 +0800 Subject: [PATCH] --- yaml --- r: 319661 b: refs/heads/master c: 63a78bb1051b240417daad3a3fa9c1bb10646dca h: refs/heads/master i: 319659: 859f4f98a15201b62808f548a0d5f090239f0c7a v: v3 --- [refs] | 2 +- .../ABI/stable/sysfs-bus-firewire | 11 - .../ABI/testing/sysfs-devices-edac | 140 - trunk/Documentation/DMA-attributes.txt | 42 - trunk/Documentation/device-mapper/striped.txt | 7 +- .../device-mapper/thin-provisioning.txt | 24 +- .../devicetree/bindings/arm/calxeda/l2ecc.txt | 15 - .../bindings/arm/calxeda/mem-ctrlr.txt | 14 - .../bindings/ata/cavium-compact-flash.txt | 30 - .../bindings/gpio/cavium-octeon-gpio.txt | 49 - .../{i2c/gpio-i2c.txt => gpio/gpio_i2c.txt} | 0 .../devicetree/bindings/i2c/cavium-i2c.txt | 34 - .../devicetree/bindings/i2c/i2c-mxs.txt | 3 - .../devicetree/bindings/i2c/i2c-ocores.txt | 33 - .../devicetree/bindings/i2c/mrvl-i2c.txt | 19 +- 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trunk/include/drm/drmP.h | 19 +- trunk/include/drm/drm_crtc.h | 2 + trunk/include/drm/drm_crtc_helper.h | 4 +- trunk/include/drm/drm_encoder_slave.h | 2 +- trunk/include/drm/drm_mm.h | 93 +- trunk/include/drm/drm_pciids.h | 42 + trunk/include/drm/exynos_drm.h | 9 + trunk/include/drm/i915_drm.h | 34 +- trunk/include/drm/intel-gtt.h | 8 - trunk/include/drm/nouveau_drm.h | 94 +- trunk/include/drm/sis_drm.h | 8 +- trunk/include/drm/ttm/ttm_bo_driver.h | 3 + trunk/include/linux/acpi.h | 40 +- trunk/include/linux/cpuidle.h | 11 - trunk/include/linux/cpumask.h | 15 +- trunk/include/linux/device-mapper.h | 29 +- trunk/include/linux/dm-ioctl.h | 6 +- trunk/include/linux/dma-attrs.h | 2 - trunk/include/linux/dma-mapping.h | 3 - trunk/include/linux/edac.h | 208 +- trunk/include/linux/firewire.h | 4 +- trunk/include/linux/highmem.h | 41 +- trunk/include/linux/i2c-ocores.h | 3 +- trunk/include/linux/init.h | 3 +- trunk/include/linux/input/edt-ft5x06.h | 24 - trunk/include/linux/key-type.h | 1 - trunk/include/linux/leds.h | 29 +- trunk/include/linux/libfdt.h | 8 - trunk/include/linux/libfdt_env.h | 13 - trunk/include/linux/mempolicy.h | 2 +- trunk/include/linux/mm_types.h | 11 +- trunk/include/linux/of.h | 16 - trunk/include/linux/pci_regs.h | 5 - trunk/include/linux/pipe_fs_i.h | 8 +- .../include/linux/platform_data/leds-lm3556.h | 50 - .../linux/platform_data/spear_thermal.h | 26 + trunk/include/linux/pwm.h | 117 - trunk/include/linux/pwm_backlight.h | 1 - trunk/include/linux/remoteproc.h | 20 +- trunk/include/linux/scatterlist.h | 4 - trunk/include/linux/serial_core.h | 3 +- trunk/include/linux/sizes.h | 47 - trunk/include/linux/slab.h | 24 - trunk/include/linux/slab_def.h | 12 +- trunk/include/linux/slub_def.h | 3 +- trunk/include/linux/thermal.h | 20 +- trunk/include/linux/vmalloc.h | 9 +- trunk/include/net/inet6_hashtables.h | 13 +- trunk/include/net/protocol.h | 2 - trunk/include/net/route.h | 19 +- trunk/include/ras/ras_event.h | 102 - trunk/init/Kconfig | 2 +- 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trunk/include/ras/ras_event.h delete mode 100644 trunk/lib/fdt.c delete mode 100644 trunk/lib/fdt_ro.c delete mode 100644 trunk/lib/fdt_rw.c delete mode 100644 trunk/lib/fdt_strerror.c delete mode 100644 trunk/lib/fdt_sw.c delete mode 100644 trunk/lib/fdt_wip.c delete mode 100644 trunk/mm/slab.h delete mode 100644 trunk/mm/slab_common.c delete mode 100644 trunk/scripts/coccinelle/iterators/use_after_iter.cocci delete mode 100644 trunk/scripts/coccinelle/misc/irqf_oneshot.cocci diff --git a/[refs] b/[refs] index 4a428ad18adc..e2bf50eccd40 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 287dc4b7642df15fa6b9f286c812e79138acd698 +refs/heads/master: 63a78bb1051b240417daad3a3fa9c1bb10646dca diff --git a/trunk/Documentation/ABI/stable/sysfs-bus-firewire b/trunk/Documentation/ABI/stable/sysfs-bus-firewire index 41e5a0cd1e3e..3d484e5dc846 100644 --- a/trunk/Documentation/ABI/stable/sysfs-bus-firewire +++ b/trunk/Documentation/ABI/stable/sysfs-bus-firewire @@ -39,17 +39,6 @@ Users: udev rules to set ownership and access permissions or ACLs of /dev/fw[0-9]+ character device files -What: /sys/bus/firewire/devices/fw[0-9]+/is_local -Date: July 2012 -KernelVersion: 3.6 -Contact: linux1394-devel@lists.sourceforge.net -Description: - IEEE 1394 node device attribute. - Read-only and immutable. -Values: 1: The sysfs entry represents a local node (a controller card). - 0: The sysfs entry represents a remote node. - - What: /sys/bus/firewire/devices/fw[0-9]+[.][0-9]+/ Date: May 2007 KernelVersion: 2.6.22 diff --git a/trunk/Documentation/ABI/testing/sysfs-devices-edac b/trunk/Documentation/ABI/testing/sysfs-devices-edac deleted file mode 100644 index 30ee78aaed75..000000000000 --- a/trunk/Documentation/ABI/testing/sysfs-devices-edac +++ /dev/null @@ -1,140 +0,0 @@ -What: /sys/devices/system/edac/mc/mc*/reset_counters -Date: January 2006 -Contact: linux-edac@vger.kernel.org -Description: This write-only control file will zero all the statistical - counters for UE and CE errors on the given memory controller. - Zeroing the counters will also reset the timer indicating how - long since the last counter were reset. This is useful for - computing errors/time. Since the counters are always reset - at driver initialization time, no module/kernel parameter - is available. - -What: /sys/devices/system/edac/mc/mc*/seconds_since_reset -Date: January 2006 -Contact: linux-edac@vger.kernel.org -Description: This attribute file displays how many seconds have elapsed - since the last counter reset. This can be used with the error - counters to measure error rates. - -What: /sys/devices/system/edac/mc/mc*/mc_name -Date: January 2006 -Contact: linux-edac@vger.kernel.org -Description: This attribute file displays the type of memory controller - that is being utilized. - -What: /sys/devices/system/edac/mc/mc*/size_mb -Date: January 2006 -Contact: linux-edac@vger.kernel.org -Description: This attribute file displays, in count of megabytes, of memory - that this memory controller manages. - -What: /sys/devices/system/edac/mc/mc*/ue_count -Date: January 2006 -Contact: linux-edac@vger.kernel.org -Description: This attribute file displays the total count of uncorrectable - errors that have occurred on this memory controller. If - panic_on_ue is set, this counter will not have a chance to - increment, since EDAC will panic the system - -What: /sys/devices/system/edac/mc/mc*/ue_noinfo_count -Date: January 2006 -Contact: linux-edac@vger.kernel.org -Description: This attribute file displays the number of UEs that have - occurred on this memory controller with no information as to - which DIMM slot is having errors. - -What: /sys/devices/system/edac/mc/mc*/ce_count -Date: January 2006 -Contact: linux-edac@vger.kernel.org -Description: This attribute file displays the total count of correctable - errors that have occurred on this memory controller. This - count is very important to examine. CEs provide early - indications that a DIMM is beginning to fail. This count - field should be monitored for non-zero values and report - such information to the system administrator. - -What: /sys/devices/system/edac/mc/mc*/ce_noinfo_count -Date: January 2006 -Contact: linux-edac@vger.kernel.org -Description: This attribute file displays the number of CEs that - have occurred on this memory controller wherewith no - information as to which DIMM slot is having errors. Memory is - handicapped, but operational, yet no information is available - to indicate which slot the failing memory is in. This count - field should be also be monitored for non-zero values. - -What: /sys/devices/system/edac/mc/mc*/sdram_scrub_rate -Date: February 2007 -Contact: linux-edac@vger.kernel.org -Description: Read/Write attribute file that controls memory scrubbing. - The scrubbing rate used by the memory controller is set by - writing a minimum bandwidth in bytes/sec to the attribute file. - The rate will be translated to an internal value that gives at - least the specified rate. - Reading the file will return the actual scrubbing rate employed. - If configuration fails or memory scrubbing is not implemented, - the value of the attribute file will be -1. - -What: /sys/devices/system/edac/mc/mc*/max_location -Date: April 2012 -Contact: Mauro Carvalho Chehab - linux-edac@vger.kernel.org -Description: This attribute file displays the information about the last - available memory slot in this memory controller. It is used by - userspace tools in order to display the memory filling layout. - -What: /sys/devices/system/edac/mc/mc*/(dimm|rank)*/size -Date: April 2012 -Contact: Mauro Carvalho Chehab - linux-edac@vger.kernel.org -Description: This attribute file will display the size of dimm or rank. - For dimm*/size, this is the size, in MB of the DIMM memory - stick. For rank*/size, this is the size, in MB for one rank - of the DIMM memory stick. On single rank memories (1R), this - is also the total size of the dimm. On dual rank (2R) memories, - this is half the size of the total DIMM memories. - -What: /sys/devices/system/edac/mc/mc*/(dimm|rank)*/dimm_dev_type -Date: April 2012 -Contact: Mauro Carvalho Chehab - linux-edac@vger.kernel.org -Description: This attribute file will display what type of DRAM device is - being utilized on this DIMM (x1, x2, x4, x8, ...). - -What: /sys/devices/system/edac/mc/mc*/(dimm|rank)*/dimm_edac_mode -Date: April 2012 -Contact: Mauro Carvalho Chehab - linux-edac@vger.kernel.org -Description: This attribute file will display what type of Error detection - and correction is being utilized. For example: S4ECD4ED would - mean a Chipkill with x4 DRAM. - -What: /sys/devices/system/edac/mc/mc*/(dimm|rank)*/dimm_label -Date: April 2012 -Contact: Mauro Carvalho Chehab - linux-edac@vger.kernel.org -Description: This control file allows this DIMM to have a label assigned - to it. With this label in the module, when errors occur - the output can provide the DIMM label in the system log. - This becomes vital for panic events to isolate the - cause of the UE event. - DIMM Labels must be assigned after booting, with information - that correctly identifies the physical slot with its - silk screen label. This information is currently very - motherboard specific and determination of this information - must occur in userland at this time. - -What: /sys/devices/system/edac/mc/mc*/(dimm|rank)*/dimm_location -Date: April 2012 -Contact: Mauro Carvalho Chehab - linux-edac@vger.kernel.org -Description: This attribute file will display the location (csrow/channel, - branch/channel/slot or channel/slot) of the dimm or rank. - -What: /sys/devices/system/edac/mc/mc*/(dimm|rank)*/dimm_mem_type -Date: April 2012 -Contact: Mauro Carvalho Chehab - linux-edac@vger.kernel.org -Description: This attribute file will display what type of memory is - currently on this csrow. Normally, either buffered or - unbuffered memory (for example, Unbuffered-DDR3). diff --git a/trunk/Documentation/DMA-attributes.txt b/trunk/Documentation/DMA-attributes.txt index f50309081ac7..5c72eed89563 100644 --- a/trunk/Documentation/DMA-attributes.txt +++ b/trunk/Documentation/DMA-attributes.txt @@ -49,45 +49,3 @@ DMA_ATTR_NON_CONSISTENT lets the platform to choose to return either consistent or non-consistent memory as it sees fit. By using this API, you are guaranteeing to the platform that you have all the correct and necessary sync points for this memory in the driver. - -DMA_ATTR_NO_KERNEL_MAPPING --------------------------- - -DMA_ATTR_NO_KERNEL_MAPPING lets the platform to avoid creating a kernel -virtual mapping for the allocated buffer. On some architectures creating -such mapping is non-trivial task and consumes very limited resources -(like kernel virtual address space or dma consistent address space). -Buffers allocated with this attribute can be only passed to user space -by calling dma_mmap_attrs(). By using this API, you are guaranteeing -that you won't dereference the pointer returned by dma_alloc_attr(). You -can threat it as a cookie that must be passed to dma_mmap_attrs() and -dma_free_attrs(). Make sure that both of these also get this attribute -set on each call. - -Since it is optional for platforms to implement -DMA_ATTR_NO_KERNEL_MAPPING, those that do not will simply ignore the -attribute and exhibit default behavior. - -DMA_ATTR_SKIP_CPU_SYNC ----------------------- - -By default dma_map_{single,page,sg} functions family transfer a given -buffer from CPU domain to device domain. Some advanced use cases might -require sharing a buffer between more than one device. This requires -having a mapping created separately for each device and is usually -performed by calling dma_map_{single,page,sg} function more than once -for the given buffer with device pointer to each device taking part in -the buffer sharing. The first call transfers a buffer from 'CPU' domain -to 'device' domain, what synchronizes CPU caches for the given region -(usually it means that the cache has been flushed or invalidated -depending on the dma direction). However, next calls to -dma_map_{single,page,sg}() for other devices will perform exactly the -same sychronization operation on the CPU cache. CPU cache sychronization -might be a time consuming operation, especially if the buffers are -large, so it is highly recommended to avoid it if possible. -DMA_ATTR_SKIP_CPU_SYNC allows platform code to skip synchronization of -the CPU cache for the given buffer assuming that it has been already -transferred to 'device' domain. This attribute can be also used for -dma_unmap_{single,page,sg} functions family to force buffer to stay in -device domain after releasing a mapping for it. Use this attribute with -care! diff --git a/trunk/Documentation/device-mapper/striped.txt b/trunk/Documentation/device-mapper/striped.txt index 45f3b91ea4c3..f34d3236b9da 100644 --- a/trunk/Documentation/device-mapper/striped.txt +++ b/trunk/Documentation/device-mapper/striped.txt @@ -9,14 +9,15 @@ devices in parallel. Parameters: [ ]+ : Number of underlying devices. - : Size of each chunk of data. Must be at least as - large as the system's PAGE_SIZE. + : Size of each chunk of data. Must be a power-of-2 and at + least as large as the system's PAGE_SIZE. : Full pathname to the underlying block-device, or a "major:minor" device-number. : Starting sector within the device. One or more underlying devices can be specified. The striped device size must -be a multiple of the chunk size multiplied by the number of underlying devices. +be a multiple of the chunk size and a multiple of the number of underlying +devices. Example scripts diff --git a/trunk/Documentation/device-mapper/thin-provisioning.txt b/trunk/Documentation/device-mapper/thin-provisioning.txt index 30b8b83bd333..f5cfc62b7ad3 100644 --- a/trunk/Documentation/device-mapper/thin-provisioning.txt +++ b/trunk/Documentation/device-mapper/thin-provisioning.txt @@ -231,9 +231,6 @@ i) Constructor no_discard_passdown: Don't pass discards down to the underlying data device, but just remove the mapping. - read_only: Don't allow any changes to be made to the pool - metadata. - Data block size must be between 64KB (128 sectors) and 1GB (2097152 sectors) inclusive. @@ -242,7 +239,7 @@ ii) Status / / - [no_]discard_passdown ro|rw + transaction id: A 64-bit number used by userspace to help synchronise with metadata @@ -260,21 +257,6 @@ ii) Status held root. This feature is not yet implemented so '-' is always returned. - discard_passdown|no_discard_passdown - Whether or not discards are actually being passed down to the - underlying device. When this is enabled when loading the table, - it can get disabled if the underlying device doesn't support it. - - ro|rw - If the pool encounters certain types of device failures it will - drop into a read-only metadata mode in which no changes to - the pool metadata (like allocating new blocks) are permitted. - - In serious cases where even a read-only mode is deemed unsafe - no further I/O will be permitted and the status will just - contain the string 'Fail'. The userspace recovery tools - should then be used. - iii) Messages create_thin @@ -347,7 +329,3 @@ regain some space then send the 'trim' message to the pool. ii) Status - - If the pool has encountered device errors and failed, the status - will just contain the string 'Fail'. The userspace recovery - tools should then be used. diff --git a/trunk/Documentation/devicetree/bindings/arm/calxeda/l2ecc.txt b/trunk/Documentation/devicetree/bindings/arm/calxeda/l2ecc.txt deleted file mode 100644 index 94e642a33db0..000000000000 --- a/trunk/Documentation/devicetree/bindings/arm/calxeda/l2ecc.txt +++ /dev/null @@ -1,15 +0,0 @@ -Calxeda Highbank L2 cache ECC - -Properties: -- compatible : Should be "calxeda,hb-sregs-l2-ecc" -- reg : Address and size for ECC error interrupt clear registers. -- interrupts : Should be single bit error interrupt, then double bit error - interrupt. - -Example: - - sregs@fff3c200 { - compatible = "calxeda,hb-sregs-l2-ecc"; - reg = <0xfff3c200 0x100>; - interrupts = <0 71 4 0 72 4>; - }; diff --git a/trunk/Documentation/devicetree/bindings/arm/calxeda/mem-ctrlr.txt b/trunk/Documentation/devicetree/bindings/arm/calxeda/mem-ctrlr.txt deleted file mode 100644 index f770ac0893d4..000000000000 --- a/trunk/Documentation/devicetree/bindings/arm/calxeda/mem-ctrlr.txt +++ /dev/null @@ -1,14 +0,0 @@ -Calxeda DDR memory controller - -Properties: -- compatible : Should be "calxeda,hb-ddr-ctrl" -- reg : Address and size for DDR controller registers. -- interrupts : Interrupt for DDR controller. - -Example: - - memory-controller@fff00000 { - compatible = "calxeda,hb-ddr-ctrl"; - reg = <0xfff00000 0x1000>; - interrupts = <0 91 4>; - }; diff --git a/trunk/Documentation/devicetree/bindings/ata/cavium-compact-flash.txt b/trunk/Documentation/devicetree/bindings/ata/cavium-compact-flash.txt deleted file mode 100644 index 93986a5a8018..000000000000 --- a/trunk/Documentation/devicetree/bindings/ata/cavium-compact-flash.txt +++ /dev/null @@ -1,30 +0,0 @@ -* Compact Flash - -The Cavium Compact Flash device is connected to the Octeon Boot Bus, -and is thus a child of the Boot Bus device. It can read and write -industry standard compact flash devices. - -Properties: -- compatible: "cavium,ebt3000-compact-flash"; - - Compatibility with many Cavium evaluation boards. - -- reg: The base address of the the CF chip select banks. Depending on - the device configuration, there may be one or two banks. - -- cavium,bus-width: The width of the connection to the CF devices. Valid - values are 8 and 16. - -- cavium,true-ide: Optional, if present the CF connection is in True IDE mode. - -- cavium,dma-engine-handle: Optional, a phandle for the DMA Engine connected - to this device. - -Example: - compact-flash@5,0 { - compatible = "cavium,ebt3000-compact-flash"; - reg = <5 0 0x10000>, <6 0 0x10000>; - cavium,bus-width = <16>; - cavium,true-ide; - cavium,dma-engine-handle = <&dma0>; - }; diff --git a/trunk/Documentation/devicetree/bindings/gpio/cavium-octeon-gpio.txt b/trunk/Documentation/devicetree/bindings/gpio/cavium-octeon-gpio.txt deleted file mode 100644 index 9d6dcd3fe7f9..000000000000 --- a/trunk/Documentation/devicetree/bindings/gpio/cavium-octeon-gpio.txt +++ /dev/null @@ -1,49 +0,0 @@ -* General Purpose Input Output (GPIO) bus. - -Properties: -- compatible: "cavium,octeon-3860-gpio" - - Compatibility with all cn3XXX, cn5XXX and cn6XXX SOCs. - -- reg: The base address of the GPIO unit's register bank. - -- gpio-controller: This is a GPIO controller. - -- #gpio-cells: Must be <2>. The first cell is the GPIO pin. - -- interrupt-controller: The GPIO controller is also an interrupt - controller, many of its pins may be configured as an interrupt - source. - -- #interrupt-cells: Must be <2>. The first cell is the GPIO pin - connected to the interrupt source. The second cell is the interrupt - triggering protocol and may have one of four values: - 1 - edge triggered on the rising edge. - 2 - edge triggered on the falling edge - 4 - level triggered active high. - 8 - level triggered active low. - -- interrupts: Interrupt routing for each pin. - -Example: - - gpio-controller@1070000000800 { - #gpio-cells = <2>; - compatible = "cavium,octeon-3860-gpio"; - reg = <0x10700 0x00000800 0x0 0x100>; - gpio-controller; - /* Interrupts are specified by two parts: - * 1) GPIO pin number (0..15) - * 2) Triggering (1 - edge rising - * 2 - edge falling - * 4 - level active high - * 8 - level active low) - */ - interrupt-controller; - #interrupt-cells = <2>; - /* The GPIO pin connect to 16 consecutive CUI bits */ - interrupts = <0 16>, <0 17>, <0 18>, <0 19>, - <0 20>, <0 21>, <0 22>, <0 23>, - <0 24>, <0 25>, <0 26>, <0 27>, - <0 28>, <0 29>, <0 30>, <0 31>; - }; diff --git a/trunk/Documentation/devicetree/bindings/i2c/gpio-i2c.txt b/trunk/Documentation/devicetree/bindings/gpio/gpio_i2c.txt similarity index 100% rename from trunk/Documentation/devicetree/bindings/i2c/gpio-i2c.txt rename to trunk/Documentation/devicetree/bindings/gpio/gpio_i2c.txt diff --git a/trunk/Documentation/devicetree/bindings/i2c/cavium-i2c.txt b/trunk/Documentation/devicetree/bindings/i2c/cavium-i2c.txt deleted file mode 100644 index dced82ebe31d..000000000000 --- a/trunk/Documentation/devicetree/bindings/i2c/cavium-i2c.txt +++ /dev/null @@ -1,34 +0,0 @@ -* Two Wire Serial Interface (TWSI) / I2C - -- compatible: "cavium,octeon-3860-twsi" - - Compatibility with all cn3XXX, cn5XXX and cn6XXX SOCs. - -- reg: The base address of the TWSI/I2C bus controller register bank. - -- #address-cells: Must be <1>. - -- #size-cells: Must be <0>. I2C addresses have no size component. - -- interrupts: A single interrupt specifier. - -- clock-frequency: The I2C bus clock rate in Hz. - -Example: - twsi0: i2c@1180000001000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "cavium,octeon-3860-twsi"; - reg = <0x11800 0x00001000 0x0 0x200>; - interrupts = <0 45>; - clock-frequency = <100000>; - - rtc@68 { - compatible = "dallas,ds1337"; - reg = <0x68>; - }; - tmp@4c { - compatible = "ti,tmp421"; - reg = <0x4c>; - }; - }; diff --git a/trunk/Documentation/devicetree/bindings/i2c/i2c-mxs.txt b/trunk/Documentation/devicetree/bindings/i2c/i2c-mxs.txt index 30ac3a0557f7..1bfc02de1b0c 100644 --- a/trunk/Documentation/devicetree/bindings/i2c/i2c-mxs.txt +++ b/trunk/Documentation/devicetree/bindings/i2c/i2c-mxs.txt @@ -4,8 +4,6 @@ Required properties: - compatible: Should be "fsl,-i2c" - reg: Should contain registers location and length - interrupts: Should contain ERROR and DMA interrupts -- clock-frequency: Desired I2C bus clock frequency in Hz. - Only 100000Hz and 400000Hz modes are supported. Examples: @@ -15,5 +13,4 @@ i2c0: i2c@80058000 { compatible = "fsl,imx28-i2c"; reg = <0x80058000 2000>; interrupts = <111 68>; - clock-frequency = <100000>; }; diff --git a/trunk/Documentation/devicetree/bindings/i2c/i2c-ocores.txt b/trunk/Documentation/devicetree/bindings/i2c/i2c-ocores.txt deleted file mode 100644 index c15781f4dc8c..000000000000 --- a/trunk/Documentation/devicetree/bindings/i2c/i2c-ocores.txt +++ /dev/null @@ -1,33 +0,0 @@ -Device tree configuration for i2c-ocores - -Required properties: -- compatible : "opencores,i2c-ocores" -- reg : bus address start and address range size of device -- interrupts : interrupt number -- clock-frequency : frequency of bus clock in Hz -- #address-cells : should be <1> -- #size-cells : should be <0> - -Optional properties: -- reg-shift : device register offsets are shifted by this value -- reg-io-width : io register width in bytes (1, 2 or 4) -- regstep : deprecated, use reg-shift above - -Example: - - i2c0: ocores@a0000000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "opencores,i2c-ocores"; - reg = <0xa0000000 0x8>; - interrupts = <10>; - clock-frequency = <20000000>; - - reg-shift = <0>; /* 8 bit registers */ - reg-io-width = <1>; /* 8 bit read/write */ - - dummy@60 { - compatible = "dummy"; - reg = <0x60>; - }; - }; diff --git a/trunk/Documentation/devicetree/bindings/i2c/mrvl-i2c.txt b/trunk/Documentation/devicetree/bindings/i2c/mrvl-i2c.txt index 0f7945019f6f..b891ee218354 100644 --- a/trunk/Documentation/devicetree/bindings/i2c/mrvl-i2c.txt +++ b/trunk/Documentation/devicetree/bindings/i2c/mrvl-i2c.txt @@ -1,4 +1,4 @@ -* Marvell MMP I2C controller +* I2C Required properties : @@ -32,20 +32,3 @@ Examples: interrupts = <58>; }; -* Marvell MV64XXX I2C controller - -Required properties : - - - reg : Offset and length of the register set for the device - - compatible : Should be "marvell,mv64xxx-i2c" - - interrupts : The interrupt number - - clock-frequency : Desired I2C bus clock frequency in Hz. - -Examples: - - i2c@11000 { - compatible = "marvell,mv64xxx-i2c"; - reg = <0x11000 0x20>; - interrupts = <29>; - clock-frequency = <100000>; - }; diff --git a/trunk/Documentation/devicetree/bindings/mips/cavium/bootbus.txt b/trunk/Documentation/devicetree/bindings/mips/cavium/bootbus.txt deleted file mode 100644 index 6581478225a2..000000000000 --- a/trunk/Documentation/devicetree/bindings/mips/cavium/bootbus.txt +++ /dev/null @@ -1,126 +0,0 @@ -* Boot Bus - -The Octeon Boot Bus is a configurable parallel bus with 8 chip -selects. Each chip select is independently configurable. - -Properties: -- compatible: "cavium,octeon-3860-bootbus" - - Compatibility with all cn3XXX, cn5XXX and cn6XXX SOCs. - -- reg: The base address of the Boot Bus' register bank. - -- #address-cells: Must be <2>. The first cell is the chip select - within the bootbus. The second cell is the offset from the chip select. - -- #size-cells: Must be <1>. - -- ranges: There must be one one triplet of (child-bus-address, - parent-bus-address, length) for each active chip select. If the - length element for any triplet is zero, the chip select is disabled, - making it inactive. - -The configuration parameters for each chip select are stored in child -nodes. - -Configuration Properties: -- compatible: "cavium,octeon-3860-bootbus-config" - -- cavium,cs-index: A single cell indicating the chip select that - corresponds to this configuration. - -- cavium,t-adr: A cell specifying the ADR timing (in nS). - -- cavium,t-ce: A cell specifying the CE timing (in nS). - -- cavium,t-oe: A cell specifying the OE timing (in nS). - -- cavium,t-we: A cell specifying the WE timing (in nS). - -- cavium,t-rd-hld: A cell specifying the RD_HLD timing (in nS). - -- cavium,t-wr-hld: A cell specifying the WR_HLD timing (in nS). - -- cavium,t-pause: A cell specifying the PAUSE timing (in nS). - -- cavium,t-wait: A cell specifying the WAIT timing (in nS). - -- cavium,t-page: A cell specifying the PAGE timing (in nS). - -- cavium,t-rd-dly: A cell specifying the RD_DLY timing (in nS). - -- cavium,pages: A cell specifying the PAGES parameter (0 = 8 bytes, 1 - = 2 bytes, 2 = 4 bytes, 3 = 8 bytes). - -- cavium,wait-mode: Optional. If present, wait mode (WAITM) is selected. - -- cavium,page-mode: Optional. If present, page mode (PAGEM) is selected. - -- cavium,bus-width: A cell specifying the WIDTH parameter (in bits) of - the bus for this chip select. - -- cavium,ale-mode: Optional. If present, ALE mode is selected. - -- cavium,sam-mode: Optional. If present, SAM mode is selected. - -- cavium,or-mode: Optional. If present, OR mode is selected. - -Example: - bootbus: bootbus@1180000000000 { - compatible = "cavium,octeon-3860-bootbus"; - reg = <0x11800 0x00000000 0x0 0x200>; - /* The chip select number and offset */ - #address-cells = <2>; - /* The size of the chip select region */ - #size-cells = <1>; - ranges = <0 0 0x0 0x1f400000 0xc00000>, - <1 0 0x10000 0x30000000 0>, - <2 0 0x10000 0x40000000 0>, - <3 0 0x10000 0x50000000 0>, - <4 0 0x0 0x1d020000 0x10000>, - <5 0 0x0 0x1d040000 0x10000>, - <6 0 0x0 0x1d050000 0x10000>, - <7 0 0x10000 0x90000000 0>; - - cavium,cs-config@0 { - compatible = "cavium,octeon-3860-bootbus-config"; - cavium,cs-index = <0>; - cavium,t-adr = <20>; - cavium,t-ce = <60>; - cavium,t-oe = <60>; - cavium,t-we = <45>; - cavium,t-rd-hld = <35>; - cavium,t-wr-hld = <45>; - cavium,t-pause = <0>; - cavium,t-wait = <0>; - cavium,t-page = <35>; - cavium,t-rd-dly = <0>; - - cavium,pages = <0>; - cavium,bus-width = <8>; - }; - . - . - . - cavium,cs-config@6 { - compatible = "cavium,octeon-3860-bootbus-config"; - cavium,cs-index = <6>; - cavium,t-adr = <5>; - cavium,t-ce = <300>; - cavium,t-oe = <270>; - cavium,t-we = <150>; - cavium,t-rd-hld = <100>; - cavium,t-wr-hld = <70>; - cavium,t-pause = <0>; - cavium,t-wait = <0>; - cavium,t-page = <320>; - cavium,t-rd-dly = <0>; - - cavium,pages = <0>; - cavium,wait-mode; - cavium,bus-width = <16>; - }; - . - . - . - }; diff --git a/trunk/Documentation/devicetree/bindings/mips/cavium/ciu.txt b/trunk/Documentation/devicetree/bindings/mips/cavium/ciu.txt deleted file mode 100644 index 2c2d0746b43d..000000000000 --- a/trunk/Documentation/devicetree/bindings/mips/cavium/ciu.txt +++ /dev/null @@ -1,26 +0,0 @@ -* Central Interrupt Unit - -Properties: -- compatible: "cavium,octeon-3860-ciu" - - Compatibility with all cn3XXX, cn5XXX and cn63XX SOCs. - -- interrupt-controller: This is an interrupt controller. - -- reg: The base address of the CIU's register bank. - -- #interrupt-cells: Must be <2>. The first cell is the bank within - the CIU and may have a value of 0 or 1. The second cell is the bit - within the bank and may have a value between 0 and 63. - -Example: - interrupt-controller@1070000000000 { - compatible = "cavium,octeon-3860-ciu"; - interrupt-controller; - /* Interrupts are specified by two parts: - * 1) Controller register (0 or 1) - * 2) Bit within the register (0..63) - */ - #interrupt-cells = <2>; - reg = <0x10700 0x00000000 0x0 0x7000>; - }; diff --git a/trunk/Documentation/devicetree/bindings/mips/cavium/ciu2.txt b/trunk/Documentation/devicetree/bindings/mips/cavium/ciu2.txt deleted file mode 100644 index 0ec7ba8bbbcb..000000000000 --- a/trunk/Documentation/devicetree/bindings/mips/cavium/ciu2.txt +++ /dev/null @@ -1,27 +0,0 @@ -* Central Interrupt Unit - -Properties: -- compatible: "cavium,octeon-6880-ciu2" - - Compatibility with 68XX SOCs. - -- interrupt-controller: This is an interrupt controller. - -- reg: The base address of the CIU's register bank. - -- #interrupt-cells: Must be <2>. The first cell is the bank within - the CIU and may have a value between 0 and 63. The second cell is - the bit within the bank and may also have a value between 0 and 63. - -Example: - interrupt-controller@1070100000000 { - compatible = "cavium,octeon-6880-ciu2"; - interrupt-controller; - /* Interrupts are specified by two parts: - * 1) Controller register (0..63) - * 2) Bit within the register (0..63) - */ - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x10701 0x00000000 0x0 0x4000000>; - }; diff --git a/trunk/Documentation/devicetree/bindings/mips/cavium/dma-engine.txt b/trunk/Documentation/devicetree/bindings/mips/cavium/dma-engine.txt deleted file mode 100644 index cb4291e3b1d1..000000000000 --- a/trunk/Documentation/devicetree/bindings/mips/cavium/dma-engine.txt +++ /dev/null @@ -1,21 +0,0 @@ -* DMA Engine. - -The Octeon DMA Engine transfers between the Boot Bus and main memory. -The DMA Engine will be refered to by phandle by any device that is -connected to it. - -Properties: -- compatible: "cavium,octeon-5750-bootbus-dma" - - Compatibility with all cn52XX, cn56XX and cn6XXX SOCs. - -- reg: The base address of the DMA Engine's register bank. - -- interrupts: A single interrupt specifier. - -Example: - dma0: dma-engine@1180000000100 { - compatible = "cavium,octeon-5750-bootbus-dma"; - reg = <0x11800 0x00000100 0x0 0x8>; - interrupts = <0 63>; - }; diff --git a/trunk/Documentation/devicetree/bindings/mips/cavium/uctl.txt b/trunk/Documentation/devicetree/bindings/mips/cavium/uctl.txt deleted file mode 100644 index aa66b9b8d801..000000000000 --- a/trunk/Documentation/devicetree/bindings/mips/cavium/uctl.txt +++ /dev/null @@ -1,46 +0,0 @@ -* UCTL USB controller glue - -Properties: -- compatible: "cavium,octeon-6335-uctl" - - Compatibility with all cn6XXX SOCs. - -- reg: The base address of the UCTL register bank. - -- #address-cells: Must be <2>. - -- #size-cells: Must be <2>. - -- ranges: Empty to signify direct mapping of the children. - -- refclk-frequency: A single cell containing the reference clock - frequency in Hz. - -- refclk-type: A string describing the reference clock connection - either "crystal" or "external". - -Example: - uctl@118006f000000 { - compatible = "cavium,octeon-6335-uctl"; - reg = <0x11800 0x6f000000 0x0 0x100>; - ranges; /* Direct mapping */ - #address-cells = <2>; - #size-cells = <2>; - /* 12MHz, 24MHz and 48MHz allowed */ - refclk-frequency = <24000000>; - /* Either "crystal" or "external" */ - refclk-type = "crystal"; - - ehci@16f0000000000 { - compatible = "cavium,octeon-6335-ehci","usb-ehci"; - reg = <0x16f00 0x00000000 0x0 0x100>; - interrupts = <0 56>; - big-endian-regs; - }; - ohci@16f0000000400 { - compatible = "cavium,octeon-6335-ohci","usb-ohci"; - reg = <0x16f00 0x00000400 0x0 0x100>; - interrupts = <0 56>; - big-endian-regs; - }; - }; diff --git a/trunk/Documentation/devicetree/bindings/mtd/orion-nand.txt b/trunk/Documentation/devicetree/bindings/mtd/orion-nand.txt index 2d6ab660e603..b2356b7d2fa4 100644 --- a/trunk/Documentation/devicetree/bindings/mtd/orion-nand.txt +++ b/trunk/Documentation/devicetree/bindings/mtd/orion-nand.txt @@ -1,7 +1,7 @@ NAND support for Marvell Orion SoC platforms Required properties: -- compatible : "marvell,orion-nand". +- compatible : "mrvl,orion-nand". - reg : Base physical address of the NAND and length of memory mapped region @@ -24,7 +24,7 @@ nand@f4000000 { ale = <1>; bank-width = <1>; chip-delay = <25>; - compatible = "marvell,orion-nand"; + compatible = "mrvl,orion-nand"; reg = <0xf4000000 0x400>; partition@0 { diff --git a/trunk/Documentation/devicetree/bindings/net/cavium-mdio.txt b/trunk/Documentation/devicetree/bindings/net/cavium-mdio.txt deleted file mode 100644 index 04cb7491d232..000000000000 --- a/trunk/Documentation/devicetree/bindings/net/cavium-mdio.txt +++ /dev/null @@ -1,27 +0,0 @@ -* System Management Interface (SMI) / MDIO - -Properties: -- compatible: "cavium,octeon-3860-mdio" - - Compatibility with all cn3XXX, cn5XXX and cn6XXX SOCs. - -- reg: The base address of the MDIO bus controller register bank. - -- #address-cells: Must be <1>. - -- #size-cells: Must be <0>. MDIO addresses have no size component. - -Typically an MDIO bus might have several children. - -Example: - mdio@1180000001800 { - compatible = "cavium,octeon-3860-mdio"; - #address-cells = <1>; - #size-cells = <0>; - reg = <0x11800 0x00001800 0x0 0x40>; - - ethernet-phy@0 { - ... - reg = <0>; - }; - }; diff --git a/trunk/Documentation/devicetree/bindings/net/cavium-mix.txt b/trunk/Documentation/devicetree/bindings/net/cavium-mix.txt deleted file mode 100644 index 5da628db68bf..000000000000 --- a/trunk/Documentation/devicetree/bindings/net/cavium-mix.txt +++ /dev/null @@ -1,39 +0,0 @@ -* MIX Ethernet controller. - -Properties: -- compatible: "cavium,octeon-5750-mix" - - Compatibility with all cn5XXX and cn6XXX SOCs populated with MIX - devices. - -- reg: The base addresses of four separate register banks. The first - bank contains the MIX registers. The second bank the corresponding - AGL registers. The third bank are the AGL registers shared by all - MIX devices present. The fourth bank is the AGL_PRT_CTL shared by - all MIX devices present. - -- cell-index: A single cell specifying which portion of the shared - register banks corresponds to this MIX device. - -- interrupts: Two interrupt specifiers. The first is the MIX - interrupt routing and the second the routing for the AGL interrupts. - -- mac-address: Optional, the MAC address to assign to the device. - -- local-mac-address: Optional, the MAC address to assign to the device - if mac-address is not specified. - -- phy-handle: Optional, a phandle for the PHY device connected to this device. - -Example: - ethernet@1070000100800 { - compatible = "cavium,octeon-5750-mix"; - reg = <0x10700 0x00100800 0x0 0x100>, /* MIX */ - <0x11800 0xE0000800 0x0 0x300>, /* AGL */ - <0x11800 0xE0000400 0x0 0x400>, /* AGL_SHARED */ - <0x11800 0xE0002008 0x0 0x8>; /* AGL_PRT_CTL */ - cell-index = <1>; - interrupts = <1 18>, < 1 46>; - local-mac-address = [ 00 0f b7 10 63 54 ]; - phy-handle = <&phy1>; - }; diff --git a/trunk/Documentation/devicetree/bindings/net/cavium-pip.txt b/trunk/Documentation/devicetree/bindings/net/cavium-pip.txt deleted file mode 100644 index d4c53ba04b3b..000000000000 --- a/trunk/Documentation/devicetree/bindings/net/cavium-pip.txt +++ /dev/null @@ -1,98 +0,0 @@ -* PIP Ethernet nexus. - -The PIP Ethernet nexus can control several data packet input/output -devices. The devices have a two level grouping scheme. There may be -several interfaces, and each interface may have several ports. These -ports might be an individual Ethernet PHY. - - -Properties for the PIP nexus: -- compatible: "cavium,octeon-3860-pip" - - Compatibility with all cn3XXX, cn5XXX and cn6XXX SOCs. - -- reg: The base address of the PIP's register bank. - -- #address-cells: Must be <1>. - -- #size-cells: Must be <0>. - -Properties for PIP interfaces which is a child the PIP nexus: -- compatible: "cavium,octeon-3860-pip-interface" - - Compatibility with all cn3XXX, cn5XXX and cn6XXX SOCs. - -- reg: The interface number. - -- #address-cells: Must be <1>. - -- #size-cells: Must be <0>. - -Properties for PIP port which is a child the PIP interface: -- compatible: "cavium,octeon-3860-pip-port" - - Compatibility with all cn3XXX, cn5XXX and cn6XXX SOCs. - -- reg: The port number within the interface group. - -- mac-address: Optional, the MAC address to assign to the device. - -- local-mac-address: Optional, the MAC address to assign to the device - if mac-address is not specified. - -- phy-handle: Optional, a phandle for the PHY device connected to this device. - -Example: - - pip@11800a0000000 { - compatible = "cavium,octeon-3860-pip"; - #address-cells = <1>; - #size-cells = <0>; - reg = <0x11800 0xa0000000 0x0 0x2000>; - - interface@0 { - compatible = "cavium,octeon-3860-pip-interface"; - #address-cells = <1>; - #size-cells = <0>; - reg = <0>; /* interface */ - - ethernet@0 { - compatible = "cavium,octeon-3860-pip-port"; - reg = <0x0>; /* Port */ - local-mac-address = [ 00 0f b7 10 63 60 ]; - phy-handle = <&phy2>; - }; - ethernet@1 { - compatible = "cavium,octeon-3860-pip-port"; - reg = <0x1>; /* Port */ - local-mac-address = [ 00 0f b7 10 63 61 ]; - phy-handle = <&phy3>; - }; - ethernet@2 { - compatible = "cavium,octeon-3860-pip-port"; - reg = <0x2>; /* Port */ - local-mac-address = [ 00 0f b7 10 63 62 ]; - phy-handle = <&phy4>; - }; - ethernet@3 { - compatible = "cavium,octeon-3860-pip-port"; - reg = <0x3>; /* Port */ - local-mac-address = [ 00 0f b7 10 63 63 ]; - phy-handle = <&phy5>; - }; - }; - - interface@1 { - compatible = "cavium,octeon-3860-pip-interface"; - #address-cells = <1>; - #size-cells = <0>; - reg = <1>; /* interface */ - - ethernet@0 { - compatible = "cavium,octeon-3860-pip-port"; - reg = <0x0>; /* Port */ - local-mac-address = [ 00 0f b7 10 63 64 ]; - phy-handle = <&phy6>; - }; - }; - }; diff --git a/trunk/Documentation/devicetree/bindings/pwm/lpc32xx-pwm.txt b/trunk/Documentation/devicetree/bindings/pwm/lpc32xx-pwm.txt deleted file mode 100644 index cfe1db3bb6e9..000000000000 --- a/trunk/Documentation/devicetree/bindings/pwm/lpc32xx-pwm.txt +++ /dev/null @@ -1,12 +0,0 @@ -LPC32XX PWM controller - -Required properties: -- compatible: should be "nxp,lpc3220-pwm" -- reg: physical base address and length of the controller's registers - -Examples: - -pwm@0x4005C000 { - compatible = "nxp,lpc3220-pwm"; - reg = <0x4005C000 0x8>; -}; diff --git a/trunk/Documentation/devicetree/bindings/pwm/mxs-pwm.txt b/trunk/Documentation/devicetree/bindings/pwm/mxs-pwm.txt deleted file mode 100644 index b16f4a57d111..000000000000 --- a/trunk/Documentation/devicetree/bindings/pwm/mxs-pwm.txt +++ /dev/null @@ -1,17 +0,0 @@ -Freescale MXS PWM controller - -Required properties: -- compatible: should be "fsl,imx23-pwm" -- reg: physical base address and length of the controller's registers -- #pwm-cells: should be 2. The first cell specifies the per-chip index - of the PWM to use and the second cell is the duty cycle in nanoseconds. -- fsl,pwm-number: the number of PWM devices - -Example: - -pwm: pwm@80064000 { - compatible = "fsl,imx28-pwm", "fsl,imx23-pwm"; - reg = <0x80064000 2000>; - #pwm-cells = <2>; - fsl,pwm-number = <8>; -}; diff --git a/trunk/Documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.txt b/trunk/Documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.txt deleted file mode 100644 index bbbeedb4ec05..000000000000 --- a/trunk/Documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.txt +++ /dev/null @@ -1,18 +0,0 @@ -Tegra SoC PWFM controller - -Required properties: -- compatible: should be one of: - - "nvidia,tegra20-pwm" - - "nvidia,tegra30-pwm" -- reg: physical base address and length of the controller's registers -- #pwm-cells: On Tegra the number of cells used to specify a PWM is 2. The - first cell specifies the per-chip index of the PWM to use and the second - cell is the duty cycle in nanoseconds. - -Example: - - pwm: pwm@7000a000 { - compatible = "nvidia,tegra20-pwm"; - reg = <0x7000a000 0x100>; - #pwm-cells = <2>; - }; diff --git a/trunk/Documentation/devicetree/bindings/pwm/pwm.txt b/trunk/Documentation/devicetree/bindings/pwm/pwm.txt deleted file mode 100644 index 73ec962bfe8c..000000000000 --- a/trunk/Documentation/devicetree/bindings/pwm/pwm.txt +++ /dev/null @@ -1,57 +0,0 @@ -Specifying PWM information for devices -====================================== - -1) PWM user nodes ------------------ - -PWM users should specify a list of PWM devices that they want to use -with a property containing a 'pwm-list': - - pwm-list ::= [pwm-list] - single-pwm ::= - pwm-phandle : phandle to PWM controller node - pwm-specifier : array of #pwm-cells specifying the given PWM - (controller specific) - -PWM properties should be named "pwms". The exact meaning of each pwms -property must be documented in the device tree binding for each device. -An optional property "pwm-names" may contain a list of strings to label -each of the PWM devices listed in the "pwms" property. If no "pwm-names" -property is given, the name of the user node will be used as fallback. - -Drivers for devices that use more than a single PWM device can use the -"pwm-names" property to map the name of the PWM device requested by the -pwm_get() call to an index into the list given by the "pwms" property. - -The following example could be used to describe a PWM-based backlight -device: - - pwm: pwm { - #pwm-cells = <2>; - }; - - [...] - - bl: backlight { - pwms = <&pwm 0 5000000>; - pwm-names = "backlight"; - }; - -pwm-specifier typically encodes the chip-relative PWM number and the PWM -period in nanoseconds. Note that in the example above, specifying the -"pwm-names" is redundant because the name "backlight" would be used as -fallback anyway. - -2) PWM controller nodes ------------------------ - -PWM controller nodes must specify the number of cells used for the -specifier using the '#pwm-cells' property. - -An example PWM controller might look like this: - - pwm: pwm@7000a000 { - compatible = "nvidia,tegra20-pwm"; - reg = <0x7000a000 0x100>; - #pwm-cells = <2>; - }; diff --git a/trunk/Documentation/devicetree/bindings/serial/cavium-uart.txt b/trunk/Documentation/devicetree/bindings/serial/cavium-uart.txt deleted file mode 100644 index 87a6c375cd44..000000000000 --- a/trunk/Documentation/devicetree/bindings/serial/cavium-uart.txt +++ /dev/null @@ -1,19 +0,0 @@ -* Universal Asynchronous Receiver/Transmitter (UART) - -- compatible: "cavium,octeon-3860-uart" - - Compatibility with all cn3XXX, cn5XXX and cn6XXX SOCs. - -- reg: The base address of the UART register bank. - -- interrupts: A single interrupt specifier. - -- current-speed: Optional, the current bit rate in bits per second. - -Example: - uart1: serial@1180000000c00 { - compatible = "cavium,octeon-3860-uart","ns16550"; - reg = <0x11800 0x00000c00 0x0 0x400>; - current-speed = <115200>; - interrupts = <0 35>; - }; diff --git a/trunk/Documentation/devicetree/bindings/thermal/spear-thermal.txt b/trunk/Documentation/devicetree/bindings/thermal/spear-thermal.txt deleted file mode 100644 index 93e3b67c102d..000000000000 --- a/trunk/Documentation/devicetree/bindings/thermal/spear-thermal.txt +++ /dev/null @@ -1,14 +0,0 @@ -* SPEAr Thermal - -Required properties: -- compatible : "st,thermal-spear1340" -- reg : Address range of the thermal registers -- st,thermal-flags: flags used to enable thermal sensor - -Example: - - thermal@fc000000 { - compatible = "st,thermal-spear1340"; - reg = <0xfc000000 0x1000>; - st,thermal-flags = <0x7000>; - }; diff --git a/trunk/Documentation/devicetree/bindings/tty/serial/of-serial.txt b/trunk/Documentation/devicetree/bindings/tty/serial/of-serial.txt index 0847fdeee11a..b8b27b0aca10 100644 --- a/trunk/Documentation/devicetree/bindings/tty/serial/of-serial.txt +++ b/trunk/Documentation/devicetree/bindings/tty/serial/of-serial.txt @@ -9,7 +9,6 @@ Required properties: - "ns16750" - "ns16850" - "nvidia,tegra20-uart" - - "nxp,lpc3220-uart" - "ibm,qpace-nwp-serial" - "serial" if the port type is unknown. - reg : offset and length of the register set for the device. diff --git a/trunk/Documentation/devicetree/bindings/video/backlight/pwm-backlight.txt b/trunk/Documentation/devicetree/bindings/video/backlight/pwm-backlight.txt deleted file mode 100644 index 1e4fc727f3b1..000000000000 --- a/trunk/Documentation/devicetree/bindings/video/backlight/pwm-backlight.txt +++ /dev/null @@ -1,28 +0,0 @@ -pwm-backlight bindings - -Required properties: - - compatible: "pwm-backlight" - - pwms: OF device-tree PWM specification (see PWM binding[0]) - - brightness-levels: Array of distinct brightness levels. Typically these - are in the range from 0 to 255, but any range starting at 0 will do. - The actual brightness level (PWM duty cycle) will be interpolated - from these values. 0 means a 0% duty cycle (darkest/off), while the - last value in the array represents a 100% duty cycle (brightest). - - default-brightness-level: the default brightness level (index into the - array defined by the "brightness-levels" property) - -Optional properties: - - pwm-names: a list of names for the PWM devices specified in the - "pwms" property (see PWM binding[0]) - -[0]: Documentation/devicetree/bindings/pwm/pwm.txt - -Example: - - backlight { - compatible = "pwm-backlight"; - pwms = <&pwm 0 5000000>; - - brightness-levels = <0 4 8 16 32 64 128 255>; - default-brightness-level = <6>; - }; diff --git a/trunk/Documentation/dontdiff b/trunk/Documentation/dontdiff index 39462cf35cd4..b4a898f43c37 100644 --- a/trunk/Documentation/dontdiff +++ b/trunk/Documentation/dontdiff @@ -150,6 +150,7 @@ keywords.c ksym.c* ksym.h* kxgettext +lkc_defs.h lex.c lex.*.c linux diff --git a/trunk/Documentation/edac.txt b/trunk/Documentation/edac.txt index 56c7e936430f..03df2b020332 100644 --- a/trunk/Documentation/edac.txt +++ b/trunk/Documentation/edac.txt @@ -232,20 +232,116 @@ EDAC control and attribute files. In 'mcX' directories are EDAC control and attribute files for -this 'X' instance of the memory controllers. +this 'X' instance of the memory controllers: + + +Counter reset control file: + + 'reset_counters' + + This write-only control file will zero all the statistical counters + for UE and CE errors. Zeroing the counters will also reset the timer + indicating how long since the last counter zero. This is useful + for computing errors/time. Since the counters are always reset at + driver initialization time, no module/kernel parameter is available. + + RUN TIME: echo "anything" >/sys/devices/system/edac/mc/mc0/counter_reset + + This resets the counters on memory controller 0 + + +Seconds since last counter reset control file: + + 'seconds_since_reset' + + This attribute file displays how many seconds have elapsed since the + last counter reset. This can be used with the error counters to + measure error rates. + + + +Memory Controller name attribute file: + + 'mc_name' + + This attribute file displays the type of memory controller + that is being utilized. + + +Total memory managed by this memory controller attribute file: + + 'size_mb' + + This attribute file displays, in count of megabytes, of memory + that this instance of memory controller manages. + + +Total Uncorrectable Errors count attribute file: + + 'ue_count' + + This attribute file displays the total count of uncorrectable + errors that have occurred on this memory controller. If panic_on_ue + is set this counter will not have a chance to increment, + since EDAC will panic the system. + + +Total UE count that had no information attribute fileY: + + 'ue_noinfo_count' + + This attribute file displays the number of UEs that have occurred + with no information as to which DIMM slot is having errors. + + +Total Correctable Errors count attribute file: + + 'ce_count' + + This attribute file displays the total count of correctable + errors that have occurred on this memory controller. This + count is very important to examine. CEs provide early + indications that a DIMM is beginning to fail. This count + field should be monitored for non-zero values and report + such information to the system administrator. + + +Total Correctable Errors count attribute file: + + 'ce_noinfo_count' + + This attribute file displays the number of CEs that + have occurred wherewith no information as to which DIMM slot + is having errors. Memory is handicapped, but operational, + yet no information is available to indicate which slot + the failing memory is in. This count field should be also + be monitored for non-zero values. + +Device Symlink: + + 'device' + + Symlink to the memory controller device. + +Sdram memory scrubbing rate: + + 'sdram_scrub_rate' + + Read/Write attribute file that controls memory scrubbing. The scrubbing + rate is set by writing a minimum bandwidth in bytes/sec to the attribute + file. The rate will be translated to an internal value that gives at + least the specified rate. + + Reading the file will return the actual scrubbing rate employed. + + If configuration fails or memory scrubbing is not implemented, accessing + that attribute will fail. -For a description of the sysfs API, please see: - Documentation/ABI/testing/sysfs/devices-edac ============================================================================ 'csrowX' DIRECTORIES -When CONFIG_EDAC_LEGACY_SYSFS is enabled, the sysfs will contain the -csrowX directories. As this API doesn't work properly for Rambus, FB-DIMMs -and modern Intel Memory Controllers, this is being deprecated in favor -of dimmX directories. - In the 'csrowX' directories are EDAC control and attribute files for this 'X' instance of csrow: diff --git a/trunk/Documentation/feature-removal-schedule.txt b/trunk/Documentation/feature-removal-schedule.txt index 76112dac7659..61d1a89baeaf 100644 --- a/trunk/Documentation/feature-removal-schedule.txt +++ b/trunk/Documentation/feature-removal-schedule.txt @@ -512,6 +512,14 @@ Who: Sebastian Andrzej Siewior ---------------------------- +What: kmap_atomic(page, km_type) +When: 3.5 +Why: The old kmap_atomic() with two arguments is deprecated, we only + keep it for backward compatibility for few cycles and then drop it. +Who: Cong Wang + +---------------------------- + What: get_robust_list syscall When: 2013 Why: There appear to be no production users of the get_robust_list syscall, diff --git a/trunk/Documentation/input/edt-ft5x06.txt b/trunk/Documentation/input/edt-ft5x06.txt deleted file mode 100644 index 2032f0b7a8fa..000000000000 --- a/trunk/Documentation/input/edt-ft5x06.txt +++ /dev/null @@ -1,54 +0,0 @@ -EDT ft5x06 based Polytouch devices ----------------------------------- - -The edt-ft5x06 driver is useful for the EDT "Polytouch" family of capacitive -touch screens. Note that it is *not* suitable for other devices based on the -focaltec ft5x06 devices, since they contain vendor-specific firmware. In -particular this driver is not suitable for the Nook tablet. - -It has been tested with the following devices: - * EP0350M06 - * EP0430M06 - * EP0570M06 - * EP0700M06 - -The driver allows configuration of the touch screen via a set of sysfs files: - -/sys/class/input/eventX/device/device/threshold: - allows setting the "click"-threshold in the range from 20 to 80. - -/sys/class/input/eventX/device/device/gain: - allows setting the sensitivity in the range from 0 to 31. Note that - lower values indicate higher sensitivity. - -/sys/class/input/eventX/device/device/offset: - allows setting the edge compensation in the range from 0 to 31. - -/sys/class/input/eventX/device/device/report_rate: - allows setting the report rate in the range from 3 to 14. - - -For debugging purposes the driver provides a few files in the debug -filesystem (if available in the kernel). In /sys/kernel/debug/edt_ft5x06 -you'll find the following files: - -num_x, num_y: - (readonly) contains the number of sensor fields in X- and - Y-direction. - -mode: - allows switching the sensor between "factory mode" and "operation - mode" by writing "1" or "0" to it. In factory mode (1) it is - possible to get the raw data from the sensor. Note that in factory - mode regular events don't get delivered and the options described - above are unavailable. - -raw_data: - contains num_x * num_y big endian 16 bit values describing the raw - values for each sensor field. Note that each read() call on this - files triggers a new readout. It is recommended to provide a buffer - big enough to contain num_x * num_y * 2 bytes. - -Note that reading raw_data gives a I/O error when the device is not in factory -mode. The same happens when reading/writing to the parameter files when the -device is not in regular operation mode. diff --git a/trunk/Documentation/kernel-parameters.txt b/trunk/Documentation/kernel-parameters.txt index ad7e2e5088c1..c2619ef44a72 100644 --- a/trunk/Documentation/kernel-parameters.txt +++ b/trunk/Documentation/kernel-parameters.txt @@ -526,7 +526,7 @@ bytes respectively. Such letter suffixes can also be entirely omitted. coherent_pool=nn[KMG] [ARM,KNL] Sets the size of memory pool for coherent, atomic dma - allocations, by default set to 256K. + allocations if Contiguous Memory Allocator (CMA) is used. code_bytes [X86] How many bytes of object code to print in an oops report. diff --git a/trunk/Documentation/leds/00-INDEX b/trunk/Documentation/leds/00-INDEX index 5fefe374892f..29f481df32c7 100644 --- a/trunk/Documentation/leds/00-INDEX +++ b/trunk/Documentation/leds/00-INDEX @@ -6,5 +6,3 @@ leds-lp5521.txt - notes on how to use the leds-lp5521 driver. leds-lp5523.txt - notes on how to use the leds-lp5523 driver. -leds-lm3556.txt - - notes on how to use the leds-lm3556 driver. diff --git a/trunk/Documentation/leds/leds-blinkm.txt b/trunk/Documentation/leds/leds-blinkm.txt deleted file mode 100644 index 9dd92f4cf4e1..000000000000 --- a/trunk/Documentation/leds/leds-blinkm.txt +++ /dev/null @@ -1,80 +0,0 @@ -The leds-blinkm driver supports the devices of the BlinkM family. - -They are RGB-LED modules driven by a (AT)tiny microcontroller and -communicate through I2C. The default address of these modules is -0x09 but this can be changed through a command. By this you could -dasy-chain up to 127 BlinkMs on an I2C bus. - -The device accepts RGB and HSB color values through separate commands. -Also you can store blinking sequences as "scripts" in -the controller and run them. Also fading is an option. - -The interface this driver provides is 2-fold: - -a) LED class interface for use with triggers -############################################ - -The registration follows the scheme: -blinkm--- - -$ ls -h /sys/class/leds/blinkm-6-* -/sys/class/leds/blinkm-6-9-blue: -brightness device max_brightness power subsystem trigger uevent - -/sys/class/leds/blinkm-6-9-green: -brightness device max_brightness power subsystem trigger uevent - -/sys/class/leds/blinkm-6-9-red: -brightness device max_brightness power subsystem trigger uevent - -(same is /sys/bus/i2c/devices/6-0009/leds) - -We can control the colors separated into red, green and blue and -assign triggers on each color. - -E.g.: - -$ cat blinkm-6-9-blue/brightness -05 - -$ echo 200 > blinkm-6-9-blue/brightness -$ - -$ modprobe ledtrig-heartbeat -$ echo heartbeat > blinkm-6-9-green/trigger -$ - - -b) Sysfs group to control rgb, fade, hsb, scripts ... -##################################################### - -This extended interface is available as folder blinkm -in the sysfs folder of the I2C device. -E.g. below /sys/bus/i2c/devices/6-0009/blinkm - -$ ls -h /sys/bus/i2c/devices/6-0009/blinkm/ -blue green red test - -Currently supported is just setting red, green, blue -and a test sequence. - -E.g.: - -$ cat * -00 -00 -00 -#Write into test to start test sequence!# - -$ echo 1 > test -$ - -$ echo 255 > red -$ - - - -as of 6/2012 - -dl9pf gmx de - diff --git a/trunk/Documentation/leds/leds-lm3556.txt b/trunk/Documentation/leds/leds-lm3556.txt deleted file mode 100644 index d9eb91b51913..000000000000 --- a/trunk/Documentation/leds/leds-lm3556.txt +++ /dev/null @@ -1,85 +0,0 @@ -Kernel driver for lm3556 -======================== - -*Texas Instrument: - 1.5 A Synchronous Boost LED Flash Driver w/ High-Side Current Source -* Datasheet: http://www.national.com/ds/LM/LM3556.pdf - -Authors: - Daniel Jeong - Contact:Daniel Jeong(daniel.jeong-at-ti.com, gshark.jeong-at-gmail.com) - -Description ------------ -There are 3 functions in LM3556, Flash, Torch and Indicator. - -FLASH MODE -In Flash Mode, the LED current source(LED) provides 16 target current levels -from 93.75 mA to 1500 mA.The Flash currents are adjusted via the CURRENT -CONTROL REGISTER(0x09).Flash mode is activated by the ENABLE REGISTER(0x0A), -or by pulling the STROBE pin HIGH. -LM3556 Flash can be controlled through sys/class/leds/flash/brightness file -* if STROBE pin is enabled, below example control brightness only, and -ON / OFF will be controlled by STROBE pin. - -Flash Example: -OFF : #echo 0 > sys/class/leds/flash/brightness -93.75 mA: #echo 1 > sys/class/leds/flash/brightness -... ..... -1500 mA: #echo 16 > sys/class/leds/flash/brightness - -TORCH MODE -In Torch Mode, the current source(LED) is programmed via the CURRENT CONTROL -REGISTER(0x09).Torch Mode is activated by the ENABLE REGISTER(0x0A) or by the -hardware TORCH input. -LM3556 torch can be controlled through sys/class/leds/torch/brightness file. -* if TORCH pin is enabled, below example control brightness only, -and ON / OFF will be controlled by TORCH pin. - -Torch Example: -OFF : #echo 0 > sys/class/leds/torch/brightness -46.88 mA: #echo 1 > sys/class/leds/torch/brightness -... ..... -375 mA : #echo 8 > sys/class/leds/torch/brightness - -INDICATOR MODE -Indicator pattern can be set through sys/class/leds/indicator/pattern file, -and 4 patterns are pre-defined in indicator_pattern array. -According to N-lank, Pulse time and N Period values, different pattern wiill -be generated.If you want new patterns for your own device, change -indicator_pattern array with your own values and INDIC_PATTERN_SIZE. -Please refer datasheet for more detail about N-Blank, Pulse time and N Period. - -Indicator pattern example: -pattern 0: #echo 0 > sys/class/leds/indicator/pattern -.... -pattern 3: #echo 3 > sys/class/leds/indicator/pattern - -Indicator brightness can be controlled through -sys/class/leds/indicator/brightness file. - -Example: -OFF : #echo 0 > sys/class/leds/indicator/brightness -5.86 mA : #echo 1 > sys/class/leds/indicator/brightness -........ -46.875mA : #echo 8 > sys/class/leds/indicator/brightness - -Notes ------ -Driver expects it is registered using the i2c_board_info mechanism. -To register the chip at address 0x63 on specific adapter, set the platform data -according to include/linux/platform_data/leds-lm3556.h, set the i2c board info - -Example: - static struct i2c_board_info __initdata board_i2c_ch4[] = { - { - I2C_BOARD_INFO(LM3556_NAME, 0x63), - .platform_data = &lm3556_pdata, - }, - }; - -and register it in the platform init function - -Example: - board_register_i2c_bus(4, 400, - board_i2c_ch4, ARRAY_SIZE(board_i2c_ch4)); diff --git a/trunk/Documentation/leds/ledtrig-oneshot.txt b/trunk/Documentation/leds/ledtrig-oneshot.txt deleted file mode 100644 index 07cd1fa41a3a..000000000000 --- a/trunk/Documentation/leds/ledtrig-oneshot.txt +++ /dev/null @@ -1,59 +0,0 @@ -One-shot LED Trigger -==================== - -This is a LED trigger useful for signaling the user of an event where there are -no clear trap points to put standard led-on and led-off settings. Using this -trigger, the application needs only to signal the trigger when an event has -happened, than the trigger turns the LED on and than keeps it off for a -specified amount of time. - -This trigger is meant to be usable both for sporadic and dense events. In the -first case, the trigger produces a clear single controlled blink for each -event, while in the latter it keeps blinking at constant rate, as to signal -that the events are arriving continuously. - -A one-shot LED only stays in a constant state when there are no events. An -additional "invert" property specifies if the LED has to stay off (normal) or -on (inverted) when not rearmed. - -The trigger can be activated from user space on led class devices as shown -below: - - echo oneshot > trigger - -This adds the following sysfs attributes to the LED: - - delay_on - specifies for how many milliseconds the LED has to stay at - LED_FULL brightness after it has been armed. - Default to 100 ms. - - delay_off - specifies for how many milliseconds the LED has to stay at - LED_OFF brightness after it has been armed. - Default to 100 ms. - - invert - reverse the blink logic. If set to 0 (default) blink on for delay_on - ms, then blink off for delay_off ms, leaving the LED normally off. If - set to 1, blink off for delay_off ms, then blink on for delay_on ms, - leaving the LED normally on. - Setting this value also immediately change the LED state. - - shot - write any non-empty string to signal an events, this starts a blink - sequence if not already running. - -Example use-case: network devices, initialization: - - echo oneshot > trigger # set trigger for this led - echo 33 > delay_on # blink at 1 / (33 + 33) Hz on continuous traffic - echo 33 > delay_off - -interface goes up: - - echo 1 > invert # set led as normally-on, turn the led on - -packet received/transmitted: - - echo 1 > shot # led starts blinking, ignored if already blinking - -interface goes down - - echo 0 > invert # set led as normally-off, turn the led off diff --git a/trunk/Documentation/pwm.txt b/trunk/Documentation/pwm.txt deleted file mode 100644 index 554290ebab94..000000000000 --- a/trunk/Documentation/pwm.txt +++ /dev/null @@ -1,76 +0,0 @@ -Pulse Width Modulation (PWM) interface - -This provides an overview about the Linux PWM interface - -PWMs are commonly used for controlling LEDs, fans or vibrators in -cell phones. PWMs with a fixed purpose have no need implementing -the Linux PWM API (although they could). However, PWMs are often -found as discrete devices on SoCs which have no fixed purpose. It's -up to the board designer to connect them to LEDs or fans. To provide -this kind of flexibility the generic PWM API exists. - -Identifying PWMs ----------------- - -Users of the legacy PWM API use unique IDs to refer to PWM devices. - -Instead of referring to a PWM device via its unique ID, board setup code -should instead register a static mapping that can be used to match PWM -consumers to providers, as given in the following example: - - static struct pwm_lookup board_pwm_lookup[] = { - PWM_LOOKUP("tegra-pwm", 0, "pwm-backlight", NULL), - }; - - static void __init board_init(void) - { - ... - pwm_add_table(board_pwm_lookup, ARRAY_SIZE(board_pwm_lookup)); - ... - } - -Using PWMs ----------- - -Legacy users can request a PWM device using pwm_request() and free it -after usage with pwm_free(). - -New users should use the pwm_get() function and pass to it the consumer -device or a consumer name. pwm_put() is used to free the PWM device. - -After being requested a PWM has to be configured using: - -int pwm_config(struct pwm_device *pwm, int duty_ns, int period_ns); - -To start/stop toggling the PWM output use pwm_enable()/pwm_disable(). - -Implementing a PWM driver -------------------------- - -Currently there are two ways to implement pwm drivers. Traditionally -there only has been the barebone API meaning that each driver has -to implement the pwm_*() functions itself. This means that it's impossible -to have multiple PWM drivers in the system. For this reason it's mandatory -for new drivers to use the generic PWM framework. - -A new PWM controller/chip can be added using pwmchip_add() and removed -again with pwmchip_remove(). pwmchip_add() takes a filled in struct -pwm_chip as argument which provides a description of the PWM chip, the -number of PWM devices provider by the chip and the chip-specific -implementation of the supported PWM operations to the framework. - -Locking -------- - -The PWM core list manipulations are protected by a mutex, so pwm_request() -and pwm_free() may not be called from an atomic context. Currently the -PWM core does not enforce any locking to pwm_enable(), pwm_disable() and -pwm_config(), so the calling context is currently driver specific. This -is an issue derived from the former barebone API and should be fixed soon. - -Helpers -------- - -Currently a PWM can only be configured with period_ns and duty_ns. For several -use cases freq_hz and duty_percent might be better. Instead of calculating -this in your driver please consider adding appropriate helpers to the framework. diff --git a/trunk/Documentation/remoteproc.txt b/trunk/Documentation/remoteproc.txt index 23a09b884bc7..70a048cd3fa3 100644 --- a/trunk/Documentation/remoteproc.txt +++ b/trunk/Documentation/remoteproc.txt @@ -36,7 +36,8 @@ cost. Note: to use this function you should already have a valid rproc handle. There are several ways to achieve that cleanly (devres, pdata, the way remoteproc_rpmsg.c does this, or, if this becomes prevalent, we - might also consider using dev_archdata for this). + might also consider using dev_archdata for this). See also + rproc_get_by_name() below. void rproc_shutdown(struct rproc *rproc) - Power off a remote processor (previously booted with rproc_boot()). @@ -50,6 +51,30 @@ cost. which means that the @rproc handle stays valid even after rproc_shutdown() returns, and users can still use it with a subsequent rproc_boot(), if needed. + - don't call rproc_shutdown() to unroll rproc_get_by_name(), exactly + because rproc_shutdown() _does not_ decrement the refcount of @rproc. + To decrement the refcount of @rproc, use rproc_put() (but _only_ if + you acquired @rproc using rproc_get_by_name()). + + struct rproc *rproc_get_by_name(const char *name) + - Find an rproc handle using the remote processor's name, and then + boot it. If it's already powered on, then just immediately return + (successfully). Returns the rproc handle on success, and NULL on failure. + This function increments the remote processor's refcount, so always + use rproc_put() to decrement it back once rproc isn't needed anymore. + Note: currently rproc_get_by_name() and rproc_put() are not used anymore + by the rpmsg bus and its drivers. We need to scrutinize the use cases + that still need them, and see if we can migrate them to use the non + name-based boot/shutdown interface. + + void rproc_put(struct rproc *rproc) + - Decrement @rproc's power refcount and shut it down if it reaches zero + (essentially by just calling rproc_shutdown), and then decrement @rproc's + validity refcount too. + After this function returns, @rproc may _not_ be used anymore, and its + handle should be considered invalid. + This function should be called _iff_ the @rproc handle was grabbed by + calling rproc_get_by_name(). 3. Typical usage @@ -90,21 +115,21 @@ int dummy_rproc_example(struct rproc *my_rproc) This function should be used by rproc implementations during initialization of the remote processor. After creating an rproc handle using this function, and when ready, - implementations should then call rproc_add() to complete + implementations should then call rproc_register() to complete the registration of the remote processor. On success, the new rproc is returned, and on failure, NULL. Note: _never_ directly deallocate @rproc, even if it was not registered - yet. Instead, when you need to unroll rproc_alloc(), use rproc_put(). + yet. Instead, if you just need to unroll rproc_alloc(), use rproc_free(). - void rproc_put(struct rproc *rproc) + void rproc_free(struct rproc *rproc) - Free an rproc handle that was allocated by rproc_alloc. - This function essentially unrolls rproc_alloc(), by decrementing the - rproc's refcount. It doesn't directly free rproc; that would happen - only if there are no other references to rproc and its refcount now - dropped to zero. + This function should _only_ be used if @rproc was only allocated, + but not registered yet. + If @rproc was already successfully registered (by calling + rproc_register()), then use rproc_unregister() instead. - int rproc_add(struct rproc *rproc) + int rproc_register(struct rproc *rproc) - Register @rproc with the remoteproc framework, after it has been allocated with rproc_alloc(). This is called by the platform-specific rproc implementation, whenever @@ -117,15 +142,20 @@ int dummy_rproc_example(struct rproc *my_rproc) of registering this remote processor, additional virtio drivers might get probed. - int rproc_del(struct rproc *rproc) - - Unroll rproc_add(). + int rproc_unregister(struct rproc *rproc) + - Unregister a remote processor, and decrement its refcount. + If its refcount drops to zero, then @rproc will be freed. If not, + it will be freed later once the last reference is dropped. + This function should be called when the platform specific rproc implementation decides to remove the rproc device. it should - _only_ be called if a previous invocation of rproc_add() + _only_ be called if a previous invocation of rproc_register() has completed successfully. - After rproc_del() returns, @rproc is still valid, and its - last refcount should be decremented by calling rproc_put(). + After rproc_unregister() returns, @rproc is _not_ valid anymore and + it shouldn't be used. More specifically, don't call rproc_free() + or try to directly free @rproc after rproc_unregister() returns; + none of these are needed, and calling them is a bug. Returns 0 on success and -EINVAL if @rproc isn't valid. diff --git a/trunk/Documentation/thermal/sysfs-api.txt b/trunk/Documentation/thermal/sysfs-api.txt index c087dbcf3535..1733ab947a95 100644 --- a/trunk/Documentation/thermal/sysfs-api.txt +++ b/trunk/Documentation/thermal/sysfs-api.txt @@ -32,8 +32,7 @@ temperature) and throttle appropriate devices. 1.1 thermal zone device interface 1.1.1 struct thermal_zone_device *thermal_zone_device_register(char *name, - int trips, int mask, void *devdata, - struct thermal_zone_device_ops *ops) + int trips, void *devdata, struct thermal_zone_device_ops *ops) This interface function adds a new thermal zone device (sensor) to /sys/class/thermal folder as thermal_zone[0-*]. It tries to bind all the @@ -41,17 +40,16 @@ temperature) and throttle appropriate devices. name: the thermal zone name. trips: the total number of trip points this thermal zone supports. - mask: Bit string: If 'n'th bit is set, then trip point 'n' is writeable. devdata: device private data ops: thermal zone device call-backs. .bind: bind the thermal zone device with a thermal cooling device. .unbind: unbind the thermal zone device with a thermal cooling device. .get_temp: get the current temperature of the thermal zone. - .get_mode: get the current mode (enabled/disabled) of the thermal zone. - - "enabled" means the kernel thermal management is enabled. - - "disabled" will prevent kernel thermal driver action upon trip points + .get_mode: get the current mode (user/kernel) of the thermal zone. + - "kernel" means thermal management is done in kernel. + - "user" will prevent kernel thermal driver actions upon trip points so that user applications can take charge of thermal management. - .set_mode: set the mode (enabled/disabled) of the thermal zone. + .set_mode: set the mode (user/kernel) of the thermal zone. .get_trip_type: get the type of certain trip point. .get_trip_temp: get the temperature above which the certain trip point will be fired. @@ -121,7 +119,6 @@ Thermal zone device sys I/F, created once it's registered: |---mode: Working mode of the thermal zone |---trip_point_[0-*]_temp: Trip point temperature |---trip_point_[0-*]_type: Trip point type - |---trip_point_[0-*]_hyst: Hysteresis value for this trip point Thermal cooling device sys I/F, created once it's registered: /sys/class/thermal/cooling_device[0-*]: @@ -170,14 +167,14 @@ temp RO, Required mode - One of the predefined values in [enabled, disabled]. + One of the predefined values in [kernel, user]. This file gives information about the algorithm that is currently managing the thermal zone. It can be either default kernel based algorithm or user space application. - enabled = enable Kernel Thermal management. - disabled = Preventing kernel thermal zone driver actions upon - trip points so that user application can take full - charge of the thermal management. + kernel = Thermal management in kernel thermal zone driver. + user = Preventing kernel thermal zone driver actions upon + trip points so that user application can take full + charge of the thermal management. RW, Optional trip_point_[0-*]_temp @@ -191,11 +188,6 @@ trip_point_[0-*]_type thermal zone. RO, Optional -trip_point_[0-*]_hyst - The hysteresis value for a trip point, represented as an integer - Unit: Celsius - RW, Optional - cdev[0-*] Sysfs link to the thermal cooling device node where the sys I/F for cooling device throttling control represents. @@ -256,7 +248,7 @@ method, the sys I/F structure will be built like this: |thermal_zone1: |---type: acpitz |---temp: 37000 - |---mode: enabled + |---mode: kernel |---trip_point_0_temp: 100000 |---trip_point_0_type: critical |---trip_point_1_temp: 80000 diff --git a/trunk/MAINTAINERS b/trunk/MAINTAINERS index b141083b2621..5b41de49a324 100644 --- a/trunk/MAINTAINERS +++ b/trunk/MAINTAINERS @@ -242,6 +242,13 @@ W: http://www.lesswatts.org/projects/acpi/ S: Supported F: drivers/acpi/fan.c +ACPI PROCESSOR AGGREGATOR DRIVER +M: Shaohua Li +L: linux-acpi@vger.kernel.org +W: http://www.lesswatts.org/projects/acpi/ +S: Supported +F: drivers/acpi/acpi_pad.c + ACPI THERMAL DRIVER M: Zhang Rui L: linux-acpi@vger.kernel.org @@ -1186,17 +1193,6 @@ S: Maintained F: arch/arm/mach-pxa/vpac270.c F: arch/arm/mach-pxa/include/mach/vpac270.h -ARM/VT8500 ARM ARCHITECTURE -M: Tony Prisk -L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) -S: Maintained -F: arch/arm/mach-vt8500/ -F: drivers/video/vt8500lcdfb.* -F: drivers/video/wm8505fb* -F: drivers/video/wmt_ge_rops.* -F: drivers/tty/serial/vt8500_serial.c -F: drivers/rtc/rtc-vt8500-c - ARM/ZIPIT Z2 SUPPORT M: Marek Vasut L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) @@ -1540,11 +1536,6 @@ W: http://blackfin.uclinux.org/ S: Supported F: drivers/i2c/busses/i2c-bfin-twi.c -BLINKM RGB LED DRIVER -M: Jan-Simon Moeller -S: Maintained -F: drivers/leds/leds-blinkm.c - BLOCK LAYER M: Jens Axboe T: git git://git.kernel.org/pub/scm/linux/kernel/git/axboe/linux-block.git @@ -5526,18 +5517,6 @@ S: Maintained F: Documentation/video4linux/README.pvrusb2 F: drivers/media/video/pvrusb2/ -PWM SUBSYSTEM -M: Thierry Reding -L: linux-kernel@vger.kernel.org -S: Maintained -W: http://gitorious.org/linux-pwm -T: git git://gitorious.org/linux-pwm/linux-pwm.git -F: Documentation/pwm.txt -F: Documentation/devicetree/bindings/pwm/ -F: include/linux/pwm.h -F: include/linux/of_pwm.h -F: drivers/pwm/ - PXA2xx/PXA3xx SUPPORT M: Eric Miao M: Russell King @@ -5753,7 +5732,6 @@ F: include/linux/regmap.h REMOTE PROCESSOR (REMOTEPROC) SUBSYSTEM M: Ohad Ben-Cohen -T: git git://git.kernel.org/pub/scm/linux/kernel/git/ohad/remoteproc.git S: Maintained F: drivers/remoteproc/ F: Documentation/remoteproc.txt diff --git a/trunk/Makefile b/trunk/Makefile index 8e4c0a7d402b..4bb09e1b1230 100644 --- a/trunk/Makefile +++ b/trunk/Makefile @@ -535,11 +535,11 @@ PHONY += include/config/auto.conf include/config/auto.conf: $(Q)test -e include/generated/autoconf.h -a -e $@ || ( \ - echo >&2; \ - echo >&2 " ERROR: Kernel configuration is invalid."; \ - echo >&2 " include/generated/autoconf.h or $@ are missing.";\ - echo >&2 " Run 'make oldconfig && make prepare' on kernel src to fix it."; \ - echo >&2 ; \ + echo; \ + echo " ERROR: Kernel configuration is invalid."; \ + echo " include/generated/autoconf.h or $@ are missing.";\ + echo " Run 'make oldconfig && make prepare' on kernel src to fix it."; \ + echo; \ /bin/false) endif # KBUILD_EXTMOD @@ -796,8 +796,8 @@ prepare3: include/config/kernel.release ifneq ($(KBUILD_SRC),) @$(kecho) ' Using $(srctree) as source for kernel' $(Q)if [ -f $(srctree)/.config -o -d $(srctree)/include/config ]; then \ - echo >&2 " $(srctree) is not clean, please run 'make mrproper'"; \ - echo >&2 " in the '$(srctree)' directory.";\ + echo " $(srctree) is not clean, please run 'make mrproper'"; \ + echo " in the '$(srctree)' directory.";\ /bin/false; \ fi; endif @@ -971,11 +971,11 @@ else # CONFIG_MODULES # --------------------------------------------------------------------------- modules modules_install: FORCE - @echo >&2 - @echo >&2 "The present kernel configuration has modules disabled." - @echo >&2 "Type 'make config' and enable loadable module support." - @echo >&2 "Then build a kernel with module support enabled." - @echo >&2 + @echo + @echo "The present kernel configuration has modules disabled." + @echo "Type 'make config' and enable loadable module support." + @echo "Then build a kernel with module support enabled." + @echo @exit 1 endif # CONFIG_MODULES diff --git a/trunk/arch/arm/Kconfig b/trunk/arch/arm/Kconfig index 6b86bb963a28..b25c9d3c379a 100644 --- a/trunk/arch/arm/Kconfig +++ b/trunk/arch/arm/Kconfig @@ -45,9 +45,6 @@ config ARM select GENERIC_SMP_IDLE_THREAD select KTIME_SCALAR select GENERIC_CLOCKEVENTS_BROADCAST if SMP - select GENERIC_STRNCPY_FROM_USER - select GENERIC_STRNLEN_USER - select DCACHE_WORD_ACCESS if (CPU_V6 || CPU_V6K || CPU_V7) && !CPU_BIG_ENDIAN help The ARM series is a line of low-power-consumption RISC chip designs licensed by ARM Ltd and targeted at embedded applications and @@ -282,6 +279,7 @@ config ARCH_INTEGRATOR select ICST select GENERIC_CLOCKEVENTS select PLAT_VERSATILE + select PLAT_VERSATILE_CLOCK select PLAT_VERSATILE_FPGA_IRQ select NEED_MACH_IO_H select NEED_MACH_MEMORY_H @@ -338,6 +336,7 @@ config ARCH_VEXPRESS select ICST select NO_IOPORT select PLAT_VERSATILE + select PLAT_VERSATILE_CLOCK select PLAT_VERSATILE_CLCD select REGULATOR_FIXED_VOLTAGE if REGULATOR help @@ -1009,6 +1008,7 @@ config ARCH_VT8500 select ARCH_HAS_CPUFREQ select GENERIC_CLOCKEVENTS select ARCH_REQUIRE_GPIOLIB + select HAVE_PWM help Support for VIA/WonderMedia VT8500/WM85xx System-on-Chip. @@ -2006,25 +2006,6 @@ config ARM_ATAG_DTB_COMPAT bootloaders, this option allows zImage to extract the information from the ATAG list and store it at run time into the appended DTB. -choice - prompt "Kernel command line type" if ARM_ATAG_DTB_COMPAT - default ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER - -config ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER - bool "Use bootloader kernel arguments if available" - help - Uses the command-line options passed by the boot loader instead of - the device tree bootargs property. If the boot loader doesn't provide - any, the device tree bootargs property will be used. - -config ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEND - bool "Extend with bootloader kernel arguments" - help - The command-line arguments provided by the boot loader will be - appended to the the device tree bootargs property. - -endchoice - config CMDLINE string "Default kernel command string" default "" diff --git a/trunk/arch/arm/Kconfig.debug b/trunk/arch/arm/Kconfig.debug index f15f82bf3a50..a03b5a7059e2 100644 --- a/trunk/arch/arm/Kconfig.debug +++ b/trunk/arch/arm/Kconfig.debug @@ -395,13 +395,4 @@ config ARM_KPROBES_TEST help Perform tests of kprobes API and instruction set simulation. -config PID_IN_CONTEXTIDR - bool "Write the current PID to the CONTEXTIDR register" - depends on CPU_COPY_V6 - help - Enabling this option causes the kernel to write the current PID to - the PROCID field of the CONTEXTIDR register, at the expense of some - additional instructions during context switch. Say Y here only if you - are planning to use hardware trace tools with this kernel. - endmenu diff --git a/trunk/arch/arm/Makefile b/trunk/arch/arm/Makefile index 30eae87ead6d..4d6d31115cf2 100644 --- a/trunk/arch/arm/Makefile +++ b/trunk/arch/arm/Makefile @@ -10,9 +10,6 @@ # # Copyright (C) 1995-2001 by Russell King -# Ensure linker flags are correct -LDFLAGS := - LDFLAGS_vmlinux :=-p --no-undefined -X ifeq ($(CONFIG_CPU_ENDIAN_BE8),y) LDFLAGS_vmlinux += --be8 diff --git a/trunk/arch/arm/boot/compressed/atags_to_fdt.c b/trunk/arch/arm/boot/compressed/atags_to_fdt.c index aabc02a68482..797f04bedb47 100644 --- a/trunk/arch/arm/boot/compressed/atags_to_fdt.c +++ b/trunk/arch/arm/boot/compressed/atags_to_fdt.c @@ -1,12 +1,6 @@ #include #include -#if defined(CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEND) -#define do_extend_cmdline 1 -#else -#define do_extend_cmdline 0 -#endif - static int node_offset(void *fdt, const char *node_path) { int offset = fdt_path_offset(fdt, node_path); @@ -42,48 +36,6 @@ static int setprop_cell(void *fdt, const char *node_path, return fdt_setprop_cell(fdt, offset, property, val); } -static const void *getprop(const void *fdt, const char *node_path, - const char *property, int *len) -{ - int offset = fdt_path_offset(fdt, node_path); - - if (offset == -FDT_ERR_NOTFOUND) - return NULL; - - return fdt_getprop(fdt, offset, property, len); -} - -static void merge_fdt_bootargs(void *fdt, const char *fdt_cmdline) -{ - char cmdline[COMMAND_LINE_SIZE]; - const char *fdt_bootargs; - char *ptr = cmdline; - int len = 0; - - /* copy the fdt command line into the buffer */ - fdt_bootargs = getprop(fdt, "/chosen", "bootargs", &len); - if (fdt_bootargs) - if (len < COMMAND_LINE_SIZE) { - memcpy(ptr, fdt_bootargs, len); - /* len is the length of the string - * including the NULL terminator */ - ptr += len - 1; - } - - /* and append the ATAG_CMDLINE */ - if (fdt_cmdline) { - len = strlen(fdt_cmdline); - if (ptr - cmdline + len + 2 < COMMAND_LINE_SIZE) { - *ptr++ = ' '; - memcpy(ptr, fdt_cmdline, len); - ptr += len; - } - } - *ptr = '\0'; - - setprop_string(fdt, "/chosen", "bootargs", cmdline); -} - /* * Convert and fold provided ATAGs into the provided FDT. * @@ -120,18 +72,8 @@ int atags_to_fdt(void *atag_list, void *fdt, int total_space) for_each_tag(atag, atag_list) { if (atag->hdr.tag == ATAG_CMDLINE) { - /* Append the ATAGS command line to the device tree - * command line. - * NB: This means that if the same parameter is set in - * the device tree and in the tags, the one from the - * tags will be chosen. - */ - if (do_extend_cmdline) - merge_fdt_bootargs(fdt, - atag->u.cmdline.cmdline); - else - setprop_string(fdt, "/chosen", "bootargs", - atag->u.cmdline.cmdline); + setprop_string(fdt, "/chosen", "bootargs", + atag->u.cmdline.cmdline); } else if (atag->hdr.tag == ATAG_MEM) { if (memcount >= sizeof(mem_reg_property)/4) continue; diff --git a/trunk/arch/arm/boot/dts/highbank.dts b/trunk/arch/arm/boot/dts/highbank.dts index 9fecf1ae777b..2e1cfa00c25b 100644 --- a/trunk/arch/arm/boot/dts/highbank.dts +++ b/trunk/arch/arm/boot/dts/highbank.dts @@ -130,12 +130,6 @@ clocks = <&eclk>; }; - memory-controller@fff00000 { - compatible = "calxeda,hb-ddr-ctrl"; - reg = <0xfff00000 0x1000>; - interrupts = <0 91 4>; - }; - ipc@fff20000 { compatible = "arm,pl320", "arm,primecell"; reg = <0xfff20000 0x1000>; @@ -281,12 +275,6 @@ }; }; - sregs@fff3c200 { - compatible = "calxeda,hb-sregs-l2-ecc"; - reg = <0xfff3c200 0x100>; - interrupts = <0 71 4 0 72 4>; - }; - dma@fff3d000 { compatible = "arm,pl330", "arm,primecell"; reg = <0xfff3d000 0x1000>; diff --git a/trunk/arch/arm/boot/dts/imx28.dtsi b/trunk/arch/arm/boot/dts/imx28.dtsi index 787efac68da8..915db89e3644 100644 --- a/trunk/arch/arm/boot/dts/imx28.dtsi +++ b/trunk/arch/arm/boot/dts/imx28.dtsi @@ -660,7 +660,6 @@ compatible = "fsl,imx28-i2c"; reg = <0x80058000 2000>; interrupts = <111 68>; - clock-frequency = <100000>; status = "disabled"; }; @@ -670,7 +669,6 @@ compatible = "fsl,imx28-i2c"; reg = <0x8005a000 2000>; interrupts = <110 69>; - clock-frequency = <100000>; status = "disabled"; }; diff --git a/trunk/arch/arm/boot/dts/kirkwood-dns320.dts b/trunk/arch/arm/boot/dts/kirkwood-dns320.dts index 9a33077130e8..dc09a735b04a 100644 --- a/trunk/arch/arm/boot/dts/kirkwood-dns320.dts +++ b/trunk/arch/arm/boot/dts/kirkwood-dns320.dts @@ -4,7 +4,7 @@ / { model = "D-Link DNS-320 NAS (Rev A1)"; - compatible = "dlink,dns-320-a1", "dlink,dns-320", "dlink,dns-kirkwood", "marvell,kirkwood-88f6281", "marvell,kirkwood"; + compatible = "dlink,dns-320-a1", "dlink,dns-320", "dlink,dns-kirkwood", "mrvl,kirkwood-88f6281", "mrvl,kirkwood"; memory { device_type = "memory"; diff --git a/trunk/arch/arm/boot/dts/kirkwood-dns325.dts b/trunk/arch/arm/boot/dts/kirkwood-dns325.dts index 16734c1b5dfe..c2a5562525d2 100644 --- a/trunk/arch/arm/boot/dts/kirkwood-dns325.dts +++ b/trunk/arch/arm/boot/dts/kirkwood-dns325.dts @@ -4,7 +4,7 @@ / { model = "D-Link DNS-325 NAS (Rev A1)"; - compatible = "dlink,dns-325-a1", "dlink,dns-325", "dlink,dns-kirkwood", "marvell,kirkwood-88f6281", "marvell,kirkwood"; + compatible = "dlink,dns-325-a1", "dlink,dns-325", "dlink,dns-kirkwood", "mrvl,kirkwood-88f6281", "mrvl,kirkwood"; memory { device_type = "memory"; diff --git a/trunk/arch/arm/boot/dts/kirkwood-dreamplug.dts b/trunk/arch/arm/boot/dts/kirkwood-dreamplug.dts index 78b0f06a09a2..a5376b84227f 100644 --- a/trunk/arch/arm/boot/dts/kirkwood-dreamplug.dts +++ b/trunk/arch/arm/boot/dts/kirkwood-dreamplug.dts @@ -4,7 +4,7 @@ / { model = "Globalscale Technologies Dreamplug"; - compatible = "globalscale,dreamplug-003-ds2001", "globalscale,dreamplug", "marvell,kirkwood-88f6281", "marvell,kirkwood"; + compatible = "globalscale,dreamplug-003-ds2001", "globalscale,dreamplug", "mrvl,kirkwood-88f6281", "mrvl,kirkwood"; memory { device_type = "memory"; diff --git a/trunk/arch/arm/boot/dts/kirkwood-ib62x0.dts b/trunk/arch/arm/boot/dts/kirkwood-ib62x0.dts index f59dcf6dc45f..ada0f0c23085 100644 --- a/trunk/arch/arm/boot/dts/kirkwood-ib62x0.dts +++ b/trunk/arch/arm/boot/dts/kirkwood-ib62x0.dts @@ -4,7 +4,7 @@ / { model = "RaidSonic ICY BOX IB-NAS62x0 (Rev B)"; - compatible = "raidsonic,ib-nas6210-b", "raidsonic,ib-nas6220-b", "raidsonic,ib-nas6210", "raidsonic,ib-nas6220", "raidsonic,ib-nas62x0", "marvell,kirkwood-88f6281", "marvell,kirkwood"; + compatible = "raidsonic,ib-nas6210-b", "raidsonic,ib-nas6220-b", "raidsonic,ib-nas6210", "raidsonic,ib-nas6220", "raidsonic,ib-nas62x0", "mrvl,kirkwood-88f6281", "mrvl,kirkwood"; memory { device_type = "memory"; diff --git a/trunk/arch/arm/boot/dts/kirkwood-iconnect.dts b/trunk/arch/arm/boot/dts/kirkwood-iconnect.dts index 026a1f82d813..1ba75d4adecc 100644 --- a/trunk/arch/arm/boot/dts/kirkwood-iconnect.dts +++ b/trunk/arch/arm/boot/dts/kirkwood-iconnect.dts @@ -4,7 +4,7 @@ / { model = "Iomega Iconnect"; - compatible = "iom,iconnect-1.1", "iom,iconnect", "marvell,kirkwood-88f6281", "marvell,kirkwood"; + compatible = "iom,iconnect-1.1", "iom,iconnect", "mrvl,kirkwood-88f6281", "mrvl,kirkwood"; memory { device_type = "memory"; diff --git a/trunk/arch/arm/boot/dts/kirkwood.dtsi b/trunk/arch/arm/boot/dts/kirkwood.dtsi index f95dbc190ab6..926528b81baa 100644 --- a/trunk/arch/arm/boot/dts/kirkwood.dtsi +++ b/trunk/arch/arm/boot/dts/kirkwood.dtsi @@ -1,7 +1,7 @@ /include/ "skeleton.dtsi" / { - compatible = "marvell,kirkwood"; + compatible = "mrvl,kirkwood"; ocp@f1000000 { compatible = "simple-bus"; @@ -28,7 +28,7 @@ }; rtc@10300 { - compatible = "marvell,kirkwood-rtc", "marvell,orion-rtc"; + compatible = "mrvl,kirkwood-rtc", "mrvl,orion-rtc"; reg = <0x10300 0x20>; interrupts = <53>; }; @@ -39,7 +39,7 @@ cle = <0>; ale = <1>; bank-width = <1>; - compatible = "marvell,orion-nand"; + compatible = "mrvl,orion-nand"; reg = <0x3000000 0x400>; chip-delay = <25>; /* set partition map and/or chip-delay in board dts */ diff --git a/trunk/arch/arm/boot/dts/r8a7740.dtsi b/trunk/arch/arm/boot/dts/r8a7740.dtsi deleted file mode 100644 index 798fa35c0005..000000000000 --- a/trunk/arch/arm/boot/dts/r8a7740.dtsi +++ /dev/null @@ -1,21 +0,0 @@ -/* - * Device Tree Source for the r8a7740 SoC - * - * Copyright (C) 2012 Renesas Solutions Corp. - * - * This file is licensed under the terms of the GNU General Public License - * version 2. This program is licensed "as is" without any warranty of any - * kind, whether express or implied. - */ - -/include/ "skeleton.dtsi" - -/ { - compatible = "renesas,r8a7740"; - - cpus { - cpu@0 { - compatible = "arm,cortex-a9"; - }; - }; -}; diff --git a/trunk/arch/arm/boot/dts/sh7377.dtsi b/trunk/arch/arm/boot/dts/sh7377.dtsi deleted file mode 100644 index 767ee0796daa..000000000000 --- a/trunk/arch/arm/boot/dts/sh7377.dtsi +++ /dev/null @@ -1,21 +0,0 @@ -/* - * Device Tree Source for the sh7377 SoC - * - * Copyright (C) 2012 Renesas Solutions Corp. - * - * This file is licensed under the terms of the GNU General Public License - * version 2. This program is licensed "as is" without any warranty of any - * kind, whether express or implied. - */ - -/include/ "skeleton.dtsi" - -/ { - compatible = "renesas,sh7377"; - - cpus { - cpu@0 { - compatible = "arm,cortex-a8"; - }; - }; -}; diff --git a/trunk/arch/arm/boot/dts/tegra20-trimslice.dts b/trunk/arch/arm/boot/dts/tegra20-trimslice.dts index 27fb8a67ea42..9de5636023f6 100644 --- a/trunk/arch/arm/boot/dts/tegra20-trimslice.dts +++ b/trunk/arch/arm/boot/dts/tegra20-trimslice.dts @@ -276,11 +276,9 @@ usb@c5000000 { status = "okay"; - nvidia,vbus-gpio = <&gpio 170 0>; /* gpio PV2 */ }; usb@c5004000 { - status = "okay"; nvidia,phy-reset-gpio = <&gpio 168 0>; /* gpio PV0 */ }; diff --git a/trunk/arch/arm/boot/dts/tegra20.dtsi b/trunk/arch/arm/boot/dts/tegra20.dtsi index 405d1673904e..9f1921634eb7 100644 --- a/trunk/arch/arm/boot/dts/tegra20.dtsi +++ b/trunk/arch/arm/boot/dts/tegra20.dtsi @@ -123,12 +123,6 @@ status = "disabled"; }; - pwm { - compatible = "nvidia,tegra20-pwm"; - reg = <0x7000a000 0x100>; - #pwm-cells = <2>; - }; - i2c@7000c000 { compatible = "nvidia,tegra20-i2c"; reg = <0x7000c000 0x100>; diff --git a/trunk/arch/arm/boot/dts/tegra30.dtsi b/trunk/arch/arm/boot/dts/tegra30.dtsi index 3e4334d14efb..da740191771f 100644 --- a/trunk/arch/arm/boot/dts/tegra30.dtsi +++ b/trunk/arch/arm/boot/dts/tegra30.dtsi @@ -117,12 +117,6 @@ status = "disabled"; }; - pwm { - compatible = "nvidia,tegra30-pwm", "nvidia,tegra20-pwm"; - reg = <0x7000a000 0x100>; - #pwm-cells = <2>; - }; - i2c@7000c000 { compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c"; reg = <0x7000c000 0x100>; diff --git a/trunk/arch/arm/common/dmabounce.c b/trunk/arch/arm/common/dmabounce.c index 1143c4d5c567..aa07f5938f05 100644 --- a/trunk/arch/arm/common/dmabounce.c +++ b/trunk/arch/arm/common/dmabounce.c @@ -452,7 +452,6 @@ static struct dma_map_ops dmabounce_ops = { .alloc = arm_dma_alloc, .free = arm_dma_free, .mmap = arm_dma_mmap, - .get_sgtable = arm_dma_get_sgtable, .map_page = dmabounce_map_page, .unmap_page = dmabounce_unmap_page, .sync_single_for_cpu = dmabounce_sync_for_cpu, diff --git a/trunk/arch/arm/configs/armadillo800eva_defconfig b/trunk/arch/arm/configs/armadillo800eva_defconfig index 7d8718468e0d..ddc9fe6a78ac 100644 --- a/trunk/arch/arm/configs/armadillo800eva_defconfig +++ b/trunk/arch/arm/configs/armadillo800eva_defconfig @@ -5,7 +5,10 @@ CONFIG_IKCONFIG_PROC=y CONFIG_LOG_BUF_SHIFT=16 # CONFIG_UTS_NS is not set # CONFIG_IPC_NS is not set +# CONFIG_USER_NS is not set # CONFIG_PID_NS is not set +CONFIG_SYSFS_DEPRECATED=y +CONFIG_SYSFS_DEPRECATED_V2=y CONFIG_CC_OPTIMIZE_FOR_SIZE=y CONFIG_SLAB=y CONFIG_MODULES=y @@ -18,7 +21,7 @@ CONFIG_ARCH_SHMOBILE=y CONFIG_ARCH_R8A7740=y CONFIG_MACH_ARMADILLO800EVA=y # CONFIG_SH_TIMER_TMU is not set -CONFIG_ARM_THUMB=y +# CONFIG_ARM_THUMB is not set CONFIG_CPU_BPREDICT_DISABLE=y # CONFIG_CACHE_L2X0 is not set CONFIG_ARM_ERRATA_430973=y @@ -36,7 +39,6 @@ CONFIG_ZBOOT_ROM_BSS=0x0 CONFIG_CMDLINE="console=tty0 console=ttySC1,115200 earlyprintk=sh-sci.1,115200 ignore_loglevel root=/dev/nfs ip=dhcp nfsroot=,rsize=4096,wsize=4096" CONFIG_CMDLINE_FORCE=y CONFIG_KEXEC=y -CONFIG_VFP=y # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set # CONFIG_SUSPEND is not set CONFIG_NET=y @@ -87,32 +89,26 @@ CONFIG_SERIAL_SH_SCI_CONSOLE=y CONFIG_I2C=y CONFIG_I2C_SH_MOBILE=y # CONFIG_HWMON is not set -CONFIG_MEDIA_SUPPORT=y -CONFIG_VIDEO_DEV=y -# CONFIG_RC_CORE is not set -# CONFIG_VIDEO_HELPER_CHIPS_AUTO is not set -# CONFIG_V4L_USB_DRIVERS is not set -CONFIG_V4L_PLATFORM_DRIVERS=y -CONFIG_SOC_CAMERA=y -CONFIG_SOC_CAMERA_MT9T112=y -CONFIG_VIDEO_SH_MOBILE_CEU=y -# CONFIG_RADIO_ADAPTERS is not set CONFIG_FB=y +CONFIG_FB_MODE_HELPERS=y CONFIG_FB_SH_MOBILE_LCDC=y -CONFIG_FB_SH_MOBILE_HDMI=y CONFIG_LCD_CLASS_DEVICE=y CONFIG_FRAMEBUFFER_CONSOLE=y CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y CONFIG_LOGO=y # CONFIG_LOGO_LINUX_MONO is not set # CONFIG_LOGO_LINUX_VGA16 is not set +CONFIG_SOUND=y +CONFIG_SND=y # CONFIG_SND_SUPPORT_OLD_API is not set # CONFIG_SND_VERBOSE_PROCFS is not set # CONFIG_SND_DRIVERS is not set # CONFIG_SND_ARM is not set +CONFIG_SND_SOC=y CONFIG_SND_SOC_SH4_FSI=y # CONFIG_HID_SUPPORT is not set CONFIG_USB=y +# CONFIG_USB_DEVICE_CLASS is not set CONFIG_USB_RENESAS_USBHS=y CONFIG_USB_GADGET=y CONFIG_USB_RENESAS_USBHS_UDC=y @@ -120,8 +116,6 @@ CONFIG_USB_ETH=m CONFIG_MMC=y CONFIG_MMC_SDHI=y CONFIG_MMC_SH_MMCIF=y -CONFIG_DMADEVICES=y -CONFIG_SH_DMAE=y CONFIG_UIO=y CONFIG_UIO_PDRV_GENIRQ=y # CONFIG_DNOTIFY is not set @@ -130,6 +124,7 @@ CONFIG_VFAT_FS=y CONFIG_TMPFS=y # CONFIG_MISC_FILESYSTEMS is not set CONFIG_NFS_FS=y +CONFIG_NFS_V3=y CONFIG_NFS_V3_ACL=y CONFIG_NFS_V4=y CONFIG_NFS_V4_1=y diff --git a/trunk/arch/arm/configs/kzm9d_defconfig b/trunk/arch/arm/configs/kzm9d_defconfig deleted file mode 100644 index 26146ffea1a5..000000000000 --- a/trunk/arch/arm/configs/kzm9d_defconfig +++ /dev/null @@ -1,89 +0,0 @@ -# CONFIG_ARM_PATCH_PHYS_VIRT is not set -CONFIG_EXPERIMENTAL=y -CONFIG_SYSVIPC=y -CONFIG_NO_HZ=y -CONFIG_IKCONFIG=y -CONFIG_IKCONFIG_PROC=y -CONFIG_LOG_BUF_SHIFT=16 -CONFIG_CC_OPTIMIZE_FOR_SIZE=y -CONFIG_SYSCTL_SYSCALL=y -CONFIG_EMBEDDED=y -CONFIG_SLAB=y -# CONFIG_BLK_DEV_BSG is not set -# CONFIG_IOSCHED_DEADLINE is not set -# CONFIG_IOSCHED_CFQ is not set -CONFIG_ARCH_SHMOBILE=y -CONFIG_ARCH_EMEV2=y -CONFIG_MACH_KZM9D=y -CONFIG_MEMORY_START=0x40000000 -CONFIG_MEMORY_SIZE=0x10000000 -# CONFIG_SH_TIMER_TMU is not set -# CONFIG_SWP_EMULATE is not set -# CONFIG_CACHE_L2X0 is not set -CONFIG_SMP=y -CONFIG_NR_CPUS=2 -CONFIG_HOTPLUG_CPU=y -# CONFIG_LOCAL_TIMERS is not set -CONFIG_AEABI=y -# CONFIG_OABI_COMPAT is not set -# CONFIG_CROSS_MEMORY_ATTACH is not set -CONFIG_FORCE_MAX_ZONEORDER=13 -CONFIG_ZBOOT_ROM_TEXT=0x0 -CONFIG_ZBOOT_ROM_BSS=0x0 -CONFIG_ARM_APPENDED_DTB=y -CONFIG_CMDLINE="console=tty0 console=ttyS1,115200n81 earlyprintk=serial8250-em.1,115200n81 mem=128M@0x40000000 ignore_loglevel root=/dev/nfs ip=dhcp nfsroot=,rsize=4096,wsize=4096" -CONFIG_CMDLINE_FORCE=y -CONFIG_VFP=y -# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set -# CONFIG_SUSPEND is not set -CONFIG_NET=y -CONFIG_PACKET=y -CONFIG_UNIX=y -CONFIG_INET=y -CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -# CONFIG_INET_XFRM_MODE_TRANSPORT is not set -# CONFIG_INET_XFRM_MODE_TUNNEL is not set -# CONFIG_INET_XFRM_MODE_BEET is not set -# CONFIG_INET_LRO is not set -# CONFIG_INET_DIAG is not set -# CONFIG_IPV6 is not set -# CONFIG_WIRELESS is not set -CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" -# CONFIG_BLK_DEV is not set -CONFIG_NETDEVICES=y -# CONFIG_NET_VENDOR_BROADCOM is not set -# CONFIG_NET_VENDOR_CHELSIO is not set -# CONFIG_NET_VENDOR_CIRRUS is not set -# CONFIG_NET_VENDOR_FARADAY is not set -# CONFIG_NET_VENDOR_INTEL is not set -# CONFIG_NET_VENDOR_MARVELL is not set -# CONFIG_NET_VENDOR_MICREL is not set -# CONFIG_NET_VENDOR_NATSEMI is not set -# CONFIG_NET_VENDOR_SEEQ is not set -CONFIG_SMSC911X=y -# CONFIG_NET_VENDOR_STMICRO is not set -# CONFIG_NET_VENDOR_WIZNET is not set -# CONFIG_WLAN is not set -# CONFIG_INPUT_MOUSEDEV is not set -# CONFIG_INPUT_KEYBOARD is not set -# CONFIG_INPUT_MOUSE is not set -# CONFIG_SERIO is not set -# CONFIG_LEGACY_PTYS is not set -# CONFIG_DEVKMEM is not set -CONFIG_SERIAL_8250=y -CONFIG_SERIAL_8250_CONSOLE=y -CONFIG_SERIAL_8250_EM=y -# CONFIG_HW_RANDOM is not set -CONFIG_GPIOLIB=y -CONFIG_GPIO_EM=y -# CONFIG_HWMON is not set -# CONFIG_HID_SUPPORT is not set -# CONFIG_USB_SUPPORT is not set -# CONFIG_IOMMU_SUPPORT is not set -# CONFIG_DNOTIFY is not set -CONFIG_TMPFS=y -# CONFIG_MISC_FILESYSTEMS is not set -CONFIG_NFS_FS=y -CONFIG_ROOT_NFS=y -# CONFIG_FTRACE is not set diff --git a/trunk/arch/arm/configs/kzm9g_defconfig b/trunk/arch/arm/configs/kzm9g_defconfig index 2388c8610627..e3ebc20ed0a7 100644 --- a/trunk/arch/arm/configs/kzm9g_defconfig +++ b/trunk/arch/arm/configs/kzm9g_defconfig @@ -100,12 +100,7 @@ CONFIG_SND_SOC_SH4_FSI=y CONFIG_USB=y CONFIG_USB_DEVICEFS=y CONFIG_USB_R8A66597_HCD=y -CONFIG_USB_RENESAS_USBHS=y CONFIG_USB_STORAGE=y -CONFIG_USB_GADGET=y -CONFIG_USB_RENESAS_USBHS_UDC=y -CONFIG_USB_ETH=m -CONFIG_USB_MASS_STORAGE=m CONFIG_MMC=y # CONFIG_MMC_BLOCK_BOUNCE is not set CONFIG_MMC_SDHI=y @@ -113,13 +108,12 @@ CONFIG_MMC_SH_MMCIF=y CONFIG_NEW_LEDS=y CONFIG_LEDS_CLASS=y CONFIG_RTC_CLASS=y -CONFIG_RTC_DRV_RS5C372=y CONFIG_DMADEVICES=y CONFIG_SH_DMAE=y CONFIG_ASYNC_TX_DMA=y CONFIG_STAGING=y # CONFIG_DNOTIFY is not set -CONFIG_INOTIFY_USER=y +# CONFIG_INOTIFY_USER is not set CONFIG_VFAT_FS=y CONFIG_TMPFS=y # CONFIG_MISC_FILESYSTEMS is not set diff --git a/trunk/arch/arm/include/asm/arch_timer.h b/trunk/arch/arm/include/asm/arch_timer.h index 62e75475e57e..ed2e95d46e29 100644 --- a/trunk/arch/arm/include/asm/arch_timer.h +++ b/trunk/arch/arm/include/asm/arch_timer.h @@ -1,10 +1,7 @@ #ifndef __ASMARM_ARCH_TIMER_H #define __ASMARM_ARCH_TIMER_H -#include - #ifdef CONFIG_ARM_ARCH_TIMER -#define ARCH_HAS_READ_CURRENT_TIMER int arch_timer_of_register(void); int arch_timer_sched_clock_init(void); #else diff --git a/trunk/arch/arm/include/asm/delay.h b/trunk/arch/arm/include/asm/delay.h index dc6145120de3..b2deda181549 100644 --- a/trunk/arch/arm/include/asm/delay.h +++ b/trunk/arch/arm/include/asm/delay.h @@ -6,22 +6,9 @@ #ifndef __ASM_ARM_DELAY_H #define __ASM_ARM_DELAY_H -#include #include /* HZ */ -#define MAX_UDELAY_MS 2 -#define UDELAY_MULT ((UL(2199023) * HZ) >> 11) -#define UDELAY_SHIFT 30 - -#ifndef __ASSEMBLY__ - -extern struct arm_delay_ops { - void (*delay)(unsigned long); - void (*const_udelay)(unsigned long); - void (*udelay)(unsigned long); -} arm_delay_ops; - -#define __delay(n) arm_delay_ops.delay(n) +extern void __delay(int loops); /* * This function intentionally does not exist; if you see references to @@ -36,27 +23,22 @@ extern void __bad_udelay(void); * division by multiplication: you don't have to worry about * loss of precision. * - * Use only for very small delays ( < 2 msec). Should probably use a + * Use only for very small delays ( < 1 msec). Should probably use a * lookup table, really, as the multiplications take much too long with * short delays. This is a "reasonable" implementation, though (and the * first constant multiplications gets optimized away if the delay is * a constant) */ -#define __udelay(n) arm_delay_ops.udelay(n) -#define __const_udelay(n) arm_delay_ops.const_udelay(n) +extern void __udelay(unsigned long usecs); +extern void __const_udelay(unsigned long); + +#define MAX_UDELAY_MS 2 #define udelay(n) \ (__builtin_constant_p(n) ? \ ((n) > (MAX_UDELAY_MS * 1000) ? __bad_udelay() : \ - __const_udelay((n) * UDELAY_MULT)) : \ + __const_udelay((n) * ((2199023U*HZ)>>11))) : \ __udelay(n)) -/* Loop-based definitions for assembly code. */ -extern void __loop_delay(unsigned long loops); -extern void __loop_udelay(unsigned long usecs); -extern void __loop_const_udelay(unsigned long); - -#endif /* __ASSEMBLY__ */ - #endif /* defined(_ARM_DELAY_H) */ diff --git a/trunk/arch/arm/include/asm/dma-mapping.h b/trunk/arch/arm/include/asm/dma-mapping.h index 2ae842df4551..bbef15d04890 100644 --- a/trunk/arch/arm/include/asm/dma-mapping.h +++ b/trunk/arch/arm/include/asm/dma-mapping.h @@ -186,6 +186,17 @@ extern int arm_dma_mmap(struct device *dev, struct vm_area_struct *vma, void *cpu_addr, dma_addr_t dma_addr, size_t size, struct dma_attrs *attrs); +#define dma_mmap_coherent(d, v, c, h, s) dma_mmap_attrs(d, v, c, h, s, NULL) + +static inline int dma_mmap_attrs(struct device *dev, struct vm_area_struct *vma, + void *cpu_addr, dma_addr_t dma_addr, + size_t size, struct dma_attrs *attrs) +{ + struct dma_map_ops *ops = get_dma_ops(dev); + BUG_ON(!ops); + return ops->mmap(dev, vma, cpu_addr, dma_addr, size, attrs); +} + static inline void *dma_alloc_writecombine(struct device *dev, size_t size, dma_addr_t *dma_handle, gfp_t flag) { @@ -202,12 +213,20 @@ static inline void dma_free_writecombine(struct device *dev, size_t size, return dma_free_attrs(dev, size, cpu_addr, dma_handle, &attrs); } +static inline int dma_mmap_writecombine(struct device *dev, struct vm_area_struct *vma, + void *cpu_addr, dma_addr_t dma_addr, size_t size) +{ + DEFINE_DMA_ATTRS(attrs); + dma_set_attr(DMA_ATTR_WRITE_COMBINE, &attrs); + return dma_mmap_attrs(dev, vma, cpu_addr, dma_addr, size, &attrs); +} + /* * This can be called during boot to increase the size of the consistent * DMA region above it's default value of 2MB. It must be called before the * memory allocator is initialised, i.e. before any core_initcall. */ -static inline void init_consistent_dma_size(unsigned long size) { } +extern void __init init_consistent_dma_size(unsigned long size); /* * For SA-1111, IXP425, and ADI systems the dma-mapping functions are "magic" @@ -261,9 +280,6 @@ extern void arm_dma_sync_sg_for_cpu(struct device *, struct scatterlist *, int, enum dma_data_direction); extern void arm_dma_sync_sg_for_device(struct device *, struct scatterlist *, int, enum dma_data_direction); -extern int arm_dma_get_sgtable(struct device *dev, struct sg_table *sgt, - void *cpu_addr, dma_addr_t dma_addr, size_t size, - struct dma_attrs *attrs); #endif /* __KERNEL__ */ #endif diff --git a/trunk/arch/arm/include/asm/kmap_types.h b/trunk/arch/arm/include/asm/kmap_types.h index 83eb2f772911..e51b1e81df05 100644 --- a/trunk/arch/arm/include/asm/kmap_types.h +++ b/trunk/arch/arm/include/asm/kmap_types.h @@ -4,6 +4,30 @@ /* * This is the "bare minimum". AIO seems to require this. */ -#define KM_TYPE_NR 16 +enum km_type { + KM_BOUNCE_READ, + KM_SKB_SUNRPC_DATA, + KM_SKB_DATA_SOFTIRQ, + KM_USER0, + KM_USER1, + KM_BIO_SRC_IRQ, + KM_BIO_DST_IRQ, + KM_PTE0, + KM_PTE1, + KM_IRQ0, + KM_IRQ1, + KM_SOFTIRQ0, + KM_SOFTIRQ1, + KM_L1_CACHE, + KM_L2_CACHE, + KM_KDB, + KM_TYPE_NR +}; + +#ifdef CONFIG_DEBUG_HIGHMEM +#define KM_NMI (-1) +#define KM_NMI_PTE (-1) +#define KM_IRQ_PTE (-1) +#endif #endif diff --git a/trunk/arch/arm/include/asm/locks.h b/trunk/arch/arm/include/asm/locks.h new file mode 100644 index 000000000000..ef4c897772d1 --- /dev/null +++ b/trunk/arch/arm/include/asm/locks.h @@ -0,0 +1,274 @@ +/* + * arch/arm/include/asm/locks.h + * + * Copyright (C) 2000 Russell King + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * Interrupt safe locking assembler. + */ +#ifndef __ASM_PROC_LOCKS_H +#define __ASM_PROC_LOCKS_H + +#if __LINUX_ARM_ARCH__ >= 6 + +#define __down_op(ptr,fail) \ + ({ \ + __asm__ __volatile__( \ + "@ down_op\n" \ +"1: ldrex lr, [%0]\n" \ +" sub lr, lr, %1\n" \ +" strex ip, lr, [%0]\n" \ +" teq ip, #0\n" \ +" bne 1b\n" \ +" teq lr, #0\n" \ +" movmi ip, %0\n" \ +" blmi " #fail \ + : \ + : "r" (ptr), "I" (1) \ + : "ip", "lr", "cc"); \ + smp_mb(); \ + }) + +#define __down_op_ret(ptr,fail) \ + ({ \ + unsigned int ret; \ + __asm__ __volatile__( \ + "@ down_op_ret\n" \ +"1: ldrex lr, [%1]\n" \ +" sub lr, lr, %2\n" \ +" strex ip, lr, [%1]\n" \ +" teq ip, #0\n" \ +" bne 1b\n" \ +" teq lr, #0\n" \ +" movmi ip, %1\n" \ +" movpl ip, #0\n" \ +" blmi " #fail "\n" \ +" mov %0, ip" \ + : "=&r" (ret) \ + : "r" (ptr), "I" (1) \ + : "ip", "lr", "cc"); \ + smp_mb(); \ + ret; \ + }) + +#define __up_op(ptr,wake) \ + ({ \ + smp_mb(); \ + __asm__ __volatile__( \ + "@ up_op\n" \ +"1: ldrex lr, [%0]\n" \ +" add lr, lr, %1\n" \ +" strex ip, lr, [%0]\n" \ +" teq ip, #0\n" \ +" bne 1b\n" \ +" cmp lr, #0\n" \ +" movle ip, %0\n" \ +" blle " #wake \ + : \ + : "r" (ptr), "I" (1) \ + : "ip", "lr", "cc"); \ + }) + +/* + * The value 0x01000000 supports up to 128 processors and + * lots of processes. BIAS must be chosen such that sub'ing + * BIAS once per CPU will result in the long remaining + * negative. + */ +#define RW_LOCK_BIAS 0x01000000 +#define RW_LOCK_BIAS_STR "0x01000000" + +#define __down_op_write(ptr,fail) \ + ({ \ + __asm__ __volatile__( \ + "@ down_op_write\n" \ +"1: ldrex lr, [%0]\n" \ +" sub lr, lr, %1\n" \ +" strex ip, lr, [%0]\n" \ +" teq ip, #0\n" \ +" bne 1b\n" \ +" teq lr, #0\n" \ +" movne ip, %0\n" \ +" blne " #fail \ + : \ + : "r" (ptr), "I" (RW_LOCK_BIAS) \ + : "ip", "lr", "cc"); \ + smp_mb(); \ + }) + +#define __up_op_write(ptr,wake) \ + ({ \ + smp_mb(); \ + __asm__ __volatile__( \ + "@ up_op_write\n" \ +"1: ldrex lr, [%0]\n" \ +" adds lr, lr, %1\n" \ +" strex ip, lr, [%0]\n" \ +" teq ip, #0\n" \ +" bne 1b\n" \ +" movcs ip, %0\n" \ +" blcs " #wake \ + : \ + : "r" (ptr), "I" (RW_LOCK_BIAS) \ + : "ip", "lr", "cc"); \ + }) + +#define __down_op_read(ptr,fail) \ + __down_op(ptr, fail) + +#define __up_op_read(ptr,wake) \ + ({ \ + smp_mb(); \ + __asm__ __volatile__( \ + "@ up_op_read\n" \ +"1: ldrex lr, [%0]\n" \ +" add lr, lr, %1\n" \ +" strex ip, lr, [%0]\n" \ +" teq ip, #0\n" \ +" bne 1b\n" \ +" teq lr, #0\n" \ +" moveq ip, %0\n" \ +" bleq " #wake \ + : \ + : "r" (ptr), "I" (1) \ + : "ip", "lr", "cc"); \ + }) + +#else + +#define __down_op(ptr,fail) \ + ({ \ + __asm__ __volatile__( \ + "@ down_op\n" \ +" mrs ip, cpsr\n" \ +" orr lr, ip, #128\n" \ +" msr cpsr_c, lr\n" \ +" ldr lr, [%0]\n" \ +" subs lr, lr, %1\n" \ +" str lr, [%0]\n" \ +" msr cpsr_c, ip\n" \ +" movmi ip, %0\n" \ +" blmi " #fail \ + : \ + : "r" (ptr), "I" (1) \ + : "ip", "lr", "cc"); \ + smp_mb(); \ + }) + +#define __down_op_ret(ptr,fail) \ + ({ \ + unsigned int ret; \ + __asm__ __volatile__( \ + "@ down_op_ret\n" \ +" mrs ip, cpsr\n" \ +" orr lr, ip, #128\n" \ +" msr cpsr_c, lr\n" \ +" ldr lr, [%1]\n" \ +" subs lr, lr, %2\n" \ +" str lr, [%1]\n" \ +" msr cpsr_c, ip\n" \ +" movmi ip, %1\n" \ +" movpl ip, #0\n" \ +" blmi " #fail "\n" \ +" mov %0, ip" \ + : "=&r" (ret) \ + : "r" (ptr), "I" (1) \ + : "ip", "lr", "cc"); \ + smp_mb(); \ + ret; \ + }) + +#define __up_op(ptr,wake) \ + ({ \ + smp_mb(); \ + __asm__ __volatile__( \ + "@ up_op\n" \ +" mrs ip, cpsr\n" \ +" orr lr, ip, #128\n" \ +" msr cpsr_c, lr\n" \ +" ldr lr, [%0]\n" \ +" adds lr, lr, %1\n" \ +" str lr, [%0]\n" \ +" msr cpsr_c, ip\n" \ +" movle ip, %0\n" \ +" blle " #wake \ + : \ + : "r" (ptr), "I" (1) \ + : "ip", "lr", "cc"); \ + }) + +/* + * The value 0x01000000 supports up to 128 processors and + * lots of processes. BIAS must be chosen such that sub'ing + * BIAS once per CPU will result in the long remaining + * negative. + */ +#define RW_LOCK_BIAS 0x01000000 +#define RW_LOCK_BIAS_STR "0x01000000" + +#define __down_op_write(ptr,fail) \ + ({ \ + __asm__ __volatile__( \ + "@ down_op_write\n" \ +" mrs ip, cpsr\n" \ +" orr lr, ip, #128\n" \ +" msr cpsr_c, lr\n" \ +" ldr lr, [%0]\n" \ +" subs lr, lr, %1\n" \ +" str lr, [%0]\n" \ +" msr cpsr_c, ip\n" \ +" movne ip, %0\n" \ +" blne " #fail \ + : \ + : "r" (ptr), "I" (RW_LOCK_BIAS) \ + : "ip", "lr", "cc"); \ + smp_mb(); \ + }) + +#define __up_op_write(ptr,wake) \ + ({ \ + __asm__ __volatile__( \ + "@ up_op_write\n" \ +" mrs ip, cpsr\n" \ +" orr lr, ip, #128\n" \ +" msr cpsr_c, lr\n" \ +" ldr lr, [%0]\n" \ +" adds lr, lr, %1\n" \ +" str lr, [%0]\n" \ +" msr cpsr_c, ip\n" \ +" movcs ip, %0\n" \ +" blcs " #wake \ + : \ + : "r" (ptr), "I" (RW_LOCK_BIAS) \ + : "ip", "lr", "cc"); \ + smp_mb(); \ + }) + +#define __down_op_read(ptr,fail) \ + __down_op(ptr, fail) + +#define __up_op_read(ptr,wake) \ + ({ \ + smp_mb(); \ + __asm__ __volatile__( \ + "@ up_op_read\n" \ +" mrs ip, cpsr\n" \ +" orr lr, ip, #128\n" \ +" msr cpsr_c, lr\n" \ +" ldr lr, [%0]\n" \ +" adds lr, lr, %1\n" \ +" str lr, [%0]\n" \ +" msr cpsr_c, ip\n" \ +" moveq ip, %0\n" \ +" bleq " #wake \ + : \ + : "r" (ptr), "I" (1) \ + : "ip", "lr", "cc"); \ + }) + +#endif + +#endif diff --git a/trunk/arch/arm/include/asm/memory.h b/trunk/arch/arm/include/asm/memory.h index e965f1b560f1..fcb575747e5e 100644 --- a/trunk/arch/arm/include/asm/memory.h +++ b/trunk/arch/arm/include/asm/memory.h @@ -16,7 +16,7 @@ #include #include #include -#include +#include #ifdef CONFIG_NEED_MACH_MEMORY_H #include diff --git a/trunk/arch/arm/include/asm/perf_event.h b/trunk/arch/arm/include/asm/perf_event.h index e074948d8143..00cbe10a50e3 100644 --- a/trunk/arch/arm/include/asm/perf_event.h +++ b/trunk/arch/arm/include/asm/perf_event.h @@ -12,6 +12,21 @@ #ifndef __ARM_PERF_EVENT_H__ #define __ARM_PERF_EVENT_H__ -/* Nothing to see here... */ +/* ARM perf PMU IDs for use by internal perf clients. */ +enum arm_perf_pmu_ids { + ARM_PERF_PMU_ID_XSCALE1 = 0, + ARM_PERF_PMU_ID_XSCALE2, + ARM_PERF_PMU_ID_V6, + ARM_PERF_PMU_ID_V6MP, + ARM_PERF_PMU_ID_CA8, + ARM_PERF_PMU_ID_CA9, + ARM_PERF_PMU_ID_CA5, + ARM_PERF_PMU_ID_CA15, + ARM_PERF_PMU_ID_CA7, + ARM_NUM_PMU_IDS, +}; + +extern enum arm_perf_pmu_ids +armpmu_get_pmu_id(void); #endif /* __ARM_PERF_EVENT_H__ */ diff --git a/trunk/arch/arm/include/asm/pmu.h b/trunk/arch/arm/include/asm/pmu.h index 4432305f4a2a..90114faa9f3c 100644 --- a/trunk/arch/arm/include/asm/pmu.h +++ b/trunk/arch/arm/include/asm/pmu.h @@ -103,9 +103,10 @@ struct pmu_hw_events { struct arm_pmu { struct pmu pmu; + enum arm_perf_pmu_ids id; enum arm_pmu_type type; cpumask_t active_irqs; - char *name; + const char *name; irqreturn_t (*handle_irq)(int irq_num, void *dev); void (*enable)(struct hw_perf_event *evt, int idx); void (*disable)(struct hw_perf_event *evt, int idx); diff --git a/trunk/arch/arm/include/asm/spinlock.h b/trunk/arch/arm/include/asm/spinlock.h index b4ca707d0a69..65fa3c88095c 100644 --- a/trunk/arch/arm/include/asm/spinlock.h +++ b/trunk/arch/arm/include/asm/spinlock.h @@ -59,13 +59,18 @@ static inline void dsb_sev(void) } /* - * ARMv6 ticket-based spin-locking. + * ARMv6 Spin-locking. * - * A memory barrier is required after we get a lock, and before we - * release it, because V6 CPUs are assumed to have weakly ordered - * memory. + * We exclusively read the old value. If it is zero, we may have + * won the lock, so we try exclusively storing it. A memory barrier + * is required after we get a lock, and before we release it, because + * V6 CPUs are assumed to have weakly ordered memory. + * + * Unlocked value: 0 + * Locked value: 1 */ +#define arch_spin_is_locked(x) ((x)->lock != 0) #define arch_spin_unlock_wait(lock) \ do { while (arch_spin_is_locked(lock)) cpu_relax(); } while (0) @@ -74,39 +79,31 @@ static inline void dsb_sev(void) static inline void arch_spin_lock(arch_spinlock_t *lock) { unsigned long tmp; - u32 newval; - arch_spinlock_t lockval; __asm__ __volatile__( -"1: ldrex %0, [%3]\n" -" add %1, %0, %4\n" -" strex %2, %1, [%3]\n" -" teq %2, #0\n" +"1: ldrex %0, [%1]\n" +" teq %0, #0\n" + WFE("ne") +" strexeq %0, %2, [%1]\n" +" teqeq %0, #0\n" " bne 1b" - : "=&r" (lockval), "=&r" (newval), "=&r" (tmp) - : "r" (&lock->slock), "I" (1 << TICKET_SHIFT) + : "=&r" (tmp) + : "r" (&lock->lock), "r" (1) : "cc"); - while (lockval.tickets.next != lockval.tickets.owner) { - wfe(); - lockval.tickets.owner = ACCESS_ONCE(lock->tickets.owner); - } - smp_mb(); } static inline int arch_spin_trylock(arch_spinlock_t *lock) { unsigned long tmp; - u32 slock; __asm__ __volatile__( -" ldrex %0, [%2]\n" -" subs %1, %0, %0, ror #16\n" -" addeq %0, %0, %3\n" -" strexeq %1, %0, [%2]" - : "=&r" (slock), "=&r" (tmp) - : "r" (&lock->slock), "I" (1 << TICKET_SHIFT) +" ldrex %0, [%1]\n" +" teq %0, #0\n" +" strexeq %0, %2, [%1]" + : "=&r" (tmp) + : "r" (&lock->lock), "r" (1) : "cc"); if (tmp == 0) { @@ -119,38 +116,17 @@ static inline int arch_spin_trylock(arch_spinlock_t *lock) static inline void arch_spin_unlock(arch_spinlock_t *lock) { - unsigned long tmp; - u32 slock; - smp_mb(); __asm__ __volatile__( -" mov %1, #1\n" -"1: ldrex %0, [%2]\n" -" uadd16 %0, %0, %1\n" -" strex %1, %0, [%2]\n" -" teq %1, #0\n" -" bne 1b" - : "=&r" (slock), "=&r" (tmp) - : "r" (&lock->slock) +" str %1, [%0]\n" + : + : "r" (&lock->lock), "r" (0) : "cc"); dsb_sev(); } -static inline int arch_spin_is_locked(arch_spinlock_t *lock) -{ - struct __raw_tickets tickets = ACCESS_ONCE(lock->tickets); - return tickets.owner != tickets.next; -} - -static inline int arch_spin_is_contended(arch_spinlock_t *lock) -{ - struct __raw_tickets tickets = ACCESS_ONCE(lock->tickets); - return (tickets.next - tickets.owner) > 1; -} -#define arch_spin_is_contended arch_spin_is_contended - /* * RWLOCKS * @@ -182,7 +158,7 @@ static inline int arch_write_trylock(arch_rwlock_t *rw) unsigned long tmp; __asm__ __volatile__( -" ldrex %0, [%1]\n" +"1: ldrex %0, [%1]\n" " teq %0, #0\n" " strexeq %0, %2, [%1]" : "=&r" (tmp) @@ -268,7 +244,7 @@ static inline int arch_read_trylock(arch_rwlock_t *rw) unsigned long tmp, tmp2 = 1; __asm__ __volatile__( -" ldrex %0, [%2]\n" +"1: ldrex %0, [%2]\n" " adds %0, %0, #1\n" " strexpl %1, %0, [%2]\n" : "=&r" (tmp), "+r" (tmp2) diff --git a/trunk/arch/arm/include/asm/spinlock_types.h b/trunk/arch/arm/include/asm/spinlock_types.h index b262d2f8b478..d14d197ae04a 100644 --- a/trunk/arch/arm/include/asm/spinlock_types.h +++ b/trunk/arch/arm/include/asm/spinlock_types.h @@ -5,24 +5,11 @@ # error "please don't include this file directly" #endif -#define TICKET_SHIFT 16 - typedef struct { - union { - u32 slock; - struct __raw_tickets { -#ifdef __ARMEB__ - u16 next; - u16 owner; -#else - u16 owner; - u16 next; -#endif - } tickets; - }; + volatile unsigned int lock; } arch_spinlock_t; -#define __ARCH_SPIN_LOCK_UNLOCKED { { 0 } } +#define __ARCH_SPIN_LOCK_UNLOCKED { 0 } typedef struct { volatile unsigned int lock; diff --git a/trunk/arch/arm/include/asm/timex.h b/trunk/arch/arm/include/asm/timex.h index ce119442277c..3be8de3adaba 100644 --- a/trunk/arch/arm/include/asm/timex.h +++ b/trunk/arch/arm/include/asm/timex.h @@ -12,15 +12,13 @@ #ifndef _ASMARM_TIMEX_H #define _ASMARM_TIMEX_H -#include #include typedef unsigned long cycles_t; -#ifdef ARCH_HAS_READ_CURRENT_TIMER -#define get_cycles() ({ cycles_t c; read_current_timer(&c) ? 0 : c; }) -#else -#define get_cycles() (0) -#endif +static inline cycles_t get_cycles (void) +{ + return 0; +} #endif diff --git a/trunk/arch/arm/include/asm/uaccess.h b/trunk/arch/arm/include/asm/uaccess.h index 479a6352e0b5..71f6536d17ac 100644 --- a/trunk/arch/arm/include/asm/uaccess.h +++ b/trunk/arch/arm/include/asm/uaccess.h @@ -189,9 +189,6 @@ static inline void set_fs(mm_segment_t fs) #define access_ok(type,addr,size) (__range_ok(addr,size) == 0) -#define user_addr_max() \ - (segment_eq(get_fs(), USER_DS) ? TASK_SIZE : ~0UL) - /* * The "__xxx" versions of the user access functions do not verify the * address space - it must have been done previously with a separate @@ -401,6 +398,9 @@ extern unsigned long __must_check __clear_user_std(void __user *addr, unsigned l #define __clear_user(addr,n) (memset((void __force *)addr, 0, n), 0) #endif +extern unsigned long __must_check __strncpy_from_user(char *to, const char __user *from, unsigned long count); +extern unsigned long __must_check __strnlen_user(const char __user *s, long n); + static inline unsigned long __must_check copy_from_user(void *to, const void __user *from, unsigned long n) { if (access_ok(VERIFY_READ, from, n)) @@ -427,9 +427,24 @@ static inline unsigned long __must_check clear_user(void __user *to, unsigned lo return n; } -extern long strncpy_from_user(char *dest, const char __user *src, long count); +static inline long __must_check strncpy_from_user(char *dst, const char __user *src, long count) +{ + long res = -EFAULT; + if (access_ok(VERIFY_READ, src, 1)) + res = __strncpy_from_user(dst, src, count); + return res; +} + +#define strlen_user(s) strnlen_user(s, ~0UL >> 1) -extern __must_check long strlen_user(const char __user *str); -extern __must_check long strnlen_user(const char __user *str, long n); +static inline long __must_check strnlen_user(const char __user *s, long n) +{ + unsigned long res = 0; + + if (__addr_ok(s)) + res = __strnlen_user(s, n); + + return res; +} #endif /* _ASMARM_UACCESS_H */ diff --git a/trunk/arch/arm/include/asm/word-at-a-time.h b/trunk/arch/arm/include/asm/word-at-a-time.h deleted file mode 100644 index 4d52f92967a6..000000000000 --- a/trunk/arch/arm/include/asm/word-at-a-time.h +++ /dev/null @@ -1,96 +0,0 @@ -#ifndef __ASM_ARM_WORD_AT_A_TIME_H -#define __ASM_ARM_WORD_AT_A_TIME_H - -#ifndef __ARMEB__ - -/* - * Little-endian word-at-a-time zero byte handling. - * Heavily based on the x86 algorithm. - */ -#include - -struct word_at_a_time { - const unsigned long one_bits, high_bits; -}; - -#define WORD_AT_A_TIME_CONSTANTS { REPEAT_BYTE(0x01), REPEAT_BYTE(0x80) } - -static inline unsigned long has_zero(unsigned long a, unsigned long *bits, - const struct word_at_a_time *c) -{ - unsigned long mask = ((a - c->one_bits) & ~a) & c->high_bits; - *bits = mask; - return mask; -} - -#define prep_zero_mask(a, bits, c) (bits) - -static inline unsigned long create_zero_mask(unsigned long bits) -{ - bits = (bits - 1) & ~bits; - return bits >> 7; -} - -static inline unsigned long find_zero(unsigned long mask) -{ - unsigned long ret; - -#if __LINUX_ARM_ARCH__ >= 5 - /* We have clz available. */ - ret = fls(mask) >> 3; -#else - /* (000000 0000ff 00ffff ffffff) -> ( 1 1 2 3 ) */ - ret = (0x0ff0001 + mask) >> 23; - /* Fix the 1 for 00 case */ - ret &= mask; -#endif - - return ret; -} - -#ifdef CONFIG_DCACHE_WORD_ACCESS - -#define zero_bytemask(mask) (mask) - -/* - * Load an unaligned word from kernel space. - * - * In the (very unlikely) case of the word being a page-crosser - * and the next page not being mapped, take the exception and - * return zeroes in the non-existing part. - */ -static inline unsigned long load_unaligned_zeropad(const void *addr) -{ - unsigned long ret, offset; - - /* Load word from unaligned pointer addr */ - asm( - "1: ldr %0, [%2]\n" - "2:\n" - " .pushsection .fixup,\"ax\"\n" - " .align 2\n" - "3: and %1, %2, #0x3\n" - " bic %2, %2, #0x3\n" - " ldr %0, [%2]\n" - " lsl %1, %1, #0x3\n" - " lsr %0, %0, %1\n" - " b 2b\n" - " .popsection\n" - " .pushsection __ex_table,\"a\"\n" - " .align 3\n" - " .long 1b, 3b\n" - " .popsection" - : "=&r" (ret), "=&r" (offset) - : "r" (addr), "Qo" (*(unsigned long *)addr)); - - return ret; -} - - -#endif /* DCACHE_WORD_ACCESS */ - -#else /* __ARMEB__ */ -#include -#endif - -#endif /* __ASM_ARM_WORD_AT_A_TIME_H */ diff --git a/trunk/arch/arm/kernel/arch_timer.c b/trunk/arch/arm/kernel/arch_timer.c index cf258807160d..dd58035621f7 100644 --- a/trunk/arch/arm/kernel/arch_timer.c +++ b/trunk/arch/arm/kernel/arch_timer.c @@ -32,8 +32,6 @@ static int arch_timer_ppi2; static struct clock_event_device __percpu **arch_timer_evt; -extern void init_current_timer_delay(unsigned long freq); - /* * Architected system timer support. */ @@ -139,7 +137,7 @@ static int __cpuinit arch_timer_setup(struct clock_event_device *clk) /* Be safe... */ arch_timer_disable(); - clk->features = CLOCK_EVT_FEAT_ONESHOT | CLOCK_EVT_FEAT_C3STOP; + clk->features = CLOCK_EVT_FEAT_ONESHOT; clk->name = "arch_sys_timer"; clk->rating = 450; clk->set_mode = arch_timer_set_mode; @@ -225,14 +223,6 @@ static cycle_t arch_counter_read(struct clocksource *cs) return arch_counter_get_cntpct(); } -int read_current_timer(unsigned long *timer_val) -{ - if (!arch_timer_rate) - return -ENXIO; - *timer_val = arch_counter_get_cntpct(); - return 0; -} - static struct clocksource clocksource_counter = { .name = "arch_sys_counter", .rating = 400, @@ -306,7 +296,6 @@ static int __init arch_timer_register(void) if (err) goto out_free_irq; - init_current_timer_delay(arch_timer_rate); return 0; out_free_irq: diff --git a/trunk/arch/arm/kernel/armksyms.c b/trunk/arch/arm/kernel/armksyms.c index 60d3b738d420..b57c75e0b01f 100644 --- a/trunk/arch/arm/kernel/armksyms.c +++ b/trunk/arch/arm/kernel/armksyms.c @@ -49,7 +49,8 @@ extern void __aeabi_ulcmp(void); extern void fpundefinstr(void); /* platform dependent support */ -EXPORT_SYMBOL(arm_delay_ops); +EXPORT_SYMBOL(__udelay); +EXPORT_SYMBOL(__const_udelay); /* networking */ EXPORT_SYMBOL(csum_partial); @@ -86,6 +87,10 @@ EXPORT_SYMBOL(memmove); EXPORT_SYMBOL(memchr); EXPORT_SYMBOL(__memzero); + /* user mem (segment) */ +EXPORT_SYMBOL(__strnlen_user); +EXPORT_SYMBOL(__strncpy_from_user); + #ifdef CONFIG_MMU EXPORT_SYMBOL(copy_page); diff --git a/trunk/arch/arm/kernel/entry-common.S b/trunk/arch/arm/kernel/entry-common.S index 49d9f9305247..4afed88d250a 100644 --- a/trunk/arch/arm/kernel/entry-common.S +++ b/trunk/arch/arm/kernel/entry-common.S @@ -95,7 +95,13 @@ ENDPROC(ret_to_user) ENTRY(ret_from_fork) bl schedule_tail get_thread_info tsk + ldr r1, [tsk, #TI_FLAGS] @ check for syscall tracing mov why, #1 + tst r1, #_TIF_SYSCALL_WORK @ are we tracing syscalls? + beq ret_slow_syscall + mov r1, sp + mov r0, #1 @ trace exit [IP = 1] + bl syscall_trace b ret_slow_syscall ENDPROC(ret_from_fork) @@ -442,9 +448,10 @@ ENDPROC(vector_swi) * context switches, and waiting for our parent to respond. */ __sys_trace: - mov r1, scno - add r0, sp, #S_OFF - bl syscall_trace_enter + mov r2, scno + add r1, sp, #S_OFF + mov r0, #0 @ trace entry [IP = 0] + bl syscall_trace adr lr, BSYM(__sys_trace_return) @ return address mov scno, r0 @ syscall number (possibly new) @@ -456,9 +463,10 @@ __sys_trace: __sys_trace_return: str r0, [sp, #S_R0 + S_OFF]! @ save returned r0 - mov r1, scno - mov r0, sp - bl syscall_trace_exit + mov r2, scno + mov r1, sp + mov r0, #1 @ trace exit [IP = 1] + bl syscall_trace b ret_slow_syscall .align 5 diff --git a/trunk/arch/arm/kernel/head.S b/trunk/arch/arm/kernel/head.S index 3db960e20cb8..835898e7d704 100644 --- a/trunk/arch/arm/kernel/head.S +++ b/trunk/arch/arm/kernel/head.S @@ -55,6 +55,14 @@ add \rd, \phys, #TEXT_OFFSET - PG_DIR_SIZE .endm +#ifdef CONFIG_XIP_KERNEL +#define KERNEL_START XIP_VIRT_ADDR(CONFIG_XIP_PHYS_ADDR) +#define KERNEL_END _edata_loc +#else +#define KERNEL_START KERNEL_RAM_VADDR +#define KERNEL_END _end +#endif + /* * Kernel startup entry point. * --------------------------- @@ -210,46 +218,51 @@ __create_page_tables: blo 1b /* - * Map our RAM from the start to the end of the kernel .bss section. + * Now setup the pagetables for our kernel direct + * mapped region. */ - add r0, r4, #PAGE_OFFSET >> (SECTION_SHIFT - PMD_ORDER) - ldr r6, =(_end - 1) - orr r3, r8, r7 + mov r3, pc + mov r3, r3, lsr #SECTION_SHIFT + orr r3, r7, r3, lsl #SECTION_SHIFT + add r0, r4, #(KERNEL_START & 0xff000000) >> (SECTION_SHIFT - PMD_ORDER) + str r3, [r0, #((KERNEL_START & 0x00f00000) >> SECTION_SHIFT) << PMD_ORDER]! + ldr r6, =(KERNEL_END - 1) + add r0, r0, #1 << PMD_ORDER add r6, r4, r6, lsr #(SECTION_SHIFT - PMD_ORDER) -1: str r3, [r0], #1 << PMD_ORDER +1: cmp r0, r6 add r3, r3, #1 << SECTION_SHIFT - cmp r0, r6 + strls r3, [r0], #1 << PMD_ORDER bls 1b #ifdef CONFIG_XIP_KERNEL /* - * Map the kernel image separately as it is not located in RAM. + * Map some ram to cover our .data and .bss areas. */ -#define XIP_START XIP_VIRT_ADDR(CONFIG_XIP_PHYS_ADDR) - mov r3, pc - mov r3, r3, lsr #SECTION_SHIFT - orr r3, r7, r3, lsl #SECTION_SHIFT - add r0, r4, #(XIP_START & 0xff000000) >> (SECTION_SHIFT - PMD_ORDER) - str r3, [r0, #((XIP_START & 0x00f00000) >> SECTION_SHIFT) << PMD_ORDER]! - ldr r6, =(_edata_loc - 1) - add r0, r0, #1 << PMD_ORDER + add r3, r8, #TEXT_OFFSET + orr r3, r3, r7 + add r0, r4, #(KERNEL_RAM_VADDR & 0xff000000) >> (SECTION_SHIFT - PMD_ORDER) + str r3, [r0, #(KERNEL_RAM_VADDR & 0x00f00000) >> (SECTION_SHIFT - PMD_ORDER)]! + ldr r6, =(_end - 1) + add r0, r0, #4 add r6, r4, r6, lsr #(SECTION_SHIFT - PMD_ORDER) 1: cmp r0, r6 - add r3, r3, #1 << SECTION_SHIFT - strls r3, [r0], #1 << PMD_ORDER + add r3, r3, #1 << 20 + strls r3, [r0], #4 bls 1b #endif /* - * Then map boot params address in r2 if specified. + * Then map boot params address in r2 or the first 1MB (2MB with LPAE) + * of ram if boot params address is not specified. */ mov r0, r2, lsr #SECTION_SHIFT movs r0, r0, lsl #SECTION_SHIFT - subne r3, r0, r8 - addne r3, r3, #PAGE_OFFSET - addne r3, r4, r3, lsr #(SECTION_SHIFT - PMD_ORDER) - orrne r6, r7, r0 - strne r6, [r3] + moveq r0, r8 + sub r3, r0, r8 + add r3, r3, #PAGE_OFFSET + add r3, r4, r3, lsr #(SECTION_SHIFT - PMD_ORDER) + orr r6, r7, r0 + str r6, [r3] #ifdef CONFIG_DEBUG_LL #if !defined(CONFIG_DEBUG_ICEDCC) && !defined(CONFIG_DEBUG_SEMIHOSTING) diff --git a/trunk/arch/arm/kernel/perf_event.c b/trunk/arch/arm/kernel/perf_event.c index ab243b87118d..a02eada3aa5d 100644 --- a/trunk/arch/arm/kernel/perf_event.c +++ b/trunk/arch/arm/kernel/perf_event.c @@ -47,14 +47,17 @@ static DEFINE_PER_CPU(struct pmu_hw_events, cpu_hw_events); /* Set at runtime when we know what CPU type we are. */ static struct arm_pmu *cpu_pmu; -const char *perf_pmu_name(void) +enum arm_perf_pmu_ids +armpmu_get_pmu_id(void) { - if (!cpu_pmu) - return NULL; + int id = -ENODEV; + + if (cpu_pmu != NULL) + id = cpu_pmu->id; - return cpu_pmu->pmu.name; + return id; } -EXPORT_SYMBOL_GPL(perf_pmu_name); +EXPORT_SYMBOL_GPL(armpmu_get_pmu_id); int perf_num_counters(void) { @@ -757,7 +760,7 @@ init_hw_perf_events(void) cpu_pmu->name, cpu_pmu->num_events); cpu_pmu_init(cpu_pmu); register_cpu_notifier(&pmu_cpu_notifier); - armpmu_register(cpu_pmu, cpu_pmu->name, PERF_TYPE_RAW); + armpmu_register(cpu_pmu, "cpu", PERF_TYPE_RAW); } else { pr_info("no hardware support available\n"); } diff --git a/trunk/arch/arm/kernel/perf_event_v6.c b/trunk/arch/arm/kernel/perf_event_v6.c index c90fcb2b6967..ab627a740fa3 100644 --- a/trunk/arch/arm/kernel/perf_event_v6.c +++ b/trunk/arch/arm/kernel/perf_event_v6.c @@ -650,6 +650,7 @@ static int armv6_map_event(struct perf_event *event) } static struct arm_pmu armv6pmu = { + .id = ARM_PERF_PMU_ID_V6, .name = "v6", .handle_irq = armv6pmu_handle_irq, .enable = armv6pmu_enable_event, @@ -684,6 +685,7 @@ static int armv6mpcore_map_event(struct perf_event *event) } static struct arm_pmu armv6mpcore_pmu = { + .id = ARM_PERF_PMU_ID_V6MP, .name = "v6mpcore", .handle_irq = armv6pmu_handle_irq, .enable = armv6pmu_enable_event, diff --git a/trunk/arch/arm/kernel/perf_event_v7.c b/trunk/arch/arm/kernel/perf_event_v7.c index f04070bd2183..d3c536068162 100644 --- a/trunk/arch/arm/kernel/perf_event_v7.c +++ b/trunk/arch/arm/kernel/perf_event_v7.c @@ -1258,6 +1258,7 @@ static u32 __init armv7_read_num_pmnc_events(void) static struct arm_pmu *__init armv7_a8_pmu_init(void) { + armv7pmu.id = ARM_PERF_PMU_ID_CA8; armv7pmu.name = "ARMv7 Cortex-A8"; armv7pmu.map_event = armv7_a8_map_event; armv7pmu.num_events = armv7_read_num_pmnc_events(); @@ -1266,6 +1267,7 @@ static struct arm_pmu *__init armv7_a8_pmu_init(void) static struct arm_pmu *__init armv7_a9_pmu_init(void) { + armv7pmu.id = ARM_PERF_PMU_ID_CA9; armv7pmu.name = "ARMv7 Cortex-A9"; armv7pmu.map_event = armv7_a9_map_event; armv7pmu.num_events = armv7_read_num_pmnc_events(); @@ -1274,6 +1276,7 @@ static struct arm_pmu *__init armv7_a9_pmu_init(void) static struct arm_pmu *__init armv7_a5_pmu_init(void) { + armv7pmu.id = ARM_PERF_PMU_ID_CA5; armv7pmu.name = "ARMv7 Cortex-A5"; armv7pmu.map_event = armv7_a5_map_event; armv7pmu.num_events = armv7_read_num_pmnc_events(); @@ -1282,6 +1285,7 @@ static struct arm_pmu *__init armv7_a5_pmu_init(void) static struct arm_pmu *__init armv7_a15_pmu_init(void) { + armv7pmu.id = ARM_PERF_PMU_ID_CA15; armv7pmu.name = "ARMv7 Cortex-A15"; armv7pmu.map_event = armv7_a15_map_event; armv7pmu.num_events = armv7_read_num_pmnc_events(); @@ -1291,6 +1295,7 @@ static struct arm_pmu *__init armv7_a15_pmu_init(void) static struct arm_pmu *__init armv7_a7_pmu_init(void) { + armv7pmu.id = ARM_PERF_PMU_ID_CA7; armv7pmu.name = "ARMv7 Cortex-A7"; armv7pmu.map_event = armv7_a7_map_event; armv7pmu.num_events = armv7_read_num_pmnc_events(); diff --git a/trunk/arch/arm/kernel/perf_event_xscale.c b/trunk/arch/arm/kernel/perf_event_xscale.c index f759fe0bab63..e34e7254e652 100644 --- a/trunk/arch/arm/kernel/perf_event_xscale.c +++ b/trunk/arch/arm/kernel/perf_event_xscale.c @@ -435,6 +435,7 @@ static int xscale_map_event(struct perf_event *event) } static struct arm_pmu xscale1pmu = { + .id = ARM_PERF_PMU_ID_XSCALE1, .name = "xscale1", .handle_irq = xscale1pmu_handle_irq, .enable = xscale1pmu_enable_event, @@ -802,6 +803,7 @@ xscale2pmu_write_counter(int counter, u32 val) } static struct arm_pmu xscale2pmu = { + .id = ARM_PERF_PMU_ID_XSCALE2, .name = "xscale2", .handle_irq = xscale2pmu_handle_irq, .enable = xscale2pmu_enable_event, diff --git a/trunk/arch/arm/kernel/ptrace.c b/trunk/arch/arm/kernel/ptrace.c index dab711e6e1ca..14e38261cd31 100644 --- a/trunk/arch/arm/kernel/ptrace.c +++ b/trunk/arch/arm/kernel/ptrace.c @@ -907,16 +907,16 @@ long arch_ptrace(struct task_struct *child, long request, return ret; } -enum ptrace_syscall_dir { - PTRACE_SYSCALL_ENTER = 0, - PTRACE_SYSCALL_EXIT, -}; - -static int ptrace_syscall_trace(struct pt_regs *regs, int scno, - enum ptrace_syscall_dir dir) +asmlinkage int syscall_trace(int why, struct pt_regs *regs, int scno) { unsigned long ip; + if (why) + audit_syscall_exit(regs); + else + audit_syscall_entry(AUDIT_ARCH_ARM, scno, regs->ARM_r0, + regs->ARM_r1, regs->ARM_r2, regs->ARM_r3); + if (!test_thread_flag(TIF_SYSCALL_TRACE)) return scno; @@ -927,28 +927,14 @@ static int ptrace_syscall_trace(struct pt_regs *regs, int scno, * IP = 0 -> entry, =1 -> exit */ ip = regs->ARM_ip; - regs->ARM_ip = dir; + regs->ARM_ip = why; - if (dir == PTRACE_SYSCALL_EXIT) + if (why) tracehook_report_syscall_exit(regs, 0); else if (tracehook_report_syscall_entry(regs)) current_thread_info()->syscall = -1; regs->ARM_ip = ip; - return current_thread_info()->syscall; -} -asmlinkage int syscall_trace_enter(struct pt_regs *regs, int scno) -{ - int ret = ptrace_syscall_trace(regs, scno, PTRACE_SYSCALL_ENTER); - audit_syscall_entry(AUDIT_ARCH_ARM, scno, regs->ARM_r0, regs->ARM_r1, - regs->ARM_r2, regs->ARM_r3); - return ret; -} - -asmlinkage int syscall_trace_exit(struct pt_regs *regs, int scno) -{ - int ret = ptrace_syscall_trace(regs, scno, PTRACE_SYSCALL_EXIT); - audit_syscall_exit(regs); - return ret; + return current_thread_info()->syscall; } diff --git a/trunk/arch/arm/kernel/smp.c b/trunk/arch/arm/kernel/smp.c index aea74f5bc34a..2c7217d971db 100644 --- a/trunk/arch/arm/kernel/smp.c +++ b/trunk/arch/arm/kernel/smp.c @@ -179,7 +179,7 @@ void __ref cpu_die(void) mb(); /* Tell __cpu_die() that this CPU is now safe to dispose of */ - RCU_NONIDLE(complete(&cpu_died)); + complete(&cpu_died); /* * actual CPU shutdown procedure is at least platform (if not diff --git a/trunk/arch/arm/kernel/topology.c b/trunk/arch/arm/kernel/topology.c index 198b08456e90..8200deaa14f6 100644 --- a/trunk/arch/arm/kernel/topology.c +++ b/trunk/arch/arm/kernel/topology.c @@ -17,190 +17,11 @@ #include #include #include -#include #include -#include #include #include -/* - * cpu power scale management - */ - -/* - * cpu power table - * This per cpu data structure describes the relative capacity of each core. - * On a heteregenous system, cores don't have the same computation capacity - * and we reflect that difference in the cpu_power field so the scheduler can - * take this difference into account during load balance. A per cpu structure - * is preferred because each CPU updates its own cpu_power field during the - * load balance except for idle cores. One idle core is selected to run the - * rebalance_domains for all idle cores and the cpu_power can be updated - * during this sequence. - */ -static DEFINE_PER_CPU(unsigned long, cpu_scale); - -unsigned long arch_scale_freq_power(struct sched_domain *sd, int cpu) -{ - return per_cpu(cpu_scale, cpu); -} - -static void set_power_scale(unsigned int cpu, unsigned long power) -{ - per_cpu(cpu_scale, cpu) = power; -} - -#ifdef CONFIG_OF -struct cpu_efficiency { - const char *compatible; - unsigned long efficiency; -}; - -/* - * Table of relative efficiency of each processors - * The efficiency value must fit in 20bit and the final - * cpu_scale value must be in the range - * 0 < cpu_scale < 3*SCHED_POWER_SCALE/2 - * in order to return at most 1 when DIV_ROUND_CLOSEST - * is used to compute the capacity of a CPU. - * Processors that are not defined in the table, - * use the default SCHED_POWER_SCALE value for cpu_scale. - */ -struct cpu_efficiency table_efficiency[] = { - {"arm,cortex-a15", 3891}, - {"arm,cortex-a7", 2048}, - {NULL, }, -}; - -struct cpu_capacity { - unsigned long hwid; - unsigned long capacity; -}; - -struct cpu_capacity *cpu_capacity; - -unsigned long middle_capacity = 1; - -/* - * Iterate all CPUs' descriptor in DT and compute the efficiency - * (as per table_efficiency). Also calculate a middle efficiency - * as close as possible to (max{eff_i} - min{eff_i}) / 2 - * This is later used to scale the cpu_power field such that an - * 'average' CPU is of middle power. Also see the comments near - * table_efficiency[] and update_cpu_power(). - */ -static void __init parse_dt_topology(void) -{ - struct cpu_efficiency *cpu_eff; - struct device_node *cn = NULL; - unsigned long min_capacity = (unsigned long)(-1); - unsigned long max_capacity = 0; - unsigned long capacity = 0; - int alloc_size, cpu = 0; - - alloc_size = nr_cpu_ids * sizeof(struct cpu_capacity); - cpu_capacity = (struct cpu_capacity *)kzalloc(alloc_size, GFP_NOWAIT); - - while ((cn = of_find_node_by_type(cn, "cpu"))) { - const u32 *rate, *reg; - int len; - - if (cpu >= num_possible_cpus()) - break; - - for (cpu_eff = table_efficiency; cpu_eff->compatible; cpu_eff++) - if (of_device_is_compatible(cn, cpu_eff->compatible)) - break; - - if (cpu_eff->compatible == NULL) - continue; - - rate = of_get_property(cn, "clock-frequency", &len); - if (!rate || len != 4) { - pr_err("%s missing clock-frequency property\n", - cn->full_name); - continue; - } - - reg = of_get_property(cn, "reg", &len); - if (!reg || len != 4) { - pr_err("%s missing reg property\n", cn->full_name); - continue; - } - - capacity = ((be32_to_cpup(rate)) >> 20) * cpu_eff->efficiency; - - /* Save min capacity of the system */ - if (capacity < min_capacity) - min_capacity = capacity; - - /* Save max capacity of the system */ - if (capacity > max_capacity) - max_capacity = capacity; - - cpu_capacity[cpu].capacity = capacity; - cpu_capacity[cpu++].hwid = be32_to_cpup(reg); - } - - if (cpu < num_possible_cpus()) - cpu_capacity[cpu].hwid = (unsigned long)(-1); - - /* If min and max capacities are equals, we bypass the update of the - * cpu_scale because all CPUs have the same capacity. Otherwise, we - * compute a middle_capacity factor that will ensure that the capacity - * of an 'average' CPU of the system will be as close as possible to - * SCHED_POWER_SCALE, which is the default value, but with the - * constraint explained near table_efficiency[]. - */ - if (min_capacity == max_capacity) - cpu_capacity[0].hwid = (unsigned long)(-1); - else if (4*max_capacity < (3*(max_capacity + min_capacity))) - middle_capacity = (min_capacity + max_capacity) - >> (SCHED_POWER_SHIFT+1); - else - middle_capacity = ((max_capacity / 3) - >> (SCHED_POWER_SHIFT-1)) + 1; - -} - -/* - * Look for a customed capacity of a CPU in the cpu_capacity table during the - * boot. The update of all CPUs is in O(n^2) for heteregeneous system but the - * function returns directly for SMP system. - */ -void update_cpu_power(unsigned int cpu, unsigned long hwid) -{ - unsigned int idx = 0; - - /* look for the cpu's hwid in the cpu capacity table */ - for (idx = 0; idx < num_possible_cpus(); idx++) { - if (cpu_capacity[idx].hwid == hwid) - break; - - if (cpu_capacity[idx].hwid == -1) - return; - } - - if (idx == num_possible_cpus()) - return; - - set_power_scale(cpu, cpu_capacity[idx].capacity / middle_capacity); - - printk(KERN_INFO "CPU%u: update cpu_power %lu\n", - cpu, arch_scale_freq_power(NULL, cpu)); -} - -#else -static inline void parse_dt_topology(void) {} -static inline void update_cpu_power(unsigned int cpuid, unsigned int mpidr) {} -#endif - - -/* - * cpu topology management - */ - #define MPIDR_SMP_BITMASK (0x3 << 30) #define MPIDR_SMP_VALUE (0x2 << 30) @@ -210,7 +31,6 @@ static inline void update_cpu_power(unsigned int cpuid, unsigned int mpidr) {} * These masks reflect the current use of the affinity levels. * The affinity level can be up to 16 bits according to ARM ARM */ -#define MPIDR_HWID_BITMASK 0xFFFFFF #define MPIDR_LEVEL0_MASK 0x3 #define MPIDR_LEVEL0_SHIFT 0 @@ -221,9 +41,6 @@ static inline void update_cpu_power(unsigned int cpuid, unsigned int mpidr) {} #define MPIDR_LEVEL2_MASK 0xFF #define MPIDR_LEVEL2_SHIFT 16 -/* - * cpu topology table - */ struct cputopo_arm cpu_topology[NR_CPUS]; const struct cpumask *cpu_coregroup_mask(int cpu) @@ -231,32 +48,6 @@ const struct cpumask *cpu_coregroup_mask(int cpu) return &cpu_topology[cpu].core_sibling; } -void update_siblings_masks(unsigned int cpuid) -{ - struct cputopo_arm *cpu_topo, *cpuid_topo = &cpu_topology[cpuid]; - int cpu; - - /* update core and thread sibling masks */ - for_each_possible_cpu(cpu) { - cpu_topo = &cpu_topology[cpu]; - - if (cpuid_topo->socket_id != cpu_topo->socket_id) - continue; - - cpumask_set_cpu(cpuid, &cpu_topo->core_sibling); - if (cpu != cpuid) - cpumask_set_cpu(cpu, &cpuid_topo->core_sibling); - - if (cpuid_topo->core_id != cpu_topo->core_id) - continue; - - cpumask_set_cpu(cpuid, &cpu_topo->thread_sibling); - if (cpu != cpuid) - cpumask_set_cpu(cpu, &cpuid_topo->thread_sibling); - } - smp_wmb(); -} - /* * store_cpu_topology is called at boot when only one cpu is running * and with the mutex cpu_hotplug.lock locked, when several cpus have booted, @@ -266,6 +57,7 @@ void store_cpu_topology(unsigned int cpuid) { struct cputopo_arm *cpuid_topo = &cpu_topology[cpuid]; unsigned int mpidr; + unsigned int cpu; /* If the cpu topology has been already set, just return */ if (cpuid_topo->core_id != -1) @@ -307,9 +99,26 @@ void store_cpu_topology(unsigned int cpuid) cpuid_topo->socket_id = -1; } - update_siblings_masks(cpuid); - - update_cpu_power(cpuid, mpidr & MPIDR_HWID_BITMASK); + /* update core and thread sibling masks */ + for_each_possible_cpu(cpu) { + struct cputopo_arm *cpu_topo = &cpu_topology[cpu]; + + if (cpuid_topo->socket_id == cpu_topo->socket_id) { + cpumask_set_cpu(cpuid, &cpu_topo->core_sibling); + if (cpu != cpuid) + cpumask_set_cpu(cpu, + &cpuid_topo->core_sibling); + + if (cpuid_topo->core_id == cpu_topo->core_id) { + cpumask_set_cpu(cpuid, + &cpu_topo->thread_sibling); + if (cpu != cpuid) + cpumask_set_cpu(cpu, + &cpuid_topo->thread_sibling); + } + } + } + smp_wmb(); printk(KERN_INFO "CPU%u: thread %d, cpu %d, socket %d, mpidr %x\n", cpuid, cpu_topology[cpuid].thread_id, @@ -325,7 +134,7 @@ void init_cpu_topology(void) { unsigned int cpu; - /* init core mask and power*/ + /* init core mask */ for_each_possible_cpu(cpu) { struct cputopo_arm *cpu_topo = &(cpu_topology[cpu]); @@ -334,10 +143,6 @@ void init_cpu_topology(void) cpu_topo->socket_id = -1; cpumask_clear(&cpu_topo->core_sibling); cpumask_clear(&cpu_topo->thread_sibling); - - set_power_scale(cpu, SCHED_POWER_SCALE); } smp_wmb(); - - parse_dt_topology(); } diff --git a/trunk/arch/arm/kernel/traps.c b/trunk/arch/arm/kernel/traps.c index 8b97d739b17b..3647170e9a16 100644 --- a/trunk/arch/arm/kernel/traps.c +++ b/trunk/arch/arm/kernel/traps.c @@ -233,9 +233,9 @@ void show_stack(struct task_struct *tsk, unsigned long *sp) #define S_ISA " ARM" #endif -static int __die(const char *str, int err, struct pt_regs *regs) +static int __die(const char *str, int err, struct thread_info *thread, struct pt_regs *regs) { - struct task_struct *tsk = current; + struct task_struct *tsk = thread->task; static int die_counter; int ret; @@ -245,12 +245,12 @@ static int __die(const char *str, int err, struct pt_regs *regs) /* trap and error numbers are mostly meaningless on ARM */ ret = notify_die(DIE_OOPS, str, regs, err, tsk->thread.trap_no, SIGSEGV); if (ret == NOTIFY_STOP) - return 1; + return ret; print_modules(); __show_regs(regs); printk(KERN_EMERG "Process %.*s (pid: %d, stack limit = 0x%p)\n", - TASK_COMM_LEN, tsk->comm, task_pid_nr(tsk), end_of_stack(tsk)); + TASK_COMM_LEN, tsk->comm, task_pid_nr(tsk), thread + 1); if (!user_mode(regs) || in_interrupt()) { dump_mem(KERN_EMERG, "Stack: ", regs->ARM_sp, @@ -259,77 +259,45 @@ static int __die(const char *str, int err, struct pt_regs *regs) dump_instr(KERN_EMERG, regs); } - return 0; + return ret; } -static arch_spinlock_t die_lock = __ARCH_SPIN_LOCK_UNLOCKED; -static int die_owner = -1; -static unsigned int die_nest_count; +static DEFINE_RAW_SPINLOCK(die_lock); -static unsigned long oops_begin(void) +/* + * This function is protected against re-entrancy. + */ +void die(const char *str, struct pt_regs *regs, int err) { - int cpu; - unsigned long flags; + struct thread_info *thread = current_thread_info(); + int ret; + enum bug_trap_type bug_type = BUG_TRAP_TYPE_NONE; oops_enter(); - /* racy, but better than risking deadlock. */ - raw_local_irq_save(flags); - cpu = smp_processor_id(); - if (!arch_spin_trylock(&die_lock)) { - if (cpu == die_owner) - /* nested oops. should stop eventually */; - else - arch_spin_lock(&die_lock); - } - die_nest_count++; - die_owner = cpu; + raw_spin_lock_irq(&die_lock); console_verbose(); bust_spinlocks(1); - return flags; -} + if (!user_mode(regs)) + bug_type = report_bug(regs->ARM_pc, regs); + if (bug_type != BUG_TRAP_TYPE_NONE) + str = "Oops - BUG"; + ret = __die(str, err, thread, regs); -static void oops_end(unsigned long flags, struct pt_regs *regs, int signr) -{ - if (regs && kexec_should_crash(current)) + if (regs && kexec_should_crash(thread->task)) crash_kexec(regs); bust_spinlocks(0); - die_owner = -1; add_taint(TAINT_DIE); - die_nest_count--; - if (!die_nest_count) - /* Nest count reaches zero, release the lock. */ - arch_spin_unlock(&die_lock); - raw_local_irq_restore(flags); + raw_spin_unlock_irq(&die_lock); oops_exit(); if (in_interrupt()) panic("Fatal exception in interrupt"); if (panic_on_oops) panic("Fatal exception"); - if (signr) - do_exit(signr); -} - -/* - * This function is protected against re-entrancy. - */ -void die(const char *str, struct pt_regs *regs, int err) -{ - enum bug_trap_type bug_type = BUG_TRAP_TYPE_NONE; - unsigned long flags = oops_begin(); - int sig = SIGSEGV; - - if (!user_mode(regs)) - bug_type = report_bug(regs->ARM_pc, regs); - if (bug_type != BUG_TRAP_TYPE_NONE) - str = "Oops - BUG"; - - if (__die(str, err, regs)) - sig = 0; - - oops_end(flags, regs, sig); + if (ret != NOTIFY_STOP) + do_exit(SIGSEGV); } void arm_notify_die(const char *str, struct pt_regs *regs, diff --git a/trunk/arch/arm/lib/Makefile b/trunk/arch/arm/lib/Makefile index 2473fd1fd51c..992769ae2599 100644 --- a/trunk/arch/arm/lib/Makefile +++ b/trunk/arch/arm/lib/Makefile @@ -6,8 +6,9 @@ lib-y := backtrace.o changebit.o csumipv6.o csumpartial.o \ csumpartialcopy.o csumpartialcopyuser.o clearbit.o \ - delay.o delay-loop.o findbit.o memchr.o memcpy.o \ + delay.o findbit.o memchr.o memcpy.o \ memmove.o memset.o memzero.o setbit.o \ + strncpy_from_user.o strnlen_user.o \ strchr.o strrchr.o \ testchangebit.o testclearbit.o testsetbit.o \ ashldi3.o ashrdi3.o lshrdi3.o muldi3.o \ diff --git a/trunk/arch/arm/lib/delay-loop.S b/trunk/arch/arm/lib/delay.S similarity index 81% rename from trunk/arch/arm/lib/delay-loop.S rename to trunk/arch/arm/lib/delay.S index 36b668d8e121..3c9a05c8d20b 100644 --- a/trunk/arch/arm/lib/delay-loop.S +++ b/trunk/arch/arm/lib/delay.S @@ -9,11 +9,11 @@ */ #include #include -#include +#include .text .LC0: .word loops_per_jiffy -.LC1: .word UDELAY_MULT +.LC1: .word (2199023*HZ)>>11 /* * r0 <= 2000 @@ -21,10 +21,10 @@ * HZ <= 1000 */ -ENTRY(__loop_udelay) +ENTRY(__udelay) ldr r2, .LC1 mul r0, r2, r0 -ENTRY(__loop_const_udelay) @ 0 <= r0 <= 0x7fffff06 +ENTRY(__const_udelay) @ 0 <= r0 <= 0x7fffff06 mov r1, #-1 ldr r2, .LC0 ldr r2, [r2] @ max = 0x01ffffff @@ -39,10 +39,12 @@ ENTRY(__loop_const_udelay) @ 0 <= r0 <= 0x7fffff06 /* * loops = r0 * HZ * loops_per_jiffy / 1000000 + * + * Oh, if only we had a cycle counter... */ @ Delay routine -ENTRY(__loop_delay) +ENTRY(__delay) subs r0, r0, #1 #if 0 movls pc, lr @@ -60,8 +62,8 @@ ENTRY(__loop_delay) movls pc, lr subs r0, r0, #1 #endif - bhi __loop_delay + bhi __delay mov pc, lr -ENDPROC(__loop_udelay) -ENDPROC(__loop_const_udelay) -ENDPROC(__loop_delay) +ENDPROC(__udelay) +ENDPROC(__const_udelay) +ENDPROC(__delay) diff --git a/trunk/arch/arm/lib/delay.c b/trunk/arch/arm/lib/delay.c deleted file mode 100644 index d6dacc69254e..000000000000 --- a/trunk/arch/arm/lib/delay.c +++ /dev/null @@ -1,71 +0,0 @@ -/* - * Delay loops based on the OpenRISC implementation. - * - * Copyright (C) 2012 ARM Limited - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - * - * Author: Will Deacon - */ - -#include -#include -#include -#include -#include - -/* - * Default to the loop-based delay implementation. - */ -struct arm_delay_ops arm_delay_ops = { - .delay = __loop_delay, - .const_udelay = __loop_const_udelay, - .udelay = __loop_udelay, -}; - -#ifdef ARCH_HAS_READ_CURRENT_TIMER -static void __timer_delay(unsigned long cycles) -{ - cycles_t start = get_cycles(); - - while ((get_cycles() - start) < cycles) - cpu_relax(); -} - -static void __timer_const_udelay(unsigned long xloops) -{ - unsigned long long loops = xloops; - loops *= loops_per_jiffy; - __timer_delay(loops >> UDELAY_SHIFT); -} - -static void __timer_udelay(unsigned long usecs) -{ - __timer_const_udelay(usecs * UDELAY_MULT); -} - -void __init init_current_timer_delay(unsigned long freq) -{ - pr_info("Switching to timer-based delay loop\n"); - lpj_fine = freq / HZ; - arm_delay_ops.delay = __timer_delay; - arm_delay_ops.const_udelay = __timer_const_udelay; - arm_delay_ops.udelay = __timer_udelay; -} - -unsigned long __cpuinit calibrate_delay_is_known(void) -{ - return lpj_fine; -} -#endif diff --git a/trunk/arch/arm/lib/strncpy_from_user.S b/trunk/arch/arm/lib/strncpy_from_user.S new file mode 100644 index 000000000000..f202d7bd1647 --- /dev/null +++ b/trunk/arch/arm/lib/strncpy_from_user.S @@ -0,0 +1,43 @@ +/* + * linux/arch/arm/lib/strncpy_from_user.S + * + * Copyright (C) 1995-2000 Russell King + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#include +#include +#include + + .text + .align 5 + +/* + * Copy a string from user space to kernel space. + * r0 = dst, r1 = src, r2 = byte length + * returns the number of characters copied (strlen of copied string), + * -EFAULT on exception, or "len" if we fill the whole buffer + */ +ENTRY(__strncpy_from_user) + mov ip, r1 +1: subs r2, r2, #1 + ldrusr r3, r1, 1, pl + bmi 2f + strb r3, [r0], #1 + teq r3, #0 + bne 1b + sub r1, r1, #1 @ take NUL character out of count +2: sub r0, r1, ip + mov pc, lr +ENDPROC(__strncpy_from_user) + + .pushsection .fixup,"ax" + .align 0 +9001: mov r3, #0 + strb r3, [r0, #0] @ null terminate + mov r0, #-EFAULT + mov pc, lr + .popsection + diff --git a/trunk/arch/arm/lib/strnlen_user.S b/trunk/arch/arm/lib/strnlen_user.S new file mode 100644 index 000000000000..0ecbb459c4f1 --- /dev/null +++ b/trunk/arch/arm/lib/strnlen_user.S @@ -0,0 +1,40 @@ +/* + * linux/arch/arm/lib/strnlen_user.S + * + * Copyright (C) 1995-2000 Russell King + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#include +#include +#include + + .text + .align 5 + +/* Prototype: unsigned long __strnlen_user(const char *str, long n) + * Purpose : get length of a string in user memory + * Params : str - address of string in user memory + * Returns : length of string *including terminator* + * or zero on exception, or n + 1 if too long + */ +ENTRY(__strnlen_user) + mov r2, r0 +1: + ldrusr r3, r0, 1 + teq r3, #0 + beq 2f + subs r1, r1, #1 + bne 1b + add r0, r0, #1 +2: sub r0, r0, r2 + mov pc, lr +ENDPROC(__strnlen_user) + + .pushsection .fixup,"ax" + .align 0 +9001: mov r0, #0 + mov pc, lr + .popsection diff --git a/trunk/arch/arm/mach-dove/common.c b/trunk/arch/arm/mach-dove/common.c index 4db5de54b6a7..9493076fc594 100644 --- a/trunk/arch/arm/mach-dove/common.c +++ b/trunk/arch/arm/mach-dove/common.c @@ -101,8 +101,8 @@ void __init dove_ehci1_init(void) ****************************************************************************/ void __init dove_ge00_init(struct mv643xx_eth_platform_data *eth_data) { - orion_ge00_init(eth_data, DOVE_GE00_PHYS_BASE, - IRQ_DOVE_GE00_SUM, IRQ_DOVE_GE00_ERR); + orion_ge00_init(eth_data, + DOVE_GE00_PHYS_BASE, IRQ_DOVE_GE00_SUM, 0); } /***************************************************************************** diff --git a/trunk/arch/arm/mach-exynos/clock-exynos4.c b/trunk/arch/arm/mach-exynos/clock-exynos4.c index 2f51293c1875..26fe9de35ecb 100644 --- a/trunk/arch/arm/mach-exynos/clock-exynos4.c +++ b/trunk/arch/arm/mach-exynos/clock-exynos4.c @@ -619,6 +619,10 @@ static struct clk exynos4_init_clocks_off[] = { .devname = "samsung-ac97", .enable = exynos4_clk_ip_peril_ctrl, .ctrlbit = (1 << 27), + }, { + .name = "fimg2d", + .enable = exynos4_clk_ip_image_ctrl, + .ctrlbit = (1 << 0), }, { .name = "mfc", .devname = "s5p-mfc", @@ -815,21 +819,47 @@ static struct clk *exynos4_clkset_mout_g2d0_list[] = { [1] = &exynos4_clk_sclk_apll.clk, }; -struct clksrc_sources exynos4_clkset_mout_g2d0 = { +static struct clksrc_sources exynos4_clkset_mout_g2d0 = { .sources = exynos4_clkset_mout_g2d0_list, .nr_sources = ARRAY_SIZE(exynos4_clkset_mout_g2d0_list), }; +static struct clksrc_clk exynos4_clk_mout_g2d0 = { + .clk = { + .name = "mout_g2d0", + }, + .sources = &exynos4_clkset_mout_g2d0, + .reg_src = { .reg = EXYNOS4_CLKSRC_IMAGE, .shift = 0, .size = 1 }, +}; + static struct clk *exynos4_clkset_mout_g2d1_list[] = { [0] = &exynos4_clk_mout_epll.clk, [1] = &exynos4_clk_sclk_vpll.clk, }; -struct clksrc_sources exynos4_clkset_mout_g2d1 = { +static struct clksrc_sources exynos4_clkset_mout_g2d1 = { .sources = exynos4_clkset_mout_g2d1_list, .nr_sources = ARRAY_SIZE(exynos4_clkset_mout_g2d1_list), }; +static struct clksrc_clk exynos4_clk_mout_g2d1 = { + .clk = { + .name = "mout_g2d1", + }, + .sources = &exynos4_clkset_mout_g2d1, + .reg_src = { .reg = EXYNOS4_CLKSRC_IMAGE, .shift = 4, .size = 1 }, +}; + +static struct clk *exynos4_clkset_mout_g2d_list[] = { + [0] = &exynos4_clk_mout_g2d0.clk, + [1] = &exynos4_clk_mout_g2d1.clk, +}; + +static struct clksrc_sources exynos4_clkset_mout_g2d = { + .sources = exynos4_clkset_mout_g2d_list, + .nr_sources = ARRAY_SIZE(exynos4_clkset_mout_g2d_list), +}; + static struct clk *exynos4_clkset_mout_mfc0_list[] = { [0] = &exynos4_clk_mout_mpll.clk, [1] = &exynos4_clk_sclk_apll.clk, @@ -1094,6 +1124,13 @@ static struct clksrc_clk exynos4_clksrcs[] = { .sources = &exynos4_clkset_group, .reg_src = { .reg = EXYNOS4_CLKSRC_LCD0, .shift = 0, .size = 4 }, .reg_div = { .reg = EXYNOS4_CLKDIV_LCD0, .shift = 0, .size = 4 }, + }, { + .clk = { + .name = "sclk_fimg2d", + }, + .sources = &exynos4_clkset_mout_g2d, + .reg_src = { .reg = EXYNOS4_CLKSRC_IMAGE, .shift = 8, .size = 1 }, + .reg_div = { .reg = EXYNOS4_CLKDIV_IMAGE, .shift = 0, .size = 4 }, }, { .clk = { .name = "sclk_mfc", diff --git a/trunk/arch/arm/mach-exynos/clock-exynos4.h b/trunk/arch/arm/mach-exynos/clock-exynos4.h index bd12d5f8b63d..28a119701182 100644 --- a/trunk/arch/arm/mach-exynos/clock-exynos4.h +++ b/trunk/arch/arm/mach-exynos/clock-exynos4.h @@ -23,9 +23,6 @@ extern struct clksrc_sources exynos4_clkset_group; extern struct clk *exynos4_clkset_aclk_top_list[]; extern struct clk *exynos4_clkset_group_list[]; -extern struct clksrc_sources exynos4_clkset_mout_g2d0; -extern struct clksrc_sources exynos4_clkset_mout_g2d1; - extern int exynos4_clksrc_mask_fsys_ctrl(struct clk *clk, int enable); extern int exynos4_clk_ip_fsys_ctrl(struct clk *clk, int enable); extern int exynos4_clk_ip_lcd1_ctrl(struct clk *clk, int enable); diff --git a/trunk/arch/arm/mach-exynos/clock-exynos4210.c b/trunk/arch/arm/mach-exynos/clock-exynos4210.c index fed4c26e9dad..b8689ff60baf 100644 --- a/trunk/arch/arm/mach-exynos/clock-exynos4210.c +++ b/trunk/arch/arm/mach-exynos/clock-exynos4210.c @@ -48,32 +48,6 @@ static struct clksrc_clk *sysclks[] = { /* nothing here yet */ }; -static struct clksrc_clk exynos4210_clk_mout_g2d0 = { - .clk = { - .name = "mout_g2d0", - }, - .sources = &exynos4_clkset_mout_g2d0, - .reg_src = { .reg = EXYNOS4_CLKSRC_IMAGE, .shift = 0, .size = 1 }, -}; - -static struct clksrc_clk exynos4210_clk_mout_g2d1 = { - .clk = { - .name = "mout_g2d1", - }, - .sources = &exynos4_clkset_mout_g2d1, - .reg_src = { .reg = EXYNOS4_CLKSRC_IMAGE, .shift = 4, .size = 1 }, -}; - -static struct clk *exynos4210_clkset_mout_g2d_list[] = { - [0] = &exynos4210_clk_mout_g2d0.clk, - [1] = &exynos4210_clk_mout_g2d1.clk, -}; - -static struct clksrc_sources exynos4210_clkset_mout_g2d = { - .sources = exynos4210_clkset_mout_g2d_list, - .nr_sources = ARRAY_SIZE(exynos4210_clkset_mout_g2d_list), -}; - static int exynos4_clksrc_mask_lcd1_ctrl(struct clk *clk, int enable) { return s5p_gatectrl(EXYNOS4210_CLKSRC_MASK_LCD1, clk, enable); @@ -100,13 +74,6 @@ static struct clksrc_clk clksrcs[] = { .sources = &exynos4_clkset_group, .reg_src = { .reg = EXYNOS4210_CLKSRC_LCD1, .shift = 0, .size = 4 }, .reg_div = { .reg = EXYNOS4210_CLKDIV_LCD1, .shift = 0, .size = 4 }, - }, { - .clk = { - .name = "sclk_fimg2d", - }, - .sources = &exynos4210_clkset_mout_g2d, - .reg_src = { .reg = EXYNOS4_CLKSRC_IMAGE, .shift = 8, .size = 1 }, - .reg_div = { .reg = EXYNOS4_CLKDIV_IMAGE, .shift = 0, .size = 4 }, }, }; @@ -138,10 +105,6 @@ static struct clk init_clocks_off[] = { .devname = SYSMMU_CLOCK_DEVNAME(fimd1, 11), .enable = exynos4_clk_ip_lcd1_ctrl, .ctrlbit = (1 << 4), - }, { - .name = "fimg2d", - .enable = exynos4_clk_ip_image_ctrl, - .ctrlbit = (1 << 0), }, }; diff --git a/trunk/arch/arm/mach-exynos/clock-exynos4212.c b/trunk/arch/arm/mach-exynos/clock-exynos4212.c index 8fba0b5fb8ab..da397d21bbcf 100644 --- a/trunk/arch/arm/mach-exynos/clock-exynos4212.c +++ b/trunk/arch/arm/mach-exynos/clock-exynos4212.c @@ -68,45 +68,12 @@ static struct clksrc_clk clk_mout_mpll_user = { .reg_src = { .reg = EXYNOS4_CLKSRC_CPU, .shift = 24, .size = 1 }, }; -static struct clksrc_clk exynos4x12_clk_mout_g2d0 = { - .clk = { - .name = "mout_g2d0", - }, - .sources = &exynos4_clkset_mout_g2d0, - .reg_src = { .reg = EXYNOS4_CLKSRC_DMC, .shift = 20, .size = 1 }, -}; - -static struct clksrc_clk exynos4x12_clk_mout_g2d1 = { - .clk = { - .name = "mout_g2d1", - }, - .sources = &exynos4_clkset_mout_g2d1, - .reg_src = { .reg = EXYNOS4_CLKSRC_DMC, .shift = 24, .size = 1 }, -}; - -static struct clk *exynos4x12_clkset_mout_g2d_list[] = { - [0] = &exynos4x12_clk_mout_g2d0.clk, - [1] = &exynos4x12_clk_mout_g2d1.clk, -}; - -static struct clksrc_sources exynos4x12_clkset_mout_g2d = { - .sources = exynos4x12_clkset_mout_g2d_list, - .nr_sources = ARRAY_SIZE(exynos4x12_clkset_mout_g2d_list), -}; - static struct clksrc_clk *sysclks[] = { &clk_mout_mpll_user, }; static struct clksrc_clk clksrcs[] = { - { - .clk = { - .name = "sclk_fimg2d", - }, - .sources = &exynos4x12_clkset_mout_g2d, - .reg_src = { .reg = EXYNOS4_CLKSRC_DMC, .shift = 28, .size = 1 }, - .reg_div = { .reg = EXYNOS4_CLKDIV_DMC1, .shift = 0, .size = 4 }, - }, + /* nothing here yet */ }; static struct clk init_clocks_off[] = { @@ -135,11 +102,7 @@ static struct clk init_clocks_off[] = { .devname = "exynos-fimc-lite.1", .enable = exynos4212_clk_ip_isp0_ctrl, .ctrlbit = (1 << 3), - }, { - .name = "fimg2d", - .enable = exynos4_clk_ip_dmc_ctrl, - .ctrlbit = (1 << 23), - }, + } }; #ifdef CONFIG_PM_SLEEP diff --git a/trunk/arch/arm/mach-kirkwood/common.c b/trunk/arch/arm/mach-kirkwood/common.c index c9201539ffbd..f261cd242643 100644 --- a/trunk/arch/arm/mach-kirkwood/common.c +++ b/trunk/arch/arm/mach-kirkwood/common.c @@ -67,14 +67,6 @@ void __init kirkwood_map_io(void) * CLK tree ****************************************************************************/ -static void enable_sata0(void) -{ - /* Enable PLL and IVREF */ - writel(readl(SATA0_PHY_MODE_2) | 0xf, SATA0_PHY_MODE_2); - /* Enable PHY */ - writel(readl(SATA0_IF_CTRL) & ~0x200, SATA0_IF_CTRL); -} - static void disable_sata0(void) { /* Disable PLL and IVREF */ @@ -83,14 +75,6 @@ static void disable_sata0(void) writel(readl(SATA0_IF_CTRL) | 0x200, SATA0_IF_CTRL); } -static void enable_sata1(void) -{ - /* Enable PLL and IVREF */ - writel(readl(SATA1_PHY_MODE_2) | 0xf, SATA1_PHY_MODE_2); - /* Enable PHY */ - writel(readl(SATA1_IF_CTRL) & ~0x200, SATA1_IF_CTRL); -} - static void disable_sata1(void) { /* Disable PLL and IVREF */ @@ -123,38 +107,23 @@ static void disable_pcie1(void) } } -/* An extended version of the gated clk. This calls fn_en()/fn_dis - * before enabling/disabling the clock. We use this to turn on/off - * PHYs etc. */ +/* An extended version of the gated clk. This calls fn() before + * disabling the clock. We use this to turn off PHYs etc. */ struct clk_gate_fn { struct clk_gate gate; - void (*fn_en)(void); - void (*fn_dis)(void); + void (*fn)(void); }; #define to_clk_gate_fn(_gate) container_of(_gate, struct clk_gate_fn, gate) #define to_clk_gate(_hw) container_of(_hw, struct clk_gate, hw) -static int clk_gate_fn_enable(struct clk_hw *hw) -{ - struct clk_gate *gate = to_clk_gate(hw); - struct clk_gate_fn *gate_fn = to_clk_gate_fn(gate); - int ret; - - ret = clk_gate_ops.enable(hw); - if (!ret && gate_fn->fn_en) - gate_fn->fn_en(); - - return ret; -} - static void clk_gate_fn_disable(struct clk_hw *hw) { struct clk_gate *gate = to_clk_gate(hw); struct clk_gate_fn *gate_fn = to_clk_gate_fn(gate); - if (gate_fn->fn_dis) - gate_fn->fn_dis(); + if (gate_fn->fn) + gate_fn->fn(); clk_gate_ops.disable(hw); } @@ -166,7 +135,7 @@ static struct clk __init *clk_register_gate_fn(struct device *dev, const char *parent_name, unsigned long flags, void __iomem *reg, u8 bit_idx, u8 clk_gate_flags, spinlock_t *lock, - void (*fn_en)(void), void (*fn_dis)(void)) + void (*fn)(void)) { struct clk_gate_fn *gate_fn; struct clk *clk; @@ -190,14 +159,11 @@ static struct clk __init *clk_register_gate_fn(struct device *dev, gate_fn->gate.flags = clk_gate_flags; gate_fn->gate.lock = lock; gate_fn->gate.hw.init = &init; - gate_fn->fn_en = fn_en; - gate_fn->fn_dis = fn_dis; + gate_fn->fn = fn; - /* ops is the gate ops, but with our enable/disable functions */ - if (clk_gate_fn_ops.enable != clk_gate_fn_enable || - clk_gate_fn_ops.disable != clk_gate_fn_disable) { + /* ops is the gate ops, but with our disable function */ + if (clk_gate_fn_ops.disable != clk_gate_fn_disable) { clk_gate_fn_ops = clk_gate_ops; - clk_gate_fn_ops.enable = clk_gate_fn_enable; clk_gate_fn_ops.disable = clk_gate_fn_disable; } @@ -221,12 +187,11 @@ static struct clk __init *kirkwood_register_gate(const char *name, u8 bit_idx) static struct clk __init *kirkwood_register_gate_fn(const char *name, u8 bit_idx, - void (*fn_en)(void), - void (*fn_dis)(void)) + void (*fn)(void)) { return clk_register_gate_fn(NULL, name, "tclk", 0, (void __iomem *)CLOCK_GATING_CTRL, - bit_idx, 0, &gating_lock, fn_en, fn_dis); + bit_idx, 0, &gating_lock, fn); } static struct clk *ge0, *ge1; @@ -243,18 +208,18 @@ void __init kirkwood_clk_init(void) ge0 = kirkwood_register_gate("ge0", CGC_BIT_GE0); ge1 = kirkwood_register_gate("ge1", CGC_BIT_GE1); sata0 = kirkwood_register_gate_fn("sata0", CGC_BIT_SATA0, - enable_sata0, disable_sata0); + disable_sata0); sata1 = kirkwood_register_gate_fn("sata1", CGC_BIT_SATA1, - enable_sata1, disable_sata1); + disable_sata1); usb0 = kirkwood_register_gate("usb0", CGC_BIT_USB0); sdio = kirkwood_register_gate("sdio", CGC_BIT_SDIO); crypto = kirkwood_register_gate("crypto", CGC_BIT_CRYPTO); xor0 = kirkwood_register_gate("xor0", CGC_BIT_XOR0); xor1 = kirkwood_register_gate("xor1", CGC_BIT_XOR1); pex0 = kirkwood_register_gate_fn("pex0", CGC_BIT_PEX0, - NULL, disable_pcie0); + disable_pcie0); pex1 = kirkwood_register_gate_fn("pex1", CGC_BIT_PEX1, - NULL, disable_pcie1); + disable_pcie1); audio = kirkwood_register_gate("audio", CGC_BIT_AUDIO); kirkwood_register_gate("tdm", CGC_BIT_TDM); kirkwood_register_gate("tsu", CGC_BIT_TSU); @@ -276,11 +241,6 @@ void __init kirkwood_clk_init(void) orion_clkdev_add("0", "pcie", pex0); orion_clkdev_add("1", "pcie", pex1); orion_clkdev_add(NULL, "kirkwood-i2s", audio); - - /* Marvell says runit is used by SPI, UART, NAND, TWSI, ..., - * so should never be gated. - */ - clk_prepare_enable(runit); } /***************************************************************************** diff --git a/trunk/arch/arm/mach-msm/platsmp.c b/trunk/arch/arm/mach-msm/platsmp.c index e012dc8391cf..db0117ec55f4 100644 --- a/trunk/arch/arm/mach-msm/platsmp.c +++ b/trunk/arch/arm/mach-msm/platsmp.c @@ -127,7 +127,7 @@ int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle) * the boot monitor to read the system wide flags register, * and branch to the address found there. */ - gic_raise_softirq(cpumask_of(cpu), 0); + gic_raise_softirq(cpumask_of(cpu), 1); timeout = jiffies + (1 * HZ); while (time_before(jiffies, timeout)) { diff --git a/trunk/arch/arm/mach-mxs/mach-mxs.c b/trunk/arch/arm/mach-mxs/mach-mxs.c index 8dabfe81d07c..648bdd05d38b 100644 --- a/trunk/arch/arm/mach-mxs/mach-mxs.c +++ b/trunk/arch/arm/mach-mxs/mach-mxs.c @@ -162,7 +162,7 @@ enum mac_oui { static void __init update_fec_mac_prop(enum mac_oui oui) { struct device_node *np, *from = NULL; - struct property *newmac; + struct property *oldmac, *newmac; const u32 *ocotp = mxs_get_ocotp(); u8 *macaddr; u32 val; @@ -208,7 +208,11 @@ static void __init update_fec_mac_prop(enum mac_oui oui) macaddr[4] = (val >> 8) & 0xff; macaddr[5] = (val >> 0) & 0xff; - prom_update_property(np, newmac); + oldmac = of_find_property(np, newmac->name, NULL); + if (oldmac) + prom_update_property(np, newmac, oldmac); + else + prom_add_property(np, newmac); } } diff --git a/trunk/arch/arm/mach-omap2/omap-smp.c b/trunk/arch/arm/mach-omap2/omap-smp.c index 9a35adf91232..7d118b9bdd5f 100644 --- a/trunk/arch/arm/mach-omap2/omap-smp.c +++ b/trunk/arch/arm/mach-omap2/omap-smp.c @@ -125,7 +125,7 @@ int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle) booted = true; } - gic_raise_softirq(cpumask_of(cpu), 0); + gic_raise_softirq(cpumask_of(cpu), 1); /* * Now the secondary core is starting up let it run its diff --git a/trunk/arch/arm/mach-pxa/eseries.h b/trunk/arch/arm/mach-pxa/eseries.h new file mode 100644 index 000000000000..b96949dd5adb --- /dev/null +++ b/trunk/arch/arm/mach-pxa/eseries.h @@ -0,0 +1,14 @@ +void __init eseries_fixup(struct tag *tags, char **cmdline, struct meminfo *mi); + +extern struct pxa2xx_udc_mach_info e7xx_udc_mach_info; +extern struct pxaficp_platform_data e7xx_ficp_platform_data; +extern int e7xx_irda_init(void); + +extern int eseries_tmio_enable(struct platform_device *dev); +extern int eseries_tmio_disable(struct platform_device *dev); +extern int eseries_tmio_suspend(struct platform_device *dev); +extern int eseries_tmio_resume(struct platform_device *dev); +extern void eseries_get_tmio_gpios(void); +extern struct resource eseries_tmio_resources[]; +extern struct platform_device e300_tc6387xb_device; + diff --git a/trunk/arch/arm/mach-pxa/hx4700.c b/trunk/arch/arm/mach-pxa/hx4700.c index e6311988add2..d3de84b0dcbe 100644 --- a/trunk/arch/arm/mach-pxa/hx4700.c +++ b/trunk/arch/arm/mach-pxa/hx4700.c @@ -296,11 +296,27 @@ static struct asic3_led asic3_leds[ASIC3_NUM_LEDS] = { static struct resource asic3_resources[] = { /* GPIO part */ - [0] = DEFINE_RES_MEM(ASIC3_PHYS, ASIC3_MAP_SIZE_16BIT), - [1] = DEFINE_RES_IRQ(PXA_GPIO_TO_IRQ(GPIO12_HX4700_ASIC3_IRQ)), + [0] = { + .start = ASIC3_PHYS, + .end = ASIC3_PHYS + ASIC3_MAP_SIZE_16BIT - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = PXA_GPIO_TO_IRQ(GPIO12_HX4700_ASIC3_IRQ), + .end = PXA_GPIO_TO_IRQ(GPIO12_HX4700_ASIC3_IRQ), + .flags = IORESOURCE_IRQ, + }, /* SD part */ - [2] = DEFINE_RES_MEM(ASIC3_SD_PHYS, ASIC3_MAP_SIZE_16BIT), - [3] = DEFINE_RES_IRQ(PXA_GPIO_TO_IRQ(GPIO66_HX4700_ASIC3_nSDIO_IRQ)), + [2] = { + .start = ASIC3_SD_PHYS, + .end = ASIC3_SD_PHYS + ASIC3_MAP_SIZE_16BIT - 1, + .flags = IORESOURCE_MEM, + }, + [3] = { + .start = PXA_GPIO_TO_IRQ(GPIO66_HX4700_ASIC3_nSDIO_IRQ), + .end = PXA_GPIO_TO_IRQ(GPIO66_HX4700_ASIC3_nSDIO_IRQ), + .flags = IORESOURCE_IRQ, + }, }; static struct asic3_platform_data asic3_platform_data = { @@ -327,7 +343,11 @@ static struct platform_device asic3 = { */ static struct resource egpio_resources[] = { - [0] = DEFINE_RES_MEM(PXA_CS5_PHYS, 0x4), + [0] = { + .start = PXA_CS5_PHYS, + .end = PXA_CS5_PHYS + 0x4 - 1, + .flags = IORESOURCE_MEM, + }, }; static struct htc_egpio_chip egpio_chips[] = { @@ -517,7 +537,11 @@ static struct w100fb_mach_info w3220_info = { }; static struct resource w3220_resources[] = { - [0] = DEFINE_RES_MEM(ATI_W3220_PHYS, SZ_16M), + [0] = { + .start = ATI_W3220_PHYS, + .end = ATI_W3220_PHYS + 0x00ffffff, + .flags = IORESOURCE_MEM, + }, }; static struct platform_device w3220 = { @@ -659,12 +683,20 @@ static struct pda_power_pdata power_supply_info = { }; static struct resource power_supply_resources[] = { - [0] = DEFINE_RES_NAMED(PXA_GPIO_TO_IRQ(GPIOD9_nAC_IN), 1, "ac", - IORESOURCE_IRQ | - IORESOURCE_IRQ_HIGHEDGE | IORESOURCE_IRQ_LOWEDGE), - [1] = DEFINE_RES_NAMED(PXA_GPIO_TO_IRQ(GPIOD14_nUSBC_DETECT), 1, "usb", - IORESOURCE_IRQ | - IORESOURCE_IRQ_HIGHEDGE | IORESOURCE_IRQ_LOWEDGE), + [0] = { + .name = "ac", + .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE | + IORESOURCE_IRQ_LOWEDGE, + .start = PXA_GPIO_TO_IRQ(GPIOD9_nAC_IN), + .end = PXA_GPIO_TO_IRQ(GPIOD9_nAC_IN), + }, + [1] = { + .name = "usb", + .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE | + IORESOURCE_IRQ_LOWEDGE, + .start = PXA_GPIO_TO_IRQ(GPIOD14_nUSBC_DETECT), + .end = PXA_GPIO_TO_IRQ(GPIOD14_nUSBC_DETECT), + }, }; static struct platform_device power_supply = { diff --git a/trunk/arch/arm/mach-pxa/include/mach/regs-ost.h b/trunk/arch/arm/mach-pxa/include/mach/regs-ost.h index 628819995c52..a3e5f86ef67e 100644 --- a/trunk/arch/arm/mach-pxa/include/mach/regs-ost.h +++ b/trunk/arch/arm/mach-pxa/include/mach/regs-ost.h @@ -7,17 +7,17 @@ * OS Timer & Match Registers */ -#define OSMR0 io_p2v(0x40A00000) /* */ -#define OSMR1 io_p2v(0x40A00004) /* */ -#define OSMR2 io_p2v(0x40A00008) /* */ -#define OSMR3 io_p2v(0x40A0000C) /* */ -#define OSMR4 io_p2v(0x40A00080) /* */ -#define OSCR io_p2v(0x40A00010) /* OS Timer Counter Register */ -#define OSCR4 io_p2v(0x40A00040) /* OS Timer Counter Register */ -#define OMCR4 io_p2v(0x40A000C0) /* */ -#define OSSR io_p2v(0x40A00014) /* OS Timer Status Register */ -#define OWER io_p2v(0x40A00018) /* OS Timer Watchdog Enable Register */ -#define OIER io_p2v(0x40A0001C) /* OS Timer Interrupt Enable Register */ +#define OSMR0 __REG(0x40A00000) /* */ +#define OSMR1 __REG(0x40A00004) /* */ +#define OSMR2 __REG(0x40A00008) /* */ +#define OSMR3 __REG(0x40A0000C) /* */ +#define OSMR4 __REG(0x40A00080) /* */ +#define OSCR __REG(0x40A00010) /* OS Timer Counter Register */ +#define OSCR4 __REG(0x40A00040) /* OS Timer Counter Register */ +#define OMCR4 __REG(0x40A000C0) /* */ +#define OSSR __REG(0x40A00014) /* OS Timer Status Register */ +#define OWER __REG(0x40A00018) /* OS Timer Watchdog Enable Register */ +#define OIER __REG(0x40A0001C) /* OS Timer Interrupt Enable Register */ #define OSSR_M3 (1 << 3) /* Match status channel 3 */ #define OSSR_M2 (1 << 2) /* Match status channel 2 */ diff --git a/trunk/arch/arm/mach-pxa/reset.c b/trunk/arch/arm/mach-pxa/reset.c index 3fab583755d4..b4528899ef08 100644 --- a/trunk/arch/arm/mach-pxa/reset.c +++ b/trunk/arch/arm/mach-pxa/reset.c @@ -77,10 +77,9 @@ static void do_gpio_reset(void) static void do_hw_reset(void) { /* Initialize the watchdog and let it fire */ - writel_relaxed(OWER_WME, OWER); - writel_relaxed(OSSR_M3, OSSR); - /* ... in 100 ms */ - writel_relaxed(readl_relaxed(OSCR) + 368640, OSMR3); + OWER = OWER_WME; + OSSR = OSSR_M3; + OSMR3 = OSCR + 368640; /* ... in 100 ms */ } void pxa_restart(char mode, const char *cmd) diff --git a/trunk/arch/arm/mach-pxa/time.c b/trunk/arch/arm/mach-pxa/time.c index 4bc47d63698b..3d6c9bd90de6 100644 --- a/trunk/arch/arm/mach-pxa/time.c +++ b/trunk/arch/arm/mach-pxa/time.c @@ -35,7 +35,7 @@ static u32 notrace pxa_read_sched_clock(void) { - return readl_relaxed(OSCR); + return OSCR; } @@ -47,8 +47,8 @@ pxa_ost0_interrupt(int irq, void *dev_id) struct clock_event_device *c = dev_id; /* Disarm the compare/match, signal the event. */ - writel_relaxed(readl_relaxed(OIER) & ~OIER_E0, OIER); - writel_relaxed(OSSR_M0, OSSR); + OIER &= ~OIER_E0; + OSSR = OSSR_M0; c->event_handler(c); return IRQ_HANDLED; @@ -59,10 +59,10 @@ pxa_osmr0_set_next_event(unsigned long delta, struct clock_event_device *dev) { unsigned long next, oscr; - writel_relaxed(readl_relaxed(OIER) | OIER_E0, OIER); - next = readl_relaxed(OSCR) + delta; - writel_relaxed(next, OSMR0); - oscr = readl_relaxed(OSCR); + OIER |= OIER_E0; + next = OSCR + delta; + OSMR0 = next; + oscr = OSCR; return (signed)(next - oscr) <= MIN_OSCR_DELTA ? -ETIME : 0; } @@ -72,15 +72,15 @@ pxa_osmr0_set_mode(enum clock_event_mode mode, struct clock_event_device *dev) { switch (mode) { case CLOCK_EVT_MODE_ONESHOT: - writel_relaxed(readl_relaxed(OIER) & ~OIER_E0, OIER); - writel_relaxed(OSSR_M0, OSSR); + OIER &= ~OIER_E0; + OSSR = OSSR_M0; break; case CLOCK_EVT_MODE_UNUSED: case CLOCK_EVT_MODE_SHUTDOWN: /* initializing, released, or preparing for suspend */ - writel_relaxed(readl_relaxed(OIER) & ~OIER_E0, OIER); - writel_relaxed(OSSR_M0, OSSR); + OIER &= ~OIER_E0; + OSSR = OSSR_M0; break; case CLOCK_EVT_MODE_RESUME: @@ -108,8 +108,8 @@ static void __init pxa_timer_init(void) { unsigned long clock_tick_rate = get_clock_tick_rate(); - writel_relaxed(0, OIER); - writel_relaxed(OSSR_M0 | OSSR_M1 | OSSR_M2 | OSSR_M3, OSSR); + OIER = 0; + OSSR = OSSR_M0 | OSSR_M1 | OSSR_M2 | OSSR_M3; setup_sched_clock(pxa_read_sched_clock, 32, clock_tick_rate); @@ -122,7 +122,7 @@ static void __init pxa_timer_init(void) setup_irq(IRQ_OST0, &pxa_ost0_irq); - clocksource_mmio_init(OSCR, "oscr0", clock_tick_rate, 200, 32, + clocksource_mmio_init(&OSCR, "oscr0", clock_tick_rate, 200, 32, clocksource_mmio_readl_up); clockevents_register_device(&ckevt_pxa_osmr0); } @@ -132,12 +132,12 @@ static unsigned long osmr[4], oier, oscr; static void pxa_timer_suspend(void) { - osmr[0] = readl_relaxed(OSMR0); - osmr[1] = readl_relaxed(OSMR1); - osmr[2] = readl_relaxed(OSMR2); - osmr[3] = readl_relaxed(OSMR3); - oier = readl_relaxed(OIER); - oscr = readl_relaxed(OSCR); + osmr[0] = OSMR0; + osmr[1] = OSMR1; + osmr[2] = OSMR2; + osmr[3] = OSMR3; + oier = OIER; + oscr = OSCR; } static void pxa_timer_resume(void) @@ -151,12 +151,12 @@ static void pxa_timer_resume(void) if (osmr[0] - oscr < MIN_OSCR_DELTA) osmr[0] += MIN_OSCR_DELTA; - writel_relaxed(osmr[0], OSMR0); - writel_relaxed(osmr[1], OSMR1); - writel_relaxed(osmr[2], OSMR2); - writel_relaxed(osmr[3], OSMR3); - writel_relaxed(oier, OIER); - writel_relaxed(oscr, OSCR); + OSMR0 = osmr[0]; + OSMR1 = osmr[1]; + OSMR2 = osmr[2]; + OSMR3 = osmr[3]; + OIER = oier; + OSCR = oscr; } #else #define pxa_timer_suspend NULL diff --git a/trunk/arch/arm/mach-s3c64xx/include/mach/pm-core.h b/trunk/arch/arm/mach-s3c64xx/include/mach/pm-core.h index c0537f40a3d8..fcf3dcabb694 100644 --- a/trunk/arch/arm/mach-s3c64xx/include/mach/pm-core.h +++ b/trunk/arch/arm/mach-s3c64xx/include/mach/pm-core.h @@ -12,9 +12,6 @@ * published by the Free Software Foundation. */ -#ifndef __MACH_S3C64XX_PM_CORE_H -#define __MACH_S3C64XX_PM_CORE_H __FILE__ - #include static inline void s3c_pm_debug_init_uart(void) @@ -116,4 +113,3 @@ static inline void samsung_pm_saved_gpios(void) __raw_writel(S3C64XX_SLPEN_USE_xSLP, S3C64XX_SLPEN); } -#endif /* __MACH_S3C64XX_PM_CORE_H */ diff --git a/trunk/arch/arm/mach-sa1100/assabet.c b/trunk/arch/arm/mach-sa1100/assabet.c index d673211f121c..d1dc7f1a239c 100644 --- a/trunk/arch/arm/mach-sa1100/assabet.c +++ b/trunk/arch/arm/mach-sa1100/assabet.c @@ -362,7 +362,7 @@ static void __init assabet_init(void) static void __init map_sa1100_gpio_regs( void ) { unsigned long phys = __PREG(GPLR) & PMD_MASK; - unsigned long virt = (unsigned long)io_p2v(phys); + unsigned long virt = io_p2v(phys); int prot = PMD_TYPE_SECT | PMD_SECT_AP_WRITE | PMD_DOMAIN(DOMAIN_IO); pmd_t *pmd; diff --git a/trunk/arch/arm/mach-sa1100/cpu-sa1100.c b/trunk/arch/arm/mach-sa1100/cpu-sa1100.c index e8f4d1e19233..19b2053f5af4 100644 --- a/trunk/arch/arm/mach-sa1100/cpu-sa1100.c +++ b/trunk/arch/arm/mach-sa1100/cpu-sa1100.c @@ -87,7 +87,6 @@ #include #include #include -#include #include diff --git a/trunk/arch/arm/mach-sa1100/cpu-sa1110.c b/trunk/arch/arm/mach-sa1100/cpu-sa1110.c index 48c45b0c92bb..675bf8ef97e8 100644 --- a/trunk/arch/arm/mach-sa1100/cpu-sa1110.c +++ b/trunk/arch/arm/mach-sa1100/cpu-sa1110.c @@ -19,7 +19,6 @@ #include #include #include -#include #include #include #include diff --git a/trunk/arch/arm/mach-sa1100/include/mach/SA-1100.h b/trunk/arch/arm/mach-sa1100/include/mach/SA-1100.h index 0ac6cc08a19c..3f2d1b60188c 100644 --- a/trunk/arch/arm/mach-sa1100/include/mach/SA-1100.h +++ b/trunk/arch/arm/mach-sa1100/include/mach/SA-1100.h @@ -830,14 +830,14 @@ * (read/write). */ -#define OSMR0 io_p2v(0x90000000) /* OS timer Match Reg. 0 */ -#define OSMR1 io_p2v(0x90000004) /* OS timer Match Reg. 1 */ -#define OSMR2 io_p2v(0x90000008) /* OS timer Match Reg. 2 */ -#define OSMR3 io_p2v(0x9000000c) /* OS timer Match Reg. 3 */ -#define OSCR io_p2v(0x90000010) /* OS timer Counter Reg. */ -#define OSSR io_p2v(0x90000014) /* OS timer Status Reg. */ -#define OWER io_p2v(0x90000018) /* OS timer Watch-dog Enable Reg. */ -#define OIER io_p2v(0x9000001C) /* OS timer Interrupt Enable Reg. */ +#define OSMR0 __REG(0x90000000) /* OS timer Match Reg. 0 */ +#define OSMR1 __REG(0x90000004) /* OS timer Match Reg. 1 */ +#define OSMR2 __REG(0x90000008) /* OS timer Match Reg. 2 */ +#define OSMR3 __REG(0x9000000c) /* OS timer Match Reg. 3 */ +#define OSCR __REG(0x90000010) /* OS timer Counter Reg. */ +#define OSSR __REG(0x90000014 ) /* OS timer Status Reg. */ +#define OWER __REG(0x90000018 ) /* OS timer Watch-dog Enable Reg. */ +#define OIER __REG(0x9000001C ) /* OS timer Interrupt Enable Reg. */ #define OSSR_M(Nb) /* Match detected [0..3] */ \ (0x00000001 << (Nb)) diff --git a/trunk/arch/arm/mach-sa1100/include/mach/gpio.h b/trunk/arch/arm/mach-sa1100/include/mach/gpio.h index 6a9eecf3137e..a38fc4f54241 100644 --- a/trunk/arch/arm/mach-sa1100/include/mach/gpio.h +++ b/trunk/arch/arm/mach-sa1100/include/mach/gpio.h @@ -24,7 +24,6 @@ #ifndef __ASM_ARCH_SA1100_GPIO_H #define __ASM_ARCH_SA1100_GPIO_H -#include #include #include #include diff --git a/trunk/arch/arm/mach-sa1100/include/mach/hardware.h b/trunk/arch/arm/mach-sa1100/include/mach/hardware.h index cbedd75a9d65..99f5856d8de4 100644 --- a/trunk/arch/arm/mach-sa1100/include/mach/hardware.h +++ b/trunk/arch/arm/mach-sa1100/include/mach/hardware.h @@ -32,7 +32,7 @@ #define PIO_START 0x80000000 /* physical start of IO space */ #define io_p2v( x ) \ - IOMEM( (((x)&0x00ffffff) | (((x)&0x30000000)>>VIO_SHIFT)) + VIO_BASE ) + ( (((x)&0x00ffffff) | (((x)&0x30000000)>>VIO_SHIFT)) + VIO_BASE ) #define io_v2p( x ) \ ( (((x)&0x00ffffff) | (((x)&(0x30000000>>VIO_SHIFT))< @@ -58,7 +56,7 @@ #define cpu_is_sa1100() ((read_cpuid_id() & CPU_SA1100_MASK) == CPU_SA1100_ID) #define cpu_is_sa1110() ((read_cpuid_id() & CPU_SA1110_MASK) == CPU_SA1110_ID) -# define __REG(x) (*((volatile unsigned long __iomem *)io_p2v(x))) +# define __REG(x) (*((volatile unsigned long *)io_p2v(x))) # define __PREG(x) (io_v2p((unsigned long)&(x))) static inline unsigned long get_clock_tick_rate(void) diff --git a/trunk/arch/arm/mach-sa1100/include/mach/uncompress.h b/trunk/arch/arm/mach-sa1100/include/mach/uncompress.h index 5cf71da60e42..6cb39ddde656 100644 --- a/trunk/arch/arm/mach-sa1100/include/mach/uncompress.h +++ b/trunk/arch/arm/mach-sa1100/include/mach/uncompress.h @@ -8,8 +8,6 @@ #include "hardware.h" -#define IOMEM(x) (x) - /* * The following code assumes the serial port has already been * initialized by the bootloader. We search for the first enabled diff --git a/trunk/arch/arm/mach-sa1100/irq.c b/trunk/arch/arm/mach-sa1100/irq.c index 2124f1fc2fbe..516ccc25d7fd 100644 --- a/trunk/arch/arm/mach-sa1100/irq.c +++ b/trunk/arch/arm/mach-sa1100/irq.c @@ -12,7 +12,6 @@ #include #include #include -#include #include #include #include diff --git a/trunk/arch/arm/mach-sa1100/jornada720_ssp.c b/trunk/arch/arm/mach-sa1100/jornada720_ssp.c index 7f07f08d8968..b412fc09c80c 100644 --- a/trunk/arch/arm/mach-sa1100/jornada720_ssp.c +++ b/trunk/arch/arm/mach-sa1100/jornada720_ssp.c @@ -18,7 +18,6 @@ #include #include #include -#include #include #include diff --git a/trunk/arch/arm/mach-sa1100/leds-cerf.c b/trunk/arch/arm/mach-sa1100/leds-cerf.c index 30fc3b2bf555..040540fb7d8a 100644 --- a/trunk/arch/arm/mach-sa1100/leds-cerf.c +++ b/trunk/arch/arm/mach-sa1100/leds-cerf.c @@ -4,7 +4,6 @@ * Author: ??? */ #include -#include #include #include diff --git a/trunk/arch/arm/mach-sa1100/leds-lart.c b/trunk/arch/arm/mach-sa1100/leds-lart.c index 50a5b143b460..a51830c60e53 100644 --- a/trunk/arch/arm/mach-sa1100/leds-lart.c +++ b/trunk/arch/arm/mach-sa1100/leds-lart.c @@ -10,7 +10,6 @@ * pace of the LED. */ #include -#include #include #include diff --git a/trunk/arch/arm/mach-sa1100/pm.c b/trunk/arch/arm/mach-sa1100/pm.c index 6645d1e31f14..690cf0ce5c0c 100644 --- a/trunk/arch/arm/mach-sa1100/pm.c +++ b/trunk/arch/arm/mach-sa1100/pm.c @@ -23,7 +23,6 @@ * Storage is local on the stack now. */ #include -#include #include #include #include diff --git a/trunk/arch/arm/mach-sa1100/sleep.S b/trunk/arch/arm/mach-sa1100/sleep.S index 85863741ef8b..30cc6721665b 100644 --- a/trunk/arch/arm/mach-sa1100/sleep.S +++ b/trunk/arch/arm/mach-sa1100/sleep.S @@ -38,9 +38,9 @@ ENTRY(sa1100_finish_suspend) orr r4, r4, #MDREFR_K1DB2 ldr r5, =PPCR - @ Pre-load __loop_udelay into the I-cache + @ Pre-load __udelay into the I-cache mov r0, #1 - bl __loop_udelay + bl __udelay mov r0, r0 @ The following must all exist in a single cache line to @@ -53,11 +53,11 @@ ENTRY(sa1100_finish_suspend) @ delay 90us and set CPU PLL to lowest speed @ fixes resume problem on high speed SA1110 mov r0, #90 - bl __loop_udelay + bl __udelay mov r1, #0 str r1, [r5] mov r0, #90 - bl __loop_udelay + bl __udelay /* * SA1110 SDRAM controller workaround. register values: diff --git a/trunk/arch/arm/mach-sa1100/time.c b/trunk/arch/arm/mach-sa1100/time.c index 80702c9ecc77..6af26e8d55e6 100644 --- a/trunk/arch/arm/mach-sa1100/time.c +++ b/trunk/arch/arm/mach-sa1100/time.c @@ -22,7 +22,7 @@ static u32 notrace sa1100_read_sched_clock(void) { - return readl_relaxed(OSCR); + return OSCR; } #define MIN_OSCR_DELTA 2 @@ -32,8 +32,8 @@ static irqreturn_t sa1100_ost0_interrupt(int irq, void *dev_id) struct clock_event_device *c = dev_id; /* Disarm the compare/match, signal the event. */ - writel_relaxed(readl_relaxed(OIER) & ~OIER_E0, OIER); - writel_relaxed(OSSR_M0, OSSR); + OIER &= ~OIER_E0; + OSSR = OSSR_M0; c->event_handler(c); return IRQ_HANDLED; @@ -44,10 +44,10 @@ sa1100_osmr0_set_next_event(unsigned long delta, struct clock_event_device *c) { unsigned long next, oscr; - writel_relaxed(readl_relaxed(OIER) | OIER_E0, OIER); - next = readl_relaxed(OSCR) + delta; - writel_relaxed(next, OSMR0); - oscr = readl_relaxed(OSCR); + OIER |= OIER_E0; + next = OSCR + delta; + OSMR0 = next; + oscr = OSCR; return (signed)(next - oscr) <= MIN_OSCR_DELTA ? -ETIME : 0; } @@ -59,8 +59,8 @@ sa1100_osmr0_set_mode(enum clock_event_mode mode, struct clock_event_device *c) case CLOCK_EVT_MODE_ONESHOT: case CLOCK_EVT_MODE_UNUSED: case CLOCK_EVT_MODE_SHUTDOWN: - writel_relaxed(readl_relaxed(OIER) & ~OIER_E0, OIER); - writel_relaxed(OSSR_M0, OSSR); + OIER &= ~OIER_E0; + OSSR = OSSR_M0; break; case CLOCK_EVT_MODE_RESUME: @@ -86,8 +86,8 @@ static struct irqaction sa1100_timer_irq = { static void __init sa1100_timer_init(void) { - writel_relaxed(0, OIER); - writel_relaxed(OSSR_M0 | OSSR_M1 | OSSR_M2 | OSSR_M3, OSSR); + OIER = 0; + OSSR = OSSR_M0 | OSSR_M1 | OSSR_M2 | OSSR_M3; setup_sched_clock(sa1100_read_sched_clock, 32, 3686400); @@ -100,7 +100,7 @@ static void __init sa1100_timer_init(void) setup_irq(IRQ_OST0, &sa1100_timer_irq); - clocksource_mmio_init(OSCR, "oscr", CLOCK_TICK_RATE, 200, 32, + clocksource_mmio_init(&OSCR, "oscr", CLOCK_TICK_RATE, 200, 32, clocksource_mmio_readl_up); clockevents_register_device(&ckevt_sa1100_osmr0); } @@ -110,26 +110,26 @@ unsigned long osmr[4], oier; static void sa1100_timer_suspend(void) { - osmr[0] = readl_relaxed(OSMR0); - osmr[1] = readl_relaxed(OSMR1); - osmr[2] = readl_relaxed(OSMR2); - osmr[3] = readl_relaxed(OSMR3); - oier = readl_relaxed(OIER); + osmr[0] = OSMR0; + osmr[1] = OSMR1; + osmr[2] = OSMR2; + osmr[3] = OSMR3; + oier = OIER; } static void sa1100_timer_resume(void) { - writel_relaxed(0x0f, OSSR); - writel_relaxed(osmr[0], OSMR0); - writel_relaxed(osmr[1], OSMR1); - writel_relaxed(osmr[2], OSMR2); - writel_relaxed(osmr[3], OSMR3); - writel_relaxed(oier, OIER); + OSSR = 0x0f; + OSMR0 = osmr[0]; + OSMR1 = osmr[1]; + OSMR2 = osmr[2]; + OSMR3 = osmr[3]; + OIER = oier; /* * OSMR0 is the system timer: make sure OSCR is sufficiently behind */ - writel_relaxed(OSMR0 - LATCH, OSCR); + OSCR = OSMR0 - LATCH; } #else #define sa1100_timer_suspend NULL diff --git a/trunk/arch/arm/mach-shmobile/Kconfig b/trunk/arch/arm/mach-shmobile/Kconfig index 4cacc2d22fbe..df33909205e2 100644 --- a/trunk/arch/arm/mach-shmobile/Kconfig +++ b/trunk/arch/arm/mach-shmobile/Kconfig @@ -19,7 +19,6 @@ config ARCH_SH7372 select CPU_V7 select SH_CLK_CPG select ARCH_WANT_OPTIONAL_GPIOLIB - select ARM_CPU_SUSPEND if PM || CPU_IDLE config ARCH_SH73A0 bool "SH-Mobile AG5 (R8A73A00)" @@ -59,7 +58,6 @@ config MACH_G4EVM bool "G4EVM board" depends on ARCH_SH7377 select ARCH_REQUIRE_GPIOLIB - select REGULATOR_FIXED_VOLTAGE if REGULATOR config MACH_AP4EVB bool "AP4EVB board" @@ -67,7 +65,6 @@ config MACH_AP4EVB select ARCH_REQUIRE_GPIOLIB select SH_LCD_MIPI_DSI select SND_SOC_AK4642 if SND_SIMPLE_CARD - select REGULATOR_FIXED_VOLTAGE if REGULATOR choice prompt "AP4EVB LCD panel selection" @@ -86,7 +83,6 @@ config MACH_AG5EVM bool "AG5EVM board" select ARCH_REQUIRE_GPIOLIB select SH_LCD_MIPI_DSI - select REGULATOR_FIXED_VOLTAGE if REGULATOR depends on ARCH_SH73A0 config MACH_MACKEREL @@ -94,18 +90,15 @@ config MACH_MACKEREL depends on ARCH_SH7372 select ARCH_REQUIRE_GPIOLIB select SND_SOC_AK4642 if SND_SIMPLE_CARD - select REGULATOR_FIXED_VOLTAGE if REGULATOR config MACH_KOTA2 bool "KOTA2 board" select ARCH_REQUIRE_GPIOLIB - select REGULATOR_FIXED_VOLTAGE if REGULATOR depends on ARCH_SH73A0 config MACH_BONITO bool "bonito board" select ARCH_REQUIRE_GPIOLIB - select REGULATOR_FIXED_VOLTAGE if REGULATOR depends on ARCH_R8A7740 config MACH_ARMADILLO800EVA @@ -113,28 +106,22 @@ config MACH_ARMADILLO800EVA depends on ARCH_R8A7740 select ARCH_REQUIRE_GPIOLIB select USE_OF - select REGULATOR_FIXED_VOLTAGE if REGULATOR - select SND_SOC_WM8978 if SND_SIMPLE_CARD config MACH_MARZEN bool "MARZEN board" depends on ARCH_R8A7779 select ARCH_REQUIRE_GPIOLIB - select REGULATOR_FIXED_VOLTAGE if REGULATOR config MACH_KZM9D bool "KZM9D board" depends on ARCH_EMEV2 select USE_OF - select REGULATOR_FIXED_VOLTAGE if REGULATOR config MACH_KZM9G bool "KZM-A9-GT board" depends on ARCH_SH73A0 select ARCH_REQUIRE_GPIOLIB select USE_OF - select SND_SOC_AK4642 if SND_SIMPLE_CARD - select REGULATOR_FIXED_VOLTAGE if REGULATOR comment "SH-Mobile System Configuration" diff --git a/trunk/arch/arm/mach-shmobile/Makefile b/trunk/arch/arm/mach-shmobile/Makefile index 0df5ae6740c6..8aa1962c22a2 100644 --- a/trunk/arch/arm/mach-shmobile/Makefile +++ b/trunk/arch/arm/mach-shmobile/Makefile @@ -39,9 +39,7 @@ obj-$(CONFIG_ARCH_R8A7740) += entry-intc.o # PM objects obj-$(CONFIG_SUSPEND) += suspend.o obj-$(CONFIG_CPU_IDLE) += cpuidle.o -obj-$(CONFIG_ARCH_SHMOBILE) += pm-rmobile.o obj-$(CONFIG_ARCH_SH7372) += pm-sh7372.o sleep-sh7372.o -obj-$(CONFIG_ARCH_R8A7740) += pm-r8a7740.o obj-$(CONFIG_ARCH_R8A7779) += pm-r8a7779.o # Board objects diff --git a/trunk/arch/arm/mach-shmobile/board-ag5evm.c b/trunk/arch/arm/mach-shmobile/board-ag5evm.c index d82c010fdfc6..5a6f22f05e99 100644 --- a/trunk/arch/arm/mach-shmobile/board-ag5evm.c +++ b/trunk/arch/arm/mach-shmobile/board-ag5evm.c @@ -27,8 +27,6 @@ #include #include #include -#include -#include #include #include #include @@ -54,12 +52,6 @@ #include #include -/* Dummy supplies, where voltage doesn't matter */ -static struct regulator_consumer_supply dummy_supplies[] = { - REGULATOR_SUPPLY("vddvario", "smsc911x"), - REGULATOR_SUPPLY("vdd33a", "smsc911x"), -}; - static struct resource smsc9220_resources[] = { [0] = { .start = 0x14000000, @@ -150,13 +142,6 @@ static struct platform_device fsi_device = { .resource = fsi_resources, }; -/* Fixed 1.8V regulator to be used by MMCIF */ -static struct regulator_consumer_supply fixed1v8_power_consumers[] = -{ - REGULATOR_SUPPLY("vmmc", "sh_mmcif.0"), - REGULATOR_SUPPLY("vqmmc", "sh_mmcif.0"), -}; - static struct resource sh_mmcif_resources[] = { [0] = { .name = "MMCIF", @@ -379,13 +364,6 @@ static struct platform_device mipidsi0_device = { }, }; -/* Fixed 2.8V regulators to be used by SDHI0 */ -static struct regulator_consumer_supply fixed2v8_power_consumers[] = -{ - REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.0"), - REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.0"), -}; - /* SDHI0 */ static struct sh_mobile_sdhi_info sdhi0_info = { .dma_slave_tx = SHDMA_SLAVE_SDHI0_TX, @@ -430,57 +408,8 @@ static struct platform_device sdhi0_device = { }, }; -/* Fixed 3.3V regulator to be used by SDHI1 */ -static struct regulator_consumer_supply cn4_power_consumers[] = +void ag5evm_sdhi1_set_pwr(struct platform_device *pdev, int state) { - REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.1"), - REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.1"), -}; - -static struct regulator_init_data cn4_power_init_data = { - .constraints = { - .valid_ops_mask = REGULATOR_CHANGE_STATUS, - }, - .num_consumer_supplies = ARRAY_SIZE(cn4_power_consumers), - .consumer_supplies = cn4_power_consumers, -}; - -static struct fixed_voltage_config cn4_power_info = { - .supply_name = "CN4 SD/MMC Vdd", - .microvolts = 3300000, - .gpio = GPIO_PORT114, - .enable_high = 1, - .init_data = &cn4_power_init_data, -}; - -static struct platform_device cn4_power = { - .name = "reg-fixed-voltage", - .id = 2, - .dev = { - .platform_data = &cn4_power_info, - }, -}; - -static void ag5evm_sdhi1_set_pwr(struct platform_device *pdev, int state) -{ - static int power_gpio = -EINVAL; - - if (power_gpio < 0) { - int ret = gpio_request(GPIO_PORT114, "sdhi1_power"); - if (!ret) { - power_gpio = GPIO_PORT114; - gpio_direction_output(power_gpio, 0); - } - } - - /* - * If requesting the GPIO above failed, it means, that the regulator got - * probed and grabbed the GPIO, but we don't know, whether the sdhi - * driver already uses the regulator. If it doesn't, we have to toggle - * the GPIO ourselves, even though it is now owned by the fixed - * regulator driver. We have to live with the race in case the driver - * gets unloaded and the GPIO freed between these two steps. - */ gpio_set_value(GPIO_PORT114, state); } @@ -526,7 +455,6 @@ static struct platform_device sdhi1_device = { }; static struct platform_device *ag5evm_devices[] __initdata = { - &cn4_power, ð_device, &keysc_device, &fsi_device, @@ -540,12 +468,6 @@ static struct platform_device *ag5evm_devices[] __initdata = { static void __init ag5evm_init(void) { - regulator_register_always_on(0, "fixed-1.8V", fixed1v8_power_consumers, - ARRAY_SIZE(fixed1v8_power_consumers), 1800000); - regulator_register_always_on(1, "fixed-2.8V", fixed2v8_power_consumers, - ARRAY_SIZE(fixed2v8_power_consumers), 3300000); - regulator_register_fixed(3, dummy_supplies, ARRAY_SIZE(dummy_supplies)); - sh73a0_pinmux_init(); /* enable SCIFA2 */ @@ -640,6 +562,8 @@ static void __init ag5evm_init(void) gpio_request(GPIO_FN_SDHID1_2_PU, NULL); gpio_request(GPIO_FN_SDHID1_1_PU, NULL); gpio_request(GPIO_FN_SDHID1_0_PU, NULL); + gpio_request(GPIO_PORT114, "sdhi1_power"); + gpio_direction_output(GPIO_PORT114, 0); #ifdef CONFIG_CACHE_L2X0 /* Shared attribute override enable, 64K*8way */ diff --git a/trunk/arch/arm/mach-shmobile/board-ap4evb.c b/trunk/arch/arm/mach-shmobile/board-ap4evb.c index f172ca85905c..ace60246a5df 100644 --- a/trunk/arch/arm/mach-shmobile/board-ap4evb.c +++ b/trunk/arch/arm/mach-shmobile/board-ap4evb.c @@ -34,8 +34,6 @@ #include #include #include -#include -#include #include #include #include @@ -161,27 +159,6 @@ * CN12: 3.3v */ -/* Dummy supplies, where voltage doesn't matter */ -static struct regulator_consumer_supply fixed1v8_power_consumers[] = -{ - /* J22 default position: 1.8V */ - REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.1"), - REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.1"), - REGULATOR_SUPPLY("vmmc", "sh_mmcif.0"), - REGULATOR_SUPPLY("vqmmc", "sh_mmcif.0"), -}; - -static struct regulator_consumer_supply fixed3v3_power_consumers[] = -{ - REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.0"), - REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.0"), -}; - -static struct regulator_consumer_supply dummy_supplies[] = { - REGULATOR_SUPPLY("vddvario", "smsc911x"), - REGULATOR_SUPPLY("vdd33a", "smsc911x"), -}; - /* MTD */ static struct mtd_partition nor_flash_partitions[] = { { @@ -1161,6 +1138,21 @@ static void __init fsi_init_pm_clock(void) clk_put(fsia_ick); } +/* + * FIXME !! + * + * gpio_no_direction + * are quick_hack. + * + * current gpio frame work doesn't have + * the method to control only pull up/down/free. + * this function should be replaced by correct gpio function + */ +static void __init gpio_no_direction(u32 addr) +{ + __raw_writeb(0x00, addr); +} + /* TouchScreen */ #ifdef CONFIG_AP4EVB_QHD # define GPIO_TSC_IRQ GPIO_FN_IRQ28_123 @@ -1232,12 +1224,6 @@ static void __init ap4evb_init(void) u32 srcr4; struct clk *clk; - regulator_register_always_on(0, "fixed-1.8V", fixed1v8_power_consumers, - ARRAY_SIZE(fixed1v8_power_consumers), 1800000); - regulator_register_always_on(1, "fixed-3.3V", fixed3v3_power_consumers, - ARRAY_SIZE(fixed3v3_power_consumers), 3300000); - regulator_register_fixed(2, dummy_supplies, ARRAY_SIZE(dummy_supplies)); - /* External clock source */ clk_set_rate(&sh7372_dv_clki_clk, 27000000); @@ -1316,8 +1302,8 @@ static void __init ap4evb_init(void) gpio_request(GPIO_PORT9, NULL); gpio_request(GPIO_PORT10, NULL); - gpio_direction_none(GPIO_PORT9CR); /* FSIAOBT needs no direction */ - gpio_direction_none(GPIO_PORT10CR); /* FSIAOLR needs no direction */ + gpio_no_direction(GPIO_PORT9CR); /* FSIAOBT needs no direction */ + gpio_no_direction(GPIO_PORT10CR); /* FSIAOLR needs no direction */ /* card detect pin for MMC slot (CN7) */ gpio_request(GPIO_PORT41, NULL); @@ -1461,14 +1447,14 @@ static void __init ap4evb_init(void) platform_add_devices(ap4evb_devices, ARRAY_SIZE(ap4evb_devices)); - rmobile_add_device_to_domain(&sh7372_pd_a4lc, &lcdc1_device); - rmobile_add_device_to_domain(&sh7372_pd_a4lc, &lcdc_device); - rmobile_add_device_to_domain(&sh7372_pd_a4mp, &fsi_device); + sh7372_add_device_to_domain(&sh7372_a4lc, &lcdc1_device); + sh7372_add_device_to_domain(&sh7372_a4lc, &lcdc_device); + sh7372_add_device_to_domain(&sh7372_a4mp, &fsi_device); - rmobile_add_device_to_domain(&sh7372_pd_a3sp, &sh_mmcif_device); - rmobile_add_device_to_domain(&sh7372_pd_a3sp, &sdhi0_device); - rmobile_add_device_to_domain(&sh7372_pd_a3sp, &sdhi1_device); - rmobile_add_device_to_domain(&sh7372_pd_a4r, &ceu_device); + sh7372_add_device_to_domain(&sh7372_a3sp, &sh_mmcif_device); + sh7372_add_device_to_domain(&sh7372_a3sp, &sdhi0_device); + sh7372_add_device_to_domain(&sh7372_a3sp, &sdhi1_device); + sh7372_add_device_to_domain(&sh7372_a4r, &ceu_device); hdmi_init_pm_clock(); fsi_init_pm_clock(); diff --git a/trunk/arch/arm/mach-shmobile/board-armadillo800eva.c b/trunk/arch/arm/mach-shmobile/board-armadillo800eva.c index cf10f92856dc..9bd135531d76 100644 --- a/trunk/arch/arm/mach-shmobile/board-armadillo800eva.c +++ b/trunk/arch/arm/mach-shmobile/board-armadillo800eva.c @@ -28,8 +28,6 @@ #include #include #include -#include -#include #include #include #include @@ -39,20 +37,14 @@ #include #include #include -#include -#include -#include -#include #include #include #include #include #include #include +#include #include