diff --git a/[refs] b/[refs] index c0d010ac9278..07c82cb415cc 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 0aac881246fb25d017617cd7be68e93326d51ce1 +refs/heads/master: 645c56a75882830c0ba6e7461f07d099a9c87e69 diff --git a/trunk/arch/arm/Kconfig b/trunk/arch/arm/Kconfig index 7d809b7e0504..a48aecc17eac 100644 --- a/trunk/arch/arm/Kconfig +++ b/trunk/arch/arm/Kconfig @@ -186,9 +186,6 @@ config GENERIC_ISA_DMA config FIQ bool -config NEED_RET_TO_USER - bool - config ARCH_MTD_XIP bool @@ -482,7 +479,6 @@ config ARCH_IOP13XX select ARCH_SUPPORTS_MSI select VMSPLIT_1G select NEED_MACH_MEMORY_H - select NEED_RET_TO_USER help Support for Intel's IOP13XX (XScale) family of processors. @@ -490,7 +486,6 @@ config ARCH_IOP32X bool "IOP32x-based" depends on MMU select CPU_XSCALE - select NEED_RET_TO_USER select PLAT_IOP select PCI select ARCH_REQUIRE_GPIOLIB @@ -502,7 +497,6 @@ config ARCH_IOP33X bool "IOP33x-based" depends on MMU select CPU_XSCALE - select NEED_RET_TO_USER select PLAT_IOP select PCI select ARCH_REQUIRE_GPIOLIB diff --git a/trunk/arch/arm/Kconfig.debug b/trunk/arch/arm/Kconfig.debug index 03646c4c13d1..e0d236d7ff73 100644 --- a/trunk/arch/arm/Kconfig.debug +++ b/trunk/arch/arm/Kconfig.debug @@ -81,6 +81,25 @@ choice prompt "Kernel low-level debugging port" depends on DEBUG_LL + config DEBUG_LL_UART_NONE + bool "No low-level debugging UART" + help + Say Y here if your platform doesn't provide a UART option + below. This relies on your platform choosing the right UART + definition internally in order for low-level debugging to + work. + + config DEBUG_ICEDCC + bool "Kernel low-level debugging via EmbeddedICE DCC channel" + help + Say Y here if you want the debug print routines to direct + their output to the EmbeddedICE macrocell's DCC channel using + co-processor 14. This is known to work on the ARM9 style ICE + channel and on the XScale with the PEEDI. + + Note that the system will appear to hang during boot if there + is nothing connected to read from the DCC. + config AT91_DEBUG_LL_DBGU0 bool "Kernel low-level debugging on rm9200, 9260/9g20, 9261/9g10 and 9rl" depends on HAVE_AT91_DBGU0 @@ -89,6 +108,20 @@ choice bool "Kernel low-level debugging on 9263, 9g45 and cap9" depends on HAVE_AT91_DBGU1 + config DEBUG_FOOTBRIDGE_COM1 + bool "Kernel low-level debugging messages via footbridge 8250 at PCI COM1" + depends on FOOTBRIDGE + help + Say Y here if you want the debug print routines to direct + their output to the 8250 at PCI COM1. + + config DEBUG_DC21285_PORT + bool "Kernel low-level debugging messages via footbridge serial port" + depends on FOOTBRIDGE + help + Say Y here if you want the debug print routines to direct + their output to the serial port in the DC21285 (Footbridge). + config DEBUG_CLPS711X_UART1 bool "Kernel low-level debugging messages via UART1" depends on ARCH_CLPS711X @@ -103,20 +136,6 @@ choice Say Y here if you want the debug print routines to direct their output to the second serial port on these devices. - config DEBUG_DC21285_PORT - bool "Kernel low-level debugging messages via footbridge serial port" - depends on FOOTBRIDGE - help - Say Y here if you want the debug print routines to direct - their output to the serial port in the DC21285 (Footbridge). - - config DEBUG_FOOTBRIDGE_COM1 - bool "Kernel low-level debugging messages via footbridge 8250 at PCI COM1" - depends on FOOTBRIDGE - help - Say Y here if you want the debug print routines to direct - their output to the 8250 at PCI COM1. - config DEBUG_HIGHBANK_UART bool "Kernel low-level debugging messages via Highbank UART" depends on ARCH_HIGHBANK @@ -187,42 +206,38 @@ choice Say Y here if you want kernel low-level debugging support on i.MX6Q. - config DEBUG_MSM_UART1 - bool "Kernel low-level debugging messages via MSM UART1" - depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50 + config DEBUG_S3C_UART0 + depends on PLAT_SAMSUNG + bool "Use S3C UART 0 for low-level debug" help Say Y here if you want the debug print routines to direct - their output to the first serial port on MSM devices. + their output to UART 0. The port must have been initialised + by the boot-loader before use. - config DEBUG_MSM_UART2 - bool "Kernel low-level debugging messages via MSM UART2" - depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50 - help - Say Y here if you want the debug print routines to direct - their output to the second serial port on MSM devices. + The uncompressor code port configuration is now handled + by CONFIG_S3C_LOWLEVEL_UART_PORT. - config DEBUG_MSM_UART3 - bool "Kernel low-level debugging messages via MSM UART3" - depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50 + config DEBUG_S3C_UART1 + depends on PLAT_SAMSUNG + bool "Use S3C UART 1 for low-level debug" help Say Y here if you want the debug print routines to direct - their output to the third serial port on MSM devices. + their output to UART 1. The port must have been initialised + by the boot-loader before use. - config DEBUG_MSM8660_UART - bool "Kernel low-level debugging messages via MSM 8660 UART" - depends on ARCH_MSM8X60 - select MSM_HAS_DEBUG_UART_HS - help - Say Y here if you want the debug print routines to direct - their output to the serial port on MSM 8660 devices. + The uncompressor code port configuration is now handled + by CONFIG_S3C_LOWLEVEL_UART_PORT. - config DEBUG_MSM8960_UART - bool "Kernel low-level debugging messages via MSM 8960 UART" - depends on ARCH_MSM8960 - select MSM_HAS_DEBUG_UART_HS + config DEBUG_S3C_UART2 + depends on PLAT_SAMSUNG + bool "Use S3C UART 2 for low-level debug" help Say Y here if you want the debug print routines to direct - their output to the serial port on MSM 8960 devices. + their output to UART 2. The port must have been initialised + by the boot-loader before use. + + The uncompressor code port configuration is now handled + by CONFIG_S3C_LOWLEVEL_UART_PORT. config DEBUG_REALVIEW_STD_PORT bool "RealView Default UART" @@ -240,57 +255,42 @@ choice their output to the standard serial port on the RealView PB1176 platform. - config DEBUG_S3C_UART0 - depends on PLAT_SAMSUNG - bool "Use S3C UART 0 for low-level debug" + config DEBUG_MSM_UART1 + bool "Kernel low-level debugging messages via MSM UART1" + depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50 help Say Y here if you want the debug print routines to direct - their output to UART 0. The port must have been initialised - by the boot-loader before use. - - The uncompressor code port configuration is now handled - by CONFIG_S3C_LOWLEVEL_UART_PORT. + their output to the first serial port on MSM devices. - config DEBUG_S3C_UART1 - depends on PLAT_SAMSUNG - bool "Use S3C UART 1 for low-level debug" + config DEBUG_MSM_UART2 + bool "Kernel low-level debugging messages via MSM UART2" + depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50 help Say Y here if you want the debug print routines to direct - their output to UART 1. The port must have been initialised - by the boot-loader before use. - - The uncompressor code port configuration is now handled - by CONFIG_S3C_LOWLEVEL_UART_PORT. + their output to the second serial port on MSM devices. - config DEBUG_S3C_UART2 - depends on PLAT_SAMSUNG - bool "Use S3C UART 2 for low-level debug" + config DEBUG_MSM_UART3 + bool "Kernel low-level debugging messages via MSM UART3" + depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50 help Say Y here if you want the debug print routines to direct - their output to UART 2. The port must have been initialised - by the boot-loader before use. - - The uncompressor code port configuration is now handled - by CONFIG_S3C_LOWLEVEL_UART_PORT. + their output to the third serial port on MSM devices. - config DEBUG_LL_UART_NONE - bool "No low-level debugging UART" + config DEBUG_MSM8660_UART + bool "Kernel low-level debugging messages via MSM 8660 UART" + depends on ARCH_MSM8X60 + select MSM_HAS_DEBUG_UART_HS help - Say Y here if your platform doesn't provide a UART option - below. This relies on your platform choosing the right UART - definition internally in order for low-level debugging to - work. + Say Y here if you want the debug print routines to direct + their output to the serial port on MSM 8660 devices. - config DEBUG_ICEDCC - bool "Kernel low-level debugging via EmbeddedICE DCC channel" + config DEBUG_MSM8960_UART + bool "Kernel low-level debugging messages via MSM 8960 UART" + depends on ARCH_MSM8960 + select MSM_HAS_DEBUG_UART_HS help Say Y here if you want the debug print routines to direct - their output to the EmbeddedICE macrocell's DCC channel using - co-processor 14. This is known to work on the ARM9 style ICE - channel and on the XScale with the PEEDI. - - Note that the system will appear to hang during boot if there - is nothing connected to read from the DCC. + their output to the serial port on MSM 8960 devices. endchoice diff --git a/trunk/arch/arm/include/asm/hardware/entry-macro-iomd.S b/trunk/arch/arm/include/asm/hardware/entry-macro-iomd.S index 8c215acd9b57..e0af4983723f 100644 --- a/trunk/arch/arm/include/asm/hardware/entry-macro-iomd.S +++ b/trunk/arch/arm/include/asm/hardware/entry-macro-iomd.S @@ -11,6 +11,14 @@ /* IOC / IOMD based hardware */ #include + .macro disable_fiq + mov r12, #ioc_base_high + .if ioc_base_low + orr r12, r12, #ioc_base_low + .endif + strb r12, [r12, #0x38] @ Disable FIQ register + .endm + .macro get_irqnr_and_base, irqnr, irqstat, base, tmp ldrb \irqstat, [\base, #IOMD_IRQREQB] @ get high priority first ldr \tmp, =irq_prio_h diff --git a/trunk/arch/arm/include/asm/system.h b/trunk/arch/arm/include/asm/system.h index 424aa458c487..e4c96cc6ec0c 100644 --- a/trunk/arch/arm/include/asm/system.h +++ b/trunk/arch/arm/include/asm/system.h @@ -110,7 +110,6 @@ extern void cpu_init(void); void soft_restart(unsigned long); extern void (*arm_pm_restart)(char str, const char *cmd); -extern void (*arm_pm_idle)(void); #define UDBG_UNDEFINED (1 << 0) #define UDBG_SYSCALL (1 << 1) diff --git a/trunk/arch/arm/kernel/entry-armv.S b/trunk/arch/arm/kernel/entry-armv.S index 22f0ed324f37..be16a48007b4 100644 --- a/trunk/arch/arm/kernel/entry-armv.S +++ b/trunk/arch/arm/kernel/entry-armv.S @@ -19,9 +19,7 @@ #include #include #include -#ifndef CONFIG_MULTI_IRQ_HANDLER #include -#endif #include #include #include @@ -1103,6 +1101,7 @@ __stubs_start: * get out of that mode without clobbering one register. */ vector_fiq: + disable_fiq subs pc, lr, #4 /*============================================================================= diff --git a/trunk/arch/arm/kernel/entry-common.S b/trunk/arch/arm/kernel/entry-common.S index 54ee265dd819..9fd0ba90c1d2 100644 --- a/trunk/arch/arm/kernel/entry-common.S +++ b/trunk/arch/arm/kernel/entry-common.S @@ -10,14 +10,8 @@ #include #include -#include - -#ifdef CONFIG_NEED_RET_TO_USER #include -#else - .macro arch_ret_to_user, tmp1, tmp2 - .endm -#endif +#include #include "entry-header.S" diff --git a/trunk/arch/arm/kernel/process.c b/trunk/arch/arm/kernel/process.c index 008e7ce766a7..971d65c253a9 100644 --- a/trunk/arch/arm/kernel/process.c +++ b/trunk/arch/arm/kernel/process.c @@ -61,6 +61,8 @@ extern void setup_mm_for_reboot(void); static volatile int hlt_counter; +#include + void disable_hlt(void) { hlt_counter++; @@ -179,17 +181,13 @@ void cpu_idle_wait(void) EXPORT_SYMBOL_GPL(cpu_idle_wait); /* - * This is our default idle handler. + * This is our default idle handler. We need to disable + * interrupts here to ensure we don't miss a wakeup call. */ - -void (*arm_pm_idle)(void); - static void default_idle(void) { - if (arm_pm_idle) - arm_pm_idle(); - else - cpu_do_idle(); + if (!need_resched()) + arch_idle(); local_irq_enable(); } @@ -217,10 +215,6 @@ void cpu_idle(void) cpu_die(); #endif - /* - * We need to disable interrupts here - * to ensure we don't miss a wakeup call. - */ local_irq_disable(); #ifdef CONFIG_PL310_ERRATA_769419 wmb(); @@ -228,18 +222,19 @@ void cpu_idle(void) if (hlt_counter) { local_irq_enable(); cpu_relax(); - } else if (!need_resched()) { + } else { stop_critical_timings(); if (cpuidle_idle_call()) pm_idle(); start_critical_timings(); /* - * pm_idle functions must always - * return with IRQs enabled. + * This will eventually be removed - pm_idle + * functions should always return with IRQs + * enabled. */ WARN_ON(irqs_disabled()); - } else local_irq_enable(); + } } leds_event(led_idle_end); rcu_idle_exit(); diff --git a/trunk/arch/arm/mach-at91/at91cap9.c b/trunk/arch/arm/mach-at91/at91cap9.c index 8967d75c2ea3..a42edc25a87e 100644 --- a/trunk/arch/arm/mach-at91/at91cap9.c +++ b/trunk/arch/arm/mach-at91/at91cap9.c @@ -14,7 +14,6 @@ #include -#include #include #include #include @@ -314,12 +313,6 @@ static struct at91_gpio_bank at91cap9_gpio[] __initdata = { } }; -static void at91cap9_idle(void) -{ - at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK); - cpu_do_idle(); -} - /* -------------------------------------------------------------------- * AT91CAP9 processor initialization * -------------------------------------------------------------------- */ @@ -339,7 +332,6 @@ static void __init at91cap9_ioremap_registers(void) static void __init at91cap9_initialize(void) { - arm_pm_idle = at91cap9_idle; arm_pm_restart = at91sam9g45_restart; at91_extern_irq = (1 << AT91CAP9_ID_IRQ0) | (1 << AT91CAP9_ID_IRQ1); diff --git a/trunk/arch/arm/mach-at91/at91rm9200.c b/trunk/arch/arm/mach-at91/at91rm9200.c index dd6e2de13420..99c3174e24a2 100644 --- a/trunk/arch/arm/mach-at91/at91rm9200.c +++ b/trunk/arch/arm/mach-at91/at91rm9200.c @@ -289,15 +289,6 @@ static struct at91_gpio_bank at91rm9200_gpio[] __initdata = { } }; -static void at91rm9200_idle(void) -{ - /* - * Disable the processor clock. The processor will be automatically - * re-enabled by an interrupt or by a reset. - */ - at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK); -} - static void at91rm9200_restart(char mode, const char *cmd) { /* @@ -323,7 +314,6 @@ static void __init at91rm9200_ioremap_registers(void) static void __init at91rm9200_initialize(void) { - arm_pm_idle = at91rm9200_idle; arm_pm_restart = at91rm9200_restart; at91_extern_irq = (1 << AT91RM9200_ID_IRQ0) | (1 << AT91RM9200_ID_IRQ1) | (1 << AT91RM9200_ID_IRQ2) | (1 << AT91RM9200_ID_IRQ3) diff --git a/trunk/arch/arm/mach-at91/at91sam9260.c b/trunk/arch/arm/mach-at91/at91sam9260.c index 9ac8c6fe3363..d4036ba43612 100644 --- a/trunk/arch/arm/mach-at91/at91sam9260.c +++ b/trunk/arch/arm/mach-at91/at91sam9260.c @@ -12,7 +12,6 @@ #include -#include #include #include #include @@ -329,15 +328,8 @@ static void __init at91sam9260_ioremap_registers(void) at91sam9_ioremap_smc(0, AT91SAM9260_BASE_SMC); } -static void at91sam9260_idle(void) -{ - at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK); - cpu_do_idle(); -} - static void __init at91sam9260_initialize(void) { - arm_pm_idle = at91sam9260_idle; arm_pm_restart = at91sam9_alt_restart; at91_extern_irq = (1 << AT91SAM9260_ID_IRQ0) | (1 << AT91SAM9260_ID_IRQ1) | (1 << AT91SAM9260_ID_IRQ2); diff --git a/trunk/arch/arm/mach-at91/at91sam9261.c b/trunk/arch/arm/mach-at91/at91sam9261.c index ab76868f01f5..023c2ff138df 100644 --- a/trunk/arch/arm/mach-at91/at91sam9261.c +++ b/trunk/arch/arm/mach-at91/at91sam9261.c @@ -12,7 +12,6 @@ #include -#include #include #include #include @@ -287,15 +286,8 @@ static void __init at91sam9261_ioremap_registers(void) at91sam9_ioremap_smc(0, AT91SAM9261_BASE_SMC); } -static void at91sam9261_idle(void) -{ - at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK); - cpu_do_idle(); -} - static void __init at91sam9261_initialize(void) { - arm_pm_idle = at91sam9261_idle; arm_pm_restart = at91sam9_alt_restart; at91_extern_irq = (1 << AT91SAM9261_ID_IRQ0) | (1 << AT91SAM9261_ID_IRQ1) | (1 << AT91SAM9261_ID_IRQ2); diff --git a/trunk/arch/arm/mach-at91/at91sam9263.c b/trunk/arch/arm/mach-at91/at91sam9263.c index 247ab633abcc..75e876c258af 100644 --- a/trunk/arch/arm/mach-at91/at91sam9263.c +++ b/trunk/arch/arm/mach-at91/at91sam9263.c @@ -12,7 +12,6 @@ #include -#include #include #include #include @@ -308,15 +307,8 @@ static void __init at91sam9263_ioremap_registers(void) at91sam9_ioremap_smc(1, AT91SAM9263_BASE_SMC1); } -static void at91sam9263_idle(void) -{ - at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK); - cpu_do_idle(); -} - static void __init at91sam9263_initialize(void) { - arm_pm_idle = at91sam9263_idle; arm_pm_restart = at91sam9_alt_restart; at91_extern_irq = (1 << AT91SAM9263_ID_IRQ0) | (1 << AT91SAM9263_ID_IRQ1); diff --git a/trunk/arch/arm/mach-at91/at91sam9g45.c b/trunk/arch/arm/mach-at91/at91sam9g45.c index 5b12192e52ec..1cb6a96b1c1e 100644 --- a/trunk/arch/arm/mach-at91/at91sam9g45.c +++ b/trunk/arch/arm/mach-at91/at91sam9g45.c @@ -317,12 +317,6 @@ static struct at91_gpio_bank at91sam9g45_gpio[] __initdata = { } }; -static void at91sam9g45_idle(void) -{ - at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK); - cpu_do_idle(); -} - /* -------------------------------------------------------------------- * AT91SAM9G45 processor initialization * -------------------------------------------------------------------- */ @@ -343,7 +337,6 @@ static void __init at91sam9g45_ioremap_registers(void) static void __init at91sam9g45_initialize(void) { - arm_pm_idle = at91sam9g45_idle; arm_pm_restart = at91sam9g45_restart; at91_extern_irq = (1 << AT91SAM9G45_ID_IRQ0); diff --git a/trunk/arch/arm/mach-at91/at91sam9rl.c b/trunk/arch/arm/mach-at91/at91sam9rl.c index fd60e226a987..d2c91a841cb8 100644 --- a/trunk/arch/arm/mach-at91/at91sam9rl.c +++ b/trunk/arch/arm/mach-at91/at91sam9rl.c @@ -11,7 +11,6 @@ #include -#include #include #include #include @@ -292,15 +291,8 @@ static void __init at91sam9rl_ioremap_registers(void) at91sam9_ioremap_smc(0, AT91SAM9RL_BASE_SMC); } -static void at91sam9rl_idle(void) -{ - at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK); - cpu_do_idle(); -} - static void __init at91sam9rl_initialize(void) { - arm_pm_idle = at91sam9rl_idle; arm_pm_restart = at91sam9_alt_restart; at91_extern_irq = (1 << AT91SAM9RL_ID_IRQ0); diff --git a/trunk/arch/arm/mach-at91/at91x40.c b/trunk/arch/arm/mach-at91/at91x40.c index 0154b7f44ff1..56ba3bd035ae 100644 --- a/trunk/arch/arm/mach-at91/at91x40.c +++ b/trunk/arch/arm/mach-at91/at91x40.c @@ -13,7 +13,6 @@ #include #include #include -#include #include #include #include @@ -38,19 +37,8 @@ unsigned long clk_get_rate(struct clk *clk) return AT91X40_MASTER_CLOCK; } -static void at91x40_idle(void) -{ - /* - * Disable the processor clock. The processor will be automatically - * re-enabled by an interrupt or by a reset. - */ - at91_sys_write(AT91_PS_CR, AT91_PS_CR_CPU); - cpu_do_idle(); -} - void __init at91x40_initialize(unsigned long main_clock) { - arm_pm_idle = at91x40_idle; at91_extern_irq = (1 << AT91X40_ID_IRQ0) | (1 << AT91X40_ID_IRQ1) | (1 << AT91X40_ID_IRQ2); } diff --git a/trunk/arch/arm/mach-at91/include/mach/entry-macro.S b/trunk/arch/arm/mach-at91/include/mach/entry-macro.S index 903bf205a333..423eea0ed74c 100644 --- a/trunk/arch/arm/mach-at91/include/mach/entry-macro.S +++ b/trunk/arch/arm/mach-at91/include/mach/entry-macro.S @@ -13,11 +13,17 @@ #include #include + .macro disable_fiq + .endm + .macro get_irqnr_preamble, base, tmp ldr \base, =at91_aic_base @ base virtual address of AIC peripheral ldr \base, [\base] .endm + .macro arch_ret_to_user, tmp1, tmp2 + .endm + .macro get_irqnr_and_base, irqnr, irqstat, base, tmp ldr \irqnr, [\base, #AT91_AIC_IVR] @ read IRQ vector register: de-asserts nIRQ to processor (and clears interrupt) ldr \irqstat, [\base, #AT91_AIC_ISR] @ read interrupt source number diff --git a/trunk/arch/arm/mach-at91/include/mach/system.h b/trunk/arch/arm/mach-at91/include/mach/system.h new file mode 100644 index 000000000000..cbd64f3bcecd --- /dev/null +++ b/trunk/arch/arm/mach-at91/include/mach/system.h @@ -0,0 +1,50 @@ +/* + * arch/arm/mach-at91/include/mach/system.h + * + * Copyright (C) 2003 SAN People + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#ifndef __ASM_ARCH_SYSTEM_H +#define __ASM_ARCH_SYSTEM_H + +#include +#include +#include +#include + +static inline void arch_idle(void) +{ + /* + * Disable the processor clock. The processor will be automatically + * re-enabled by an interrupt or by a reset. + */ +#ifdef AT91_PS + at91_sys_write(AT91_PS_CR, AT91_PS_CR_CPU); +#else + at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK); +#endif +#ifndef CONFIG_CPU_ARM920T + /* + * Set the processor (CP15) into 'Wait for Interrupt' mode. + * Post-RM9200 processors need this in conjunction with the above + * to save power when idle. + */ + cpu_do_idle(); +#endif +} + +#endif diff --git a/trunk/arch/arm/mach-bcmring/core.c b/trunk/arch/arm/mach-bcmring/core.c index 22e4e0a28ad1..6b67b7e8426c 100644 --- a/trunk/arch/arm/mach-bcmring/core.c +++ b/trunk/arch/arm/mach-bcmring/core.c @@ -52,8 +52,27 @@ #include #include -static AMBA_APB_DEVICE(uartA, "uarta", MM_ADDR_IO_UARTA, { IRQ_UARTA }, NULL); -static AMBA_APB_DEVICE(uartB, "uartb", MM_ADDR_IO_UARTB, { IRQ_UARTB }, NULL); +#define AMBA_DEVICE(name, initname, base, plat, size) \ +static struct amba_device name##_device = { \ + .dev = { \ + .coherent_dma_mask = ~0, \ + .init_name = initname, \ + .platform_data = plat \ + }, \ + .res = { \ + .start = MM_ADDR_IO_##base, \ + .end = MM_ADDR_IO_##base + (size) - 1, \ + .flags = IORESOURCE_MEM \ + }, \ + .dma_mask = ~0, \ + .irq = { \ + IRQ_##base \ + } \ +} + + +AMBA_DEVICE(uartA, "uarta", UARTA, NULL, SZ_4K); +AMBA_DEVICE(uartB, "uartb", UARTB, NULL, SZ_4K); static struct clk pll1_clk = { .name = "PLL1", diff --git a/trunk/arch/arm/mach-bcmring/include/mach/entry-macro.S b/trunk/arch/arm/mach-bcmring/include/mach/entry-macro.S index 2f316f0e6e69..94c950d783ba 100644 --- a/trunk/arch/arm/mach-bcmring/include/mach/entry-macro.S +++ b/trunk/arch/arm/mach-bcmring/include/mach/entry-macro.S @@ -21,6 +21,9 @@ #include #include + .macro disable_fiq + .endm + .macro get_irqnr_and_base, irqnr, irqstat, base, tmp ldr \base, =(MM_IO_BASE_INTC0) ldr \irqstat, [\base, #0] @ get status @@ -74,3 +77,6 @@ .macro get_irqnr_preamble, base, tmp .endm + + .macro arch_ret_to_user, tmp1, tmp2 + .endm diff --git a/trunk/arch/arm/mach-bcmring/include/mach/system.h b/trunk/arch/arm/mach-bcmring/include/mach/system.h new file mode 100644 index 000000000000..cb78250db649 --- /dev/null +++ b/trunk/arch/arm/mach-bcmring/include/mach/system.h @@ -0,0 +1,28 @@ +/* + * + * Copyright (C) 1999 ARM Limited + * Copyright (C) 2000 Deep Blue Solutions Ltd + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#ifndef __ASM_ARCH_SYSTEM_H +#define __ASM_ARCH_SYSTEM_H + +static inline void arch_idle(void) +{ + cpu_do_idle(); +} + +#endif diff --git a/trunk/arch/arm/mach-clps711x/common.c b/trunk/arch/arm/mach-clps711x/common.c index 8736c1acc166..ab1711b9b4d6 100644 --- a/trunk/arch/arm/mach-clps711x/common.c +++ b/trunk/arch/arm/mach-clps711x/common.c @@ -225,19 +225,3 @@ void clps711x_restart(char mode, const char *cmd) { soft_restart(0); } - -static void clps711x_idle(void) -{ - clps_writel(1, HALT); - __asm__ __volatile__( - "mov r0, r0\n\ - mov r0, r0"); -} - -static int __init clps711x_idle_init(void) -{ - arm_pm_idle = clps711x_idle; - return 0; -} - -arch_initcall(clps711x_idle_init); diff --git a/trunk/arch/arm/mach-clps711x/include/mach/entry-macro.S b/trunk/arch/arm/mach-clps711x/include/mach/entry-macro.S index 125af59d7a29..90fa2f70489f 100644 --- a/trunk/arch/arm/mach-clps711x/include/mach/entry-macro.S +++ b/trunk/arch/arm/mach-clps711x/include/mach/entry-macro.S @@ -10,9 +10,15 @@ #include #include + .macro disable_fiq + .endm + .macro get_irqnr_preamble, base, tmp .endm + .macro arch_ret_to_user, tmp1, tmp2 + .endm + #if (INTSR2 - INTSR1) != (INTMR2 - INTMR1) #error INTSR stride != INTMR stride #endif diff --git a/trunk/arch/arm/mach-clps711x/include/mach/system.h b/trunk/arch/arm/mach-clps711x/include/mach/system.h new file mode 100644 index 000000000000..23d6ef8c84da --- /dev/null +++ b/trunk/arch/arm/mach-clps711x/include/mach/system.h @@ -0,0 +1,35 @@ +/* + * arch/arm/mach-clps711x/include/mach/system.h + * + * Copyright (C) 2000 Deep Blue Solutions Ltd + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#ifndef __ASM_ARCH_SYSTEM_H +#define __ASM_ARCH_SYSTEM_H + +#include +#include +#include + +static inline void arch_idle(void) +{ + clps_writel(1, HALT); + __asm__ __volatile__( + "mov r0, r0\n\ + mov r0, r0"); +} + +#endif diff --git a/trunk/arch/arm/mach-cns3xxx/include/mach/entry-macro.S b/trunk/arch/arm/mach-cns3xxx/include/mach/entry-macro.S new file mode 100644 index 000000000000..01c57df5f716 --- /dev/null +++ b/trunk/arch/arm/mach-cns3xxx/include/mach/entry-macro.S @@ -0,0 +1,15 @@ +/* + * Low-level IRQ helper macros for Cavium Networks platforms + * + * Copyright 2008 Cavium Networks + * + * This file is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, Version 2, as + * published by the Free Software Foundation. + */ + + .macro disable_fiq + .endm + + .macro arch_ret_to_user, tmp1, tmp2 + .endm diff --git a/trunk/arch/arm/mach-cns3xxx/include/mach/system.h b/trunk/arch/arm/mach-cns3xxx/include/mach/system.h new file mode 100644 index 000000000000..9e56b7dc133a --- /dev/null +++ b/trunk/arch/arm/mach-cns3xxx/include/mach/system.h @@ -0,0 +1,25 @@ +/* + * Copyright 2000 Deep Blue Solutions Ltd + * Copyright 2003 ARM Limited + * Copyright 2008 Cavium Networks + * + * This file is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, Version 2, as + * published by the Free Software Foundation. + */ + +#ifndef __MACH_SYSTEM_H +#define __MACH_SYSTEM_H + +#include + +static inline void arch_idle(void) +{ + /* + * This should do all the clock switching + * and wait for interrupt tricks + */ + cpu_do_idle(); +} + +#endif diff --git a/trunk/arch/arm/mach-davinci/include/mach/entry-macro.S b/trunk/arch/arm/mach-davinci/include/mach/entry-macro.S index c1661d2feca9..e14c0dc0e12c 100644 --- a/trunk/arch/arm/mach-davinci/include/mach/entry-macro.S +++ b/trunk/arch/arm/mach-davinci/include/mach/entry-macro.S @@ -11,11 +11,17 @@ #include #include + .macro disable_fiq + .endm + .macro get_irqnr_preamble, base, tmp ldr \base, =davinci_intc_base ldr \base, [\base] .endm + .macro arch_ret_to_user, tmp1, tmp2 + .endm + .macro get_irqnr_and_base, irqnr, irqstat, base, tmp #if defined(CONFIG_AINTC) && defined(CONFIG_CP_INTC) ldr \tmp, =davinci_intc_type diff --git a/trunk/arch/arm/mach-davinci/include/mach/system.h b/trunk/arch/arm/mach-davinci/include/mach/system.h new file mode 100644 index 000000000000..fcb7a015aba5 --- /dev/null +++ b/trunk/arch/arm/mach-davinci/include/mach/system.h @@ -0,0 +1,21 @@ +/* + * DaVinci system defines + * + * Author: Kevin Hilman, MontaVista Software, Inc. + * + * 2007 (c) MontaVista Software, Inc. This file is licensed under + * the terms of the GNU General Public License version 2. This program + * is licensed "as is" without any warranty of any kind, whether express + * or implied. + */ +#ifndef __ASM_ARCH_SYSTEM_H +#define __ASM_ARCH_SYSTEM_H + +#include + +static inline void arch_idle(void) +{ + cpu_do_idle(); +} + +#endif /* __ASM_ARCH_SYSTEM_H */ diff --git a/trunk/arch/arm/mach-dove/include/mach/entry-macro.S b/trunk/arch/arm/mach-dove/include/mach/entry-macro.S index 72d622baaad3..e84c78c2a8b7 100644 --- a/trunk/arch/arm/mach-dove/include/mach/entry-macro.S +++ b/trunk/arch/arm/mach-dove/include/mach/entry-macro.S @@ -10,6 +10,12 @@ #include + .macro disable_fiq + .endm + + .macro arch_ret_to_user, tmp1, tmp2 + .endm + .macro get_irqnr_preamble, base, tmp ldr \base, =IRQ_VIRT_BASE .endm diff --git a/trunk/arch/arm/mach-dove/include/mach/system.h b/trunk/arch/arm/mach-dove/include/mach/system.h new file mode 100644 index 000000000000..3027954f6162 --- /dev/null +++ b/trunk/arch/arm/mach-dove/include/mach/system.h @@ -0,0 +1,17 @@ +/* + * arch/arm/mach-dove/include/mach/system.h + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#ifndef __ASM_ARCH_SYSTEM_H +#define __ASM_ARCH_SYSTEM_H + +static inline void arch_idle(void) +{ + cpu_do_idle(); +} + +#endif diff --git a/trunk/arch/arm/mach-ebsa110/core.c b/trunk/arch/arm/mach-ebsa110/core.c index 804c9122b7b3..294aad07f7a0 100644 --- a/trunk/arch/arm/mach-ebsa110/core.c +++ b/trunk/arch/arm/mach-ebsa110/core.c @@ -271,33 +271,8 @@ static struct platform_device *ebsa110_devices[] = { &am79c961_device, }; -/* - * EBSA110 idling methodology: - * - * We can not execute the "wait for interrupt" instruction since that - * will stop our MCLK signal (which provides the clock for the glue - * logic, and therefore the timer interrupt). - * - * Instead, we spin, polling the IRQ_STAT register for the occurrence - * of any interrupt with core clock down to the memory clock. - */ -static void ebsa110_idle(void) -{ - const char *irq_stat = (char *)0xff000000; - - /* disable clock switching */ - asm volatile ("mcr p15, 0, ip, c15, c2, 2" : : : "cc"); - - /* wait for an interrupt to occur */ - while (!*irq_stat); - - /* enable clock switching */ - asm volatile ("mcr p15, 0, ip, c15, c1, 2" : : : "cc"); -} - static int __init ebsa110_init(void) { - arm_pm_idle = ebsa110_idle; return platform_add_devices(ebsa110_devices, ARRAY_SIZE(ebsa110_devices)); } diff --git a/trunk/arch/arm/mach-ebsa110/include/mach/entry-macro.S b/trunk/arch/arm/mach-ebsa110/include/mach/entry-macro.S index 14b110de78a9..cc3e5992f6b3 100644 --- a/trunk/arch/arm/mach-ebsa110/include/mach/entry-macro.S +++ b/trunk/arch/arm/mach-ebsa110/include/mach/entry-macro.S @@ -12,10 +12,16 @@ #define IRQ_STAT 0xff000000 /* read */ + .macro disable_fiq + .endm + .macro get_irqnr_preamble, base, tmp mov \base, #IRQ_STAT .endm + .macro arch_ret_to_user, tmp1, tmp2 + .endm + .macro get_irqnr_and_base, irqnr, stat, base, tmp ldrb \stat, [\base] @ get interrupts mov \irqnr, #0 diff --git a/trunk/arch/arm/mach-ebsa110/include/mach/system.h b/trunk/arch/arm/mach-ebsa110/include/mach/system.h new file mode 100644 index 000000000000..2e4af65edb6f --- /dev/null +++ b/trunk/arch/arm/mach-ebsa110/include/mach/system.h @@ -0,0 +1,37 @@ +/* + * arch/arm/mach-ebsa110/include/mach/system.h + * + * Copyright (C) 1996-2000 Russell King. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#ifndef __ASM_ARCH_SYSTEM_H +#define __ASM_ARCH_SYSTEM_H + +/* + * EBSA110 idling methodology: + * + * We can not execute the "wait for interrupt" instruction since that + * will stop our MCLK signal (which provides the clock for the glue + * logic, and therefore the timer interrupt). + * + * Instead, we spin, polling the IRQ_STAT register for the occurrence + * of any interrupt with core clock down to the memory clock. + */ +static inline void arch_idle(void) +{ + const char *irq_stat = (char *)0xff000000; + + /* disable clock switching */ + asm volatile ("mcr p15, 0, ip, c15, c2, 2" : : : "cc"); + + /* wait for an interrupt to occur */ + while (!*irq_stat); + + /* enable clock switching */ + asm volatile ("mcr p15, 0, ip, c15, c1, 2" : : : "cc"); +} + +#endif diff --git a/trunk/arch/arm/mach-ep93xx/core.c b/trunk/arch/arm/mach-ep93xx/core.c index 903edb02fe4f..24203f9a6796 100644 --- a/trunk/arch/arm/mach-ep93xx/core.c +++ b/trunk/arch/arm/mach-ep93xx/core.c @@ -279,14 +279,48 @@ static struct amba_pl010_data ep93xx_uart_data = { .set_mctrl = ep93xx_uart_set_mctrl, }; -static AMBA_APB_DEVICE(uart1, "apb:uart1", 0x00041010, EP93XX_UART1_PHYS_BASE, - { IRQ_EP93XX_UART1 }, &ep93xx_uart_data); +static struct amba_device uart1_device = { + .dev = { + .init_name = "apb:uart1", + .platform_data = &ep93xx_uart_data, + }, + .res = { + .start = EP93XX_UART1_PHYS_BASE, + .end = EP93XX_UART1_PHYS_BASE + 0x0fff, + .flags = IORESOURCE_MEM, + }, + .irq = { IRQ_EP93XX_UART1, NO_IRQ }, + .periphid = 0x00041010, +}; + +static struct amba_device uart2_device = { + .dev = { + .init_name = "apb:uart2", + .platform_data = &ep93xx_uart_data, + }, + .res = { + .start = EP93XX_UART2_PHYS_BASE, + .end = EP93XX_UART2_PHYS_BASE + 0x0fff, + .flags = IORESOURCE_MEM, + }, + .irq = { IRQ_EP93XX_UART2, NO_IRQ }, + .periphid = 0x00041010, +}; -static AMBA_APB_DEVICE(uart2, "apb:uart2", 0x00041010, EP93XX_UART2_PHYS_BASE, - { IRQ_EP93XX_UART2 }, &ep93xx_uart_data); +static struct amba_device uart3_device = { + .dev = { + .init_name = "apb:uart3", + .platform_data = &ep93xx_uart_data, + }, + .res = { + .start = EP93XX_UART3_PHYS_BASE, + .end = EP93XX_UART3_PHYS_BASE + 0x0fff, + .flags = IORESOURCE_MEM, + }, + .irq = { IRQ_EP93XX_UART3, NO_IRQ }, + .periphid = 0x00041010, +}; -static AMBA_APB_DEVICE(uart3, "apb:uart3", 0x00041010, EP93XX_UART3_PHYS_BASE, - { IRQ_EP93XX_UART3 }, &ep93xx_uart_data); static struct resource ep93xx_rtc_resource[] = { { diff --git a/trunk/arch/arm/mach-ep93xx/include/mach/entry-macro.S b/trunk/arch/arm/mach-ep93xx/include/mach/entry-macro.S new file mode 100644 index 000000000000..9be6edcf9045 --- /dev/null +++ b/trunk/arch/arm/mach-ep93xx/include/mach/entry-macro.S @@ -0,0 +1,17 @@ +/* + * arch/arm/mach-ep93xx/include/mach/entry-macro.S + * IRQ demultiplexing for EP93xx + * + * Copyright (C) 2006 Lennert Buytenhek + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or (at + * your option) any later version. + */ + + .macro disable_fiq + .endm + + .macro arch_ret_to_user, tmp1, tmp2 + .endm diff --git a/trunk/arch/arm/mach-ep93xx/include/mach/system.h b/trunk/arch/arm/mach-ep93xx/include/mach/system.h new file mode 100644 index 000000000000..b5bec7cb9b52 --- /dev/null +++ b/trunk/arch/arm/mach-ep93xx/include/mach/system.h @@ -0,0 +1,7 @@ +/* + * arch/arm/mach-ep93xx/include/mach/system.h + */ +static inline void arch_idle(void) +{ + cpu_do_idle(); +} diff --git a/trunk/arch/arm/mach-exynos/common.c b/trunk/arch/arm/mach-exynos/common.c index 031c1e5b3dfe..c59e18871006 100644 --- a/trunk/arch/arm/mach-exynos/common.c +++ b/trunk/arch/arm/mach-exynos/common.c @@ -201,6 +201,14 @@ static struct map_desc exynos4_iodesc1[] __initdata = { }, }; +static void exynos_idle(void) +{ + if (!need_resched()) + cpu_do_idle(); + + local_irq_enable(); +} + void exynos4_restart(char mode, const char *cmd) { __raw_writel(0x1, S5P_SWRESET); @@ -459,6 +467,10 @@ early_initcall(exynos4_l2x0_cache_init); int __init exynos_init(void) { printk(KERN_INFO "EXYNOS: Initializing architecture\n"); + + /* set idle function */ + pm_idle = exynos_idle; + return device_register(&exynos4_dev); } diff --git a/trunk/arch/arm/mach-exynos/dma.c b/trunk/arch/arm/mach-exynos/dma.c index 91370def4a70..b10fcd270f07 100644 --- a/trunk/arch/arm/mach-exynos/dma.c +++ b/trunk/arch/arm/mach-exynos/dma.c @@ -74,8 +74,21 @@ struct dma_pl330_platdata exynos4_pdma0_pdata = { .peri_id = pdma0_peri, }; -AMBA_AHB_DEVICE(exynos4_pdma0, "dma-pl330.0", 0x00041330, EXYNOS4_PA_PDMA0, - {IRQ_PDMA0}, &exynos4_pdma0_pdata); +struct amba_device exynos4_device_pdma0 = { + .dev = { + .init_name = "dma-pl330.0", + .dma_mask = &dma_dmamask, + .coherent_dma_mask = DMA_BIT_MASK(32), + .platform_data = &exynos4_pdma0_pdata, + }, + .res = { + .start = EXYNOS4_PA_PDMA0, + .end = EXYNOS4_PA_PDMA0 + SZ_4K, + .flags = IORESOURCE_MEM, + }, + .irq = {IRQ_PDMA0, NO_IRQ}, + .periphid = 0x00041330, +}; u8 pdma1_peri[] = { DMACH_PCM0_RX, @@ -110,8 +123,21 @@ struct dma_pl330_platdata exynos4_pdma1_pdata = { .peri_id = pdma1_peri, }; -AMBA_AHB_DEVICE(exynos4_pdma1, "dma-pl330.1", 0x00041330, EXYNOS4_PA_PDMA1, - {IRQ_PDMA1}, &exynos4_pdma1_pdata); +struct amba_device exynos4_device_pdma1 = { + .dev = { + .init_name = "dma-pl330.1", + .dma_mask = &dma_dmamask, + .coherent_dma_mask = DMA_BIT_MASK(32), + .platform_data = &exynos4_pdma1_pdata, + }, + .res = { + .start = EXYNOS4_PA_PDMA1, + .end = EXYNOS4_PA_PDMA1 + SZ_4K, + .flags = IORESOURCE_MEM, + }, + .irq = {IRQ_PDMA1, NO_IRQ}, + .periphid = 0x00041330, +}; static int __init exynos4_dma_init(void) { @@ -120,11 +146,11 @@ static int __init exynos4_dma_init(void) dma_cap_set(DMA_SLAVE, exynos4_pdma0_pdata.cap_mask); dma_cap_set(DMA_CYCLIC, exynos4_pdma0_pdata.cap_mask); - amba_device_register(&exynos4_pdma0_device, &iomem_resource); + amba_device_register(&exynos4_device_pdma0, &iomem_resource); dma_cap_set(DMA_SLAVE, exynos4_pdma1_pdata.cap_mask); dma_cap_set(DMA_CYCLIC, exynos4_pdma1_pdata.cap_mask); - amba_device_register(&exynos4_pdma1_device, &iomem_resource); + amba_device_register(&exynos4_device_pdma1, &iomem_resource); return 0; } diff --git a/trunk/arch/arm/mach-exynos/include/mach/entry-macro.S b/trunk/arch/arm/mach-exynos/include/mach/entry-macro.S new file mode 100644 index 000000000000..3ba4f547534b --- /dev/null +++ b/trunk/arch/arm/mach-exynos/include/mach/entry-macro.S @@ -0,0 +1,16 @@ +/* arch/arm/mach-exynos4/include/mach/entry-macro.S + * + * Cloned from arch/arm/mach-realview/include/mach/entry-macro.S + * + * Low-level IRQ helper macros for EXYNOS4 platforms + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. +*/ + + .macro disable_fiq + .endm + + .macro arch_ret_to_user, tmp1, tmp2 + .endm diff --git a/trunk/arch/arm/mach-exynos/include/mach/system.h b/trunk/arch/arm/mach-exynos/include/mach/system.h new file mode 100644 index 000000000000..0063a6de3dc8 --- /dev/null +++ b/trunk/arch/arm/mach-exynos/include/mach/system.h @@ -0,0 +1,20 @@ +/* linux/arch/arm/mach-exynos4/include/mach/system.h + * + * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * + * EXYNOS4 - system support header + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __ASM_ARCH_SYSTEM_H +#define __ASM_ARCH_SYSTEM_H __FILE__ + +static void arch_idle(void) +{ + /* nothing here yet */ +} +#endif /* __ASM_ARCH_SYSTEM_H */ diff --git a/trunk/arch/arm/mach-footbridge/include/mach/entry-macro.S b/trunk/arch/arm/mach-footbridge/include/mach/entry-macro.S index dabbd5c54a78..d3847be0c667 100644 --- a/trunk/arch/arm/mach-footbridge/include/mach/entry-macro.S +++ b/trunk/arch/arm/mach-footbridge/include/mach/entry-macro.S @@ -14,6 +14,9 @@ .equ dc21285_high, ARMCSR_BASE & 0xff000000 .equ dc21285_low, ARMCSR_BASE & 0x00ffffff + .macro disable_fiq + .endm + .macro get_irqnr_preamble, base, tmp mov \base, #dc21285_high .if dc21285_low @@ -21,6 +24,9 @@ .endif .endm + .macro arch_ret_to_user, tmp1, tmp2 + .endm + .macro get_irqnr_and_base, irqnr, irqstat, base, tmp ldr \irqstat, [\base, #0x180] @ get interrupts diff --git a/trunk/arch/arm/mach-footbridge/include/mach/system.h b/trunk/arch/arm/mach-footbridge/include/mach/system.h new file mode 100644 index 000000000000..a174a5841bc2 --- /dev/null +++ b/trunk/arch/arm/mach-footbridge/include/mach/system.h @@ -0,0 +1,13 @@ +/* + * arch/arm/mach-footbridge/include/mach/system.h + * + * Copyright (C) 1996-1999 Russell King. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +static inline void arch_idle(void) +{ + cpu_do_idle(); +} diff --git a/trunk/arch/arm/mach-gemini/Makefile b/trunk/arch/arm/mach-gemini/Makefile index 7355c0bbcb5e..c5b24b95a76e 100644 --- a/trunk/arch/arm/mach-gemini/Makefile +++ b/trunk/arch/arm/mach-gemini/Makefile @@ -4,7 +4,7 @@ # Object file lists. -obj-y := irq.o mm.o time.o devices.o gpio.o idle.o +obj-y := irq.o mm.o time.o devices.o gpio.o # Board-specific support obj-$(CONFIG_MACH_NAS4220B) += board-nas4220b.o diff --git a/trunk/arch/arm/mach-gemini/idle.c b/trunk/arch/arm/mach-gemini/idle.c deleted file mode 100644 index 92bbd6bb600a..000000000000 --- a/trunk/arch/arm/mach-gemini/idle.c +++ /dev/null @@ -1,29 +0,0 @@ -/* - * arch/arm/mach-gemini/idle.c - */ - -#include -#include -#include - -static void gemini_idle(void) -{ - /* - * Because of broken hardware we have to enable interrupts or the CPU - * will never wakeup... Acctualy it is not very good to enable - * interrupts first since scheduler can miss a tick, but there is - * no other way around this. Platforms that needs it for power saving - * should call enable_hlt() in init code, since by default it is - * disabled. - */ - local_irq_enable(); - cpu_do_idle(); -} - -static int __init gemini_idle_init(void) -{ - arm_pm_idle = gemini_idle; - return 0; -} - -arch_initcall(gemini_idle_init); diff --git a/trunk/arch/arm/mach-gemini/include/mach/entry-macro.S b/trunk/arch/arm/mach-gemini/include/mach/entry-macro.S index f044e430bfa4..1624f91a2b8b 100644 --- a/trunk/arch/arm/mach-gemini/include/mach/entry-macro.S +++ b/trunk/arch/arm/mach-gemini/include/mach/entry-macro.S @@ -12,9 +12,15 @@ #define IRQ_STATUS 0x14 + .macro disable_fiq + .endm + .macro get_irqnr_preamble, base, tmp .endm + .macro arch_ret_to_user, tmp1, tmp2 + .endm + .macro get_irqnr_and_base, irqnr, irqstat, base, tmp ldr \irqstat, =IO_ADDRESS(GEMINI_INTERRUPT_BASE + IRQ_STATUS) ldr \irqnr, [\irqstat] diff --git a/trunk/arch/arm/mach-gemini/include/mach/system.h b/trunk/arch/arm/mach-gemini/include/mach/system.h index a33b5a1f8ab4..4d9c1f872472 100644 --- a/trunk/arch/arm/mach-gemini/include/mach/system.h +++ b/trunk/arch/arm/mach-gemini/include/mach/system.h @@ -14,6 +14,20 @@ #include #include +static inline void arch_idle(void) +{ + /* + * Because of broken hardware we have to enable interrupts or the CPU + * will never wakeup... Acctualy it is not very good to enable + * interrupts here since scheduler can miss a tick, but there is + * no other way around this. Platforms that needs it for power saving + * should call enable_hlt() in init code, since by default it is + * disabled. + */ + local_irq_enable(); + cpu_do_idle(); +} + static inline void arch_reset(char mode, const char *cmd) { __raw_writel(RESET_GLOBAL | RESET_CPU1, diff --git a/trunk/arch/arm/mach-gemini/irq.c b/trunk/arch/arm/mach-gemini/irq.c index ca70e5fcc7ac..9485a8fdf851 100644 --- a/trunk/arch/arm/mach-gemini/irq.c +++ b/trunk/arch/arm/mach-gemini/irq.c @@ -73,8 +73,8 @@ void __init gemini_init_irq(void) unsigned int i, mode = 0, level = 0; /* - * Disable the idle handler by default since it is buggy - * For more info see arch/arm/mach-gemini/idle.c + * Disable arch_idle() by default since it is buggy + * For more info see arch/arm/mach-gemini/include/mach/system.h */ disable_hlt(); diff --git a/trunk/arch/arm/mach-h720x/common.c b/trunk/arch/arm/mach-h720x/common.c index e756d1ac00c2..f8a2f6bb5483 100644 --- a/trunk/arch/arm/mach-h720x/common.c +++ b/trunk/arch/arm/mach-h720x/common.c @@ -247,21 +247,3 @@ void h720x_restart(char mode, const char *cmd) { CPU_REG (PMU_BASE, PMU_STAT) |= PMU_WARMRESET; } - -static void h720x__idle(void) -{ - CPU_REG (PMU_BASE, PMU_MODE) = PMU_MODE_IDLE; - nop(); - nop(); - CPU_REG (PMU_BASE, PMU_MODE) = PMU_MODE_RUN; - nop(); - nop(); -} - -static int __init h720x_idle_init(void) -{ - arm_pm_idle = h720x__idle; - return 0; -} - -arch_initcall(h720x_idle_init); diff --git a/trunk/arch/arm/mach-h720x/include/mach/entry-macro.S b/trunk/arch/arm/mach-h720x/include/mach/entry-macro.S index 75267fad7012..c3948e5ba4a0 100644 --- a/trunk/arch/arm/mach-h720x/include/mach/entry-macro.S +++ b/trunk/arch/arm/mach-h720x/include/mach/entry-macro.S @@ -8,9 +8,15 @@ * warranty of any kind, whether express or implied. */ + .macro disable_fiq + .endm + .macro get_irqnr_preamble, base, tmp .endm + .macro arch_ret_to_user, tmp1, tmp2 + .endm + .macro get_irqnr_and_base, irqnr, irqstat, base, tmp #if defined (CONFIG_CPU_H7201) || defined (CONFIG_CPU_H7202) @ we could use the id register on H7202, but this is not diff --git a/trunk/arch/arm/mach-h720x/include/mach/system.h b/trunk/arch/arm/mach-h720x/include/mach/system.h new file mode 100644 index 000000000000..16ac46e239aa --- /dev/null +++ b/trunk/arch/arm/mach-h720x/include/mach/system.h @@ -0,0 +1,27 @@ +/* + * arch/arm/mach-h720x/include/mach/system.h + * + * Copyright (C) 2001-2002 Jungjun Kim, Hynix Semiconductor Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * arch/arm/mach-h720x/include/mach/system.h + * + */ + +#ifndef __ASM_ARCH_SYSTEM_H +#define __ASM_ARCH_SYSTEM_H +#include + +static void arch_idle(void) +{ + CPU_REG (PMU_BASE, PMU_MODE) = PMU_MODE_IDLE; + nop(); + nop(); + CPU_REG (PMU_BASE, PMU_MODE) = PMU_MODE_RUN; + nop(); + nop(); +} + +#endif diff --git a/trunk/arch/arm/mach-highbank/include/mach/entry-macro.S b/trunk/arch/arm/mach-highbank/include/mach/entry-macro.S new file mode 100644 index 000000000000..a14f9e62ca92 --- /dev/null +++ b/trunk/arch/arm/mach-highbank/include/mach/entry-macro.S @@ -0,0 +1,5 @@ + .macro disable_fiq + .endm + + .macro arch_ret_to_user, tmp1, tmp2 + .endm diff --git a/trunk/arch/arm/mach-highbank/include/mach/system.h b/trunk/arch/arm/mach-highbank/include/mach/system.h new file mode 100644 index 000000000000..b1d8b5fbe373 --- /dev/null +++ b/trunk/arch/arm/mach-highbank/include/mach/system.h @@ -0,0 +1,24 @@ +/* + * Copyright 2010-2011 Calxeda, Inc. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program. If not, see . + */ +#ifndef __MACH_SYSTEM_H +#define __MACH_SYSTEM_H + +static inline void arch_idle(void) +{ + cpu_do_idle(); +} + +#endif diff --git a/trunk/arch/arm/mach-imx/mm-imx3.c b/trunk/arch/arm/mach-imx/mm-imx3.c index 8404ee72555a..31807d2a8b7b 100644 --- a/trunk/arch/arm/mach-imx/mm-imx3.c +++ b/trunk/arch/arm/mach-imx/mm-imx3.c @@ -34,29 +34,31 @@ static void imx3_idle(void) { unsigned long reg = 0; - __asm__ __volatile__( - /* disable I and D cache */ - "mrc p15, 0, %0, c1, c0, 0\n" - "bic %0, %0, #0x00001000\n" - "bic %0, %0, #0x00000004\n" - "mcr p15, 0, %0, c1, c0, 0\n" - /* invalidate I cache */ - "mov %0, #0\n" - "mcr p15, 0, %0, c7, c5, 0\n" - /* clear and invalidate D cache */ - "mov %0, #0\n" - "mcr p15, 0, %0, c7, c14, 0\n" - /* WFI */ - "mov %0, #0\n" - "mcr p15, 0, %0, c7, c0, 4\n" - "nop\n" "nop\n" "nop\n" "nop\n" - "nop\n" "nop\n" "nop\n" - /* enable I and D cache */ - "mrc p15, 0, %0, c1, c0, 0\n" - "orr %0, %0, #0x00001000\n" - "orr %0, %0, #0x00000004\n" - "mcr p15, 0, %0, c1, c0, 0\n" - : "=r" (reg)); + if (!need_resched()) + __asm__ __volatile__( + /* disable I and D cache */ + "mrc p15, 0, %0, c1, c0, 0\n" + "bic %0, %0, #0x00001000\n" + "bic %0, %0, #0x00000004\n" + "mcr p15, 0, %0, c1, c0, 0\n" + /* invalidate I cache */ + "mov %0, #0\n" + "mcr p15, 0, %0, c7, c5, 0\n" + /* clear and invalidate D cache */ + "mov %0, #0\n" + "mcr p15, 0, %0, c7, c14, 0\n" + /* WFI */ + "mov %0, #0\n" + "mcr p15, 0, %0, c7, c0, 4\n" + "nop\n" "nop\n" "nop\n" "nop\n" + "nop\n" "nop\n" "nop\n" + /* enable I and D cache */ + "mrc p15, 0, %0, c1, c0, 0\n" + "orr %0, %0, #0x00001000\n" + "orr %0, %0, #0x00000004\n" + "mcr p15, 0, %0, c1, c0, 0\n" + : "=r" (reg)); + local_irq_enable(); } static void __iomem *imx3_ioremap(unsigned long phys_addr, size_t size, @@ -132,8 +134,8 @@ void __init imx31_init_early(void) { mxc_set_cpu_type(MXC_CPU_MX31); mxc_arch_reset_init(MX31_IO_ADDRESS(MX31_WDOG_BASE_ADDR)); + pm_idle = imx3_idle; imx_ioremap = imx3_ioremap; - arm_pm_idle = imx3_idle; } void __init mx31_init_irq(void) @@ -195,7 +197,7 @@ void __init imx35_init_early(void) mxc_set_cpu_type(MXC_CPU_MX35); mxc_iomux_v3_init(MX35_IO_ADDRESS(MX35_IOMUXC_BASE_ADDR)); mxc_arch_reset_init(MX35_IO_ADDRESS(MX35_WDOG_BASE_ADDR)); - arm_pm_idle = imx3_idle; + pm_idle = imx3_idle; imx_ioremap = imx3_ioremap; } diff --git a/trunk/arch/arm/mach-imx/mm-imx5.c b/trunk/arch/arm/mach-imx/mm-imx5.c index 49549a72dc7d..bc17dfea3817 100644 --- a/trunk/arch/arm/mach-imx/mm-imx5.c +++ b/trunk/arch/arm/mach-imx/mm-imx5.c @@ -26,17 +26,23 @@ static struct clk *gpc_dvfs_clk; static void imx5_idle(void) { - /* gpc clock is needed for SRPG */ - if (gpc_dvfs_clk == NULL) { - gpc_dvfs_clk = clk_get(NULL, "gpc_dvfs"); - if (IS_ERR(gpc_dvfs_clk)) - return; - } - clk_enable(gpc_dvfs_clk); - mx5_cpu_lp_set(WAIT_UNCLOCKED_POWER_OFF); - if (tzic_enable_wake() != 0) + if (!need_resched()) { + /* gpc clock is needed for SRPG */ + if (gpc_dvfs_clk == NULL) { + gpc_dvfs_clk = clk_get(NULL, "gpc_dvfs"); + if (IS_ERR(gpc_dvfs_clk)) + goto err0; + } + clk_enable(gpc_dvfs_clk); + mx5_cpu_lp_set(WAIT_UNCLOCKED_POWER_OFF); + if (tzic_enable_wake()) + goto err1; cpu_do_idle(); - clk_disable(gpc_dvfs_clk); +err1: + clk_disable(gpc_dvfs_clk); + } +err0: + local_irq_enable(); } /* @@ -102,7 +108,7 @@ void __init imx51_init_early(void) mxc_set_cpu_type(MXC_CPU_MX51); mxc_iomux_v3_init(MX51_IO_ADDRESS(MX51_IOMUXC_BASE_ADDR)); mxc_arch_reset_init(MX51_IO_ADDRESS(MX51_WDOG1_BASE_ADDR)); - arm_pm_idle = imx5_idle; + pm_idle = imx5_idle; } void __init imx53_init_early(void) diff --git a/trunk/arch/arm/mach-imx/pm-imx27.c b/trunk/arch/arm/mach-imx/pm-imx27.c index 6fcffa7db978..e455d2f855bf 100644 --- a/trunk/arch/arm/mach-imx/pm-imx27.c +++ b/trunk/arch/arm/mach-imx/pm-imx27.c @@ -10,6 +10,7 @@ #include #include #include +#include #include static int mx27_suspend_enter(suspend_state_t state) @@ -22,7 +23,7 @@ static int mx27_suspend_enter(suspend_state_t state) cscr &= 0xFFFFFFFC; __raw_writel(cscr, MX27_IO_ADDRESS(MX27_CCM_BASE_ADDR)); /* Executes WFI */ - cpu_do_idle(); + arch_idle(); break; default: diff --git a/trunk/arch/arm/mach-integrator/core.c b/trunk/arch/arm/mach-integrator/core.c index 15b87f26ac96..019f0ab08f66 100644 --- a/trunk/arch/arm/mach-integrator/core.c +++ b/trunk/arch/arm/mach-integrator/core.c @@ -35,23 +35,67 @@ static struct amba_pl010_data integrator_uart_data; -#define INTEGRATOR_RTC_IRQ { IRQ_RTCINT } -#define INTEGRATOR_UART0_IRQ { IRQ_UARTINT0 } -#define INTEGRATOR_UART1_IRQ { IRQ_UARTINT1 } -#define KMI0_IRQ { IRQ_KMIINT0 } -#define KMI1_IRQ { IRQ_KMIINT1 } +static struct amba_device rtc_device = { + .dev = { + .init_name = "mb:15", + }, + .res = { + .start = INTEGRATOR_RTC_BASE, + .end = INTEGRATOR_RTC_BASE + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + .irq = { IRQ_RTCINT, NO_IRQ }, +}; -static AMBA_APB_DEVICE(rtc, "mb:15", 0, - INTEGRATOR_RTC_BASE, INTEGRATOR_RTC_IRQ, NULL); +static struct amba_device uart0_device = { + .dev = { + .init_name = "mb:16", + .platform_data = &integrator_uart_data, + }, + .res = { + .start = INTEGRATOR_UART0_BASE, + .end = INTEGRATOR_UART0_BASE + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + .irq = { IRQ_UARTINT0, NO_IRQ }, +}; -static AMBA_APB_DEVICE(uart0, "mb:16", 0, - INTEGRATOR_UART0_BASE, INTEGRATOR_UART0_IRQ, &integrator_uart_data); +static struct amba_device uart1_device = { + .dev = { + .init_name = "mb:17", + .platform_data = &integrator_uart_data, + }, + .res = { + .start = INTEGRATOR_UART1_BASE, + .end = INTEGRATOR_UART1_BASE + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + .irq = { IRQ_UARTINT1, NO_IRQ }, +}; -static AMBA_APB_DEVICE(uart1, "mb:17", 0, - INTEGRATOR_UART1_BASE, INTEGRATOR_UART1_IRQ, &integrator_uart_data); +static struct amba_device kmi0_device = { + .dev = { + .init_name = "mb:18", + }, + .res = { + .start = KMI0_BASE, + .end = KMI0_BASE + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + .irq = { IRQ_KMIINT0, NO_IRQ }, +}; -static AMBA_APB_DEVICE(kmi0, "mb:18", 0, KMI0_BASE, KMI0_IRQ, NULL); -static AMBA_APB_DEVICE(kmi1, "mb:19", 0, KMI1_BASE, KMI1_IRQ, NULL); +static struct amba_device kmi1_device = { + .dev = { + .init_name = "mb:19", + }, + .res = { + .start = KMI1_BASE, + .end = KMI1_BASE + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + .irq = { IRQ_KMIINT1, NO_IRQ }, +}; static struct amba_device *amba_devs[] __initdata = { &rtc_device, diff --git a/trunk/arch/arm/mach-integrator/impd1.c b/trunk/arch/arm/mach-integrator/impd1.c index 3e538da6cb1f..8cbb75a96bd4 100644 --- a/trunk/arch/arm/mach-integrator/impd1.c +++ b/trunk/arch/arm/mach-integrator/impd1.c @@ -401,21 +401,24 @@ static int impd1_probe(struct lm_device *dev) pc_base = dev->resource.start + idev->offset; - d = amba_device_alloc(NULL, pc_base, SZ_4K); + d = kzalloc(sizeof(struct amba_device), GFP_KERNEL); if (!d) continue; dev_set_name(&d->dev, "lm%x:%5.5lx", dev->id, idev->offset >> 12); d->dev.parent = &dev->dev; + d->res.start = dev->resource.start + idev->offset; + d->res.end = d->res.start + SZ_4K - 1; + d->res.flags = IORESOURCE_MEM; d->irq[0] = dev->irq; d->irq[1] = dev->irq; d->periphid = idev->id; d->dev.platform_data = idev->platform_data; - ret = amba_device_add(d, &dev->resource); + ret = amba_device_register(d, &dev->resource); if (ret) { dev_err(&d->dev, "unable to register device: %d\n", ret); - amba_device_put(d); + kfree(d); } } diff --git a/trunk/arch/arm/mach-integrator/include/mach/entry-macro.S b/trunk/arch/arm/mach-integrator/include/mach/entry-macro.S index 5cc7b85ad9df..3d029c9f3ef6 100644 --- a/trunk/arch/arm/mach-integrator/include/mach/entry-macro.S +++ b/trunk/arch/arm/mach-integrator/include/mach/entry-macro.S @@ -11,9 +11,15 @@ #include #include + .macro disable_fiq + .endm + .macro get_irqnr_preamble, base, tmp .endm + .macro arch_ret_to_user, tmp1, tmp2 + .endm + .macro get_irqnr_and_base, irqnr, irqstat, base, tmp /* FIXME: should not be using soo many LDRs here */ ldr \base, =IO_ADDRESS(INTEGRATOR_IC_BASE) diff --git a/trunk/arch/arm/mach-integrator/include/mach/system.h b/trunk/arch/arm/mach-integrator/include/mach/system.h new file mode 100644 index 000000000000..901514eba4a6 --- /dev/null +++ b/trunk/arch/arm/mach-integrator/include/mach/system.h @@ -0,0 +1,33 @@ +/* + * arch/arm/mach-integrator/include/mach/system.h + * + * Copyright (C) 1999 ARM Limited + * Copyright (C) 2000 Deep Blue Solutions Ltd + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#ifndef __ASM_ARCH_SYSTEM_H +#define __ASM_ARCH_SYSTEM_H + +static inline void arch_idle(void) +{ + /* + * This should do all the clock switching + * and wait for interrupt tricks + */ + cpu_do_idle(); +} + +#endif diff --git a/trunk/arch/arm/mach-integrator/integrator_cp.c b/trunk/arch/arm/mach-integrator/integrator_cp.c index be9ead4a3bcc..a8b6aa6003f3 100644 --- a/trunk/arch/arm/mach-integrator/integrator_cp.c +++ b/trunk/arch/arm/mach-integrator/integrator_cp.c @@ -347,14 +347,32 @@ static struct mmci_platform_data mmc_data = { .gpio_cd = -1, }; -#define INTEGRATOR_CP_MMC_IRQS { IRQ_CP_MMCIINT0, IRQ_CP_MMCIINT1 } -#define INTEGRATOR_CP_AACI_IRQS { IRQ_CP_AACIINT } - -static AMBA_APB_DEVICE(mmc, "mb:1c", 0, INTEGRATOR_CP_MMC_BASE, - INTEGRATOR_CP_MMC_IRQS, &mmc_data); +static struct amba_device mmc_device = { + .dev = { + .init_name = "mb:1c", + .platform_data = &mmc_data, + }, + .res = { + .start = INTEGRATOR_CP_MMC_BASE, + .end = INTEGRATOR_CP_MMC_BASE + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + .irq = { IRQ_CP_MMCIINT0, IRQ_CP_MMCIINT1 }, + .periphid = 0, +}; -static AMBA_APB_DEVICE(aaci, "mb:1d", 0, INTEGRATOR_CP_AACI_BASE, - INTEGRATOR_CP_AACI_IRQS, NULL); +static struct amba_device aaci_device = { + .dev = { + .init_name = "mb:1d", + }, + .res = { + .start = INTEGRATOR_CP_AACI_BASE, + .end = INTEGRATOR_CP_AACI_BASE + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + .irq = { IRQ_CP_AACIINT, NO_IRQ }, + .periphid = 0, +}; /* @@ -407,8 +425,21 @@ static struct clcd_board clcd_data = { .remove = versatile_clcd_remove_dma, }; -static AMBA_AHB_DEVICE(clcd, "mb:c0", 0, INTCP_PA_CLCD_BASE, - { IRQ_CP_CLCDCINT }, &clcd_data); +static struct amba_device clcd_device = { + .dev = { + .init_name = "mb:c0", + .coherent_dma_mask = ~0, + .platform_data = &clcd_data, + }, + .res = { + .start = INTCP_PA_CLCD_BASE, + .end = INTCP_PA_CLCD_BASE + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + .dma_mask = ~0, + .irq = { IRQ_CP_CLCDCINT, NO_IRQ }, + .periphid = 0, +}; static struct amba_device *amba_devs[] __initdata = { &mmc_device, diff --git a/trunk/arch/arm/mach-iop13xx/include/mach/entry-macro.S b/trunk/arch/arm/mach-iop13xx/include/mach/entry-macro.S index 1a2d603488d8..a624a7870c64 100644 --- a/trunk/arch/arm/mach-iop13xx/include/mach/entry-macro.S +++ b/trunk/arch/arm/mach-iop13xx/include/mach/entry-macro.S @@ -16,6 +16,9 @@ * Place - Suite 330, Boston, MA 02111-1307 USA. * */ + .macro disable_fiq + .endm + .macro get_irqnr_preamble, base, tmp mrc p15, 0, \tmp, c15, c1, 0 orr \tmp, \tmp, #(1 << 6) diff --git a/trunk/arch/arm/mach-iop13xx/include/mach/system.h b/trunk/arch/arm/mach-iop13xx/include/mach/system.h new file mode 100644 index 000000000000..1f31ed3f8ae2 --- /dev/null +++ b/trunk/arch/arm/mach-iop13xx/include/mach/system.h @@ -0,0 +1,13 @@ +/* + * arch/arm/mach-iop13xx/include/mach/system.h + * + * Copyright (C) 2004 Intel Corp. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +static inline void arch_idle(void) +{ + cpu_do_idle(); +} diff --git a/trunk/arch/arm/mach-iop32x/include/mach/entry-macro.S b/trunk/arch/arm/mach-iop32x/include/mach/entry-macro.S index ea13ae02d9b1..b02fb56bafcc 100644 --- a/trunk/arch/arm/mach-iop32x/include/mach/entry-macro.S +++ b/trunk/arch/arm/mach-iop32x/include/mach/entry-macro.S @@ -9,6 +9,9 @@ */ #include + .macro disable_fiq + .endm + .macro get_irqnr_preamble, base, tmp mrc p15, 0, \tmp, c15, c1, 0 orr \tmp, \tmp, #(1 << 6) diff --git a/trunk/arch/arm/mach-iop32x/include/mach/system.h b/trunk/arch/arm/mach-iop32x/include/mach/system.h new file mode 100644 index 000000000000..4a88727bca98 --- /dev/null +++ b/trunk/arch/arm/mach-iop32x/include/mach/system.h @@ -0,0 +1,13 @@ +/* + * arch/arm/mach-iop32x/include/mach/system.h + * + * Copyright (C) 2001 MontaVista Software, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +static inline void arch_idle(void) +{ + cpu_do_idle(); +} diff --git a/trunk/arch/arm/mach-iop33x/include/mach/entry-macro.S b/trunk/arch/arm/mach-iop33x/include/mach/entry-macro.S index 0a398fe1fba4..4e1f7282b354 100644 --- a/trunk/arch/arm/mach-iop33x/include/mach/entry-macro.S +++ b/trunk/arch/arm/mach-iop33x/include/mach/entry-macro.S @@ -9,6 +9,9 @@ */ #include + .macro disable_fiq + .endm + .macro get_irqnr_preamble, base, tmp mrc p15, 0, \tmp, c15, c1, 0 orr \tmp, \tmp, #(1 << 6) diff --git a/trunk/arch/arm/mach-iop33x/include/mach/system.h b/trunk/arch/arm/mach-iop33x/include/mach/system.h new file mode 100644 index 000000000000..4f98e765397c --- /dev/null +++ b/trunk/arch/arm/mach-iop33x/include/mach/system.h @@ -0,0 +1,13 @@ +/* + * arch/arm/mach-iop33x/include/mach/system.h + * + * Copyright (C) 2001 MontaVista Software, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +static inline void arch_idle(void) +{ + cpu_do_idle(); +} diff --git a/trunk/arch/arm/mach-ixp2000/include/mach/entry-macro.S b/trunk/arch/arm/mach-ixp2000/include/mach/entry-macro.S index c4444dff9202..5850ffc8c751 100644 --- a/trunk/arch/arm/mach-ixp2000/include/mach/entry-macro.S +++ b/trunk/arch/arm/mach-ixp2000/include/mach/entry-macro.S @@ -9,9 +9,15 @@ */ #include + .macro disable_fiq + .endm + .macro get_irqnr_preamble, base, tmp .endm + .macro arch_ret_to_user, tmp1, tmp2 + .endm + .macro get_irqnr_and_base, irqnr, irqstat, base, tmp mov \irqnr, #0x0 @clear out irqnr as default diff --git a/trunk/arch/arm/mach-ixp2000/include/mach/system.h b/trunk/arch/arm/mach-ixp2000/include/mach/system.h new file mode 100644 index 000000000000..a7fb08b2b8e7 --- /dev/null +++ b/trunk/arch/arm/mach-ixp2000/include/mach/system.h @@ -0,0 +1,14 @@ +/* + * arch/arm/mach-ixp2000/include/mach/system.h + * + * Copyright (C) 2002 Intel Corp. + * Copyricht (C) 2003-2005 MontaVista Software, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +static inline void arch_idle(void) +{ + cpu_do_idle(); +} diff --git a/trunk/arch/arm/mach-ixp23xx/core.c b/trunk/arch/arm/mach-ixp23xx/core.c index 7c1495e4fe7a..0923bb905cc0 100644 --- a/trunk/arch/arm/mach-ixp23xx/core.c +++ b/trunk/arch/arm/mach-ixp23xx/core.c @@ -441,9 +441,6 @@ static struct platform_device *ixp23xx_devices[] __initdata = { void __init ixp23xx_sys_init(void) { - /* by default, the idle code is disabled */ - disable_hlt(); - *IXP23XX_EXP_UNIT_FUSE |= 0xf; platform_add_devices(ixp23xx_devices, ARRAY_SIZE(ixp23xx_devices)); } diff --git a/trunk/arch/arm/mach-ixp23xx/include/mach/entry-macro.S b/trunk/arch/arm/mach-ixp23xx/include/mach/entry-macro.S index 3fd2cb984e42..3f5338a7bbdd 100644 --- a/trunk/arch/arm/mach-ixp23xx/include/mach/entry-macro.S +++ b/trunk/arch/arm/mach-ixp23xx/include/mach/entry-macro.S @@ -2,9 +2,15 @@ * arch/arm/mach-ixp23xx/include/mach/entry-macro.S */ + .macro disable_fiq + .endm + .macro get_irqnr_preamble, base, tmp .endm + .macro arch_ret_to_user, tmp1, tmp2 + .endm + .macro get_irqnr_and_base, irqnr, irqstat, base, tmp ldr \irqnr, =(IXP23XX_INTC_VIRT + IXP23XX_INTR_IRQ_ENC_ST_OFFSET) ldr \irqnr, [\irqnr] @ get interrupt number diff --git a/trunk/arch/arm/mach-ixp23xx/include/mach/system.h b/trunk/arch/arm/mach-ixp23xx/include/mach/system.h new file mode 100644 index 000000000000..277dda7334b9 --- /dev/null +++ b/trunk/arch/arm/mach-ixp23xx/include/mach/system.h @@ -0,0 +1,16 @@ +/* + * arch/arm/mach-ixp23xx/include/mach/system.h + * + * Copyright (C) 2003 Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +static inline void arch_idle(void) +{ +#if 0 + if (!hlt_counter) + cpu_do_idle(); +#endif +} diff --git a/trunk/arch/arm/mach-ixp4xx/common.c b/trunk/arch/arm/mach-ixp4xx/common.c index a6329a0a8ec4..3841ab4146ba 100644 --- a/trunk/arch/arm/mach-ixp4xx/common.c +++ b/trunk/arch/arm/mach-ixp4xx/common.c @@ -236,12 +236,6 @@ void __init ixp4xx_init_irq(void) { int i = 0; - /* - * ixp4xx does not implement the XScale PWRMODE register - * so it must not call cpu_do_idle(). - */ - disable_hlt(); - /* Route all sources to IRQ instead of FIQ */ *IXP4XX_ICLR = 0x0; diff --git a/trunk/arch/arm/mach-ixp4xx/include/mach/entry-macro.S b/trunk/arch/arm/mach-ixp4xx/include/mach/entry-macro.S index 79adf83e2c3d..f2e14e94ed15 100644 --- a/trunk/arch/arm/mach-ixp4xx/include/mach/entry-macro.S +++ b/trunk/arch/arm/mach-ixp4xx/include/mach/entry-macro.S @@ -9,9 +9,15 @@ */ #include + .macro disable_fiq + .endm + .macro get_irqnr_preamble, base, tmp .endm + .macro arch_ret_to_user, tmp1, tmp2 + .endm + .macro get_irqnr_and_base, irqnr, irqstat, base, tmp ldr \irqstat, =(IXP4XX_INTC_BASE_VIRT+IXP4XX_ICIP_OFFSET) ldr \irqstat, [\irqstat] @ get interrupts diff --git a/trunk/arch/arm/mach-ixp4xx/include/mach/system.h b/trunk/arch/arm/mach-ixp4xx/include/mach/system.h new file mode 100644 index 000000000000..140a9bef4466 --- /dev/null +++ b/trunk/arch/arm/mach-ixp4xx/include/mach/system.h @@ -0,0 +1,19 @@ +/* + * arch/arm/mach-ixp4xx/include/mach/system.h + * + * Copyright (C) 2002 Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ +static inline void arch_idle(void) +{ + /* ixp4xx does not implement the XScale PWRMODE register, + * so it must not call cpu_do_idle() here. + */ +#if 0 + cpu_do_idle(); +#endif +} diff --git a/trunk/arch/arm/mach-kirkwood/include/mach/entry-macro.S b/trunk/arch/arm/mach-kirkwood/include/mach/entry-macro.S index 82db29f7af8f..8939d36f893c 100644 --- a/trunk/arch/arm/mach-kirkwood/include/mach/entry-macro.S +++ b/trunk/arch/arm/mach-kirkwood/include/mach/entry-macro.S @@ -10,6 +10,12 @@ #include + .macro disable_fiq + .endm + + .macro arch_ret_to_user, tmp1, tmp2 + .endm + .macro get_irqnr_preamble, base, tmp ldr \base, =IRQ_VIRT_BASE .endm diff --git a/trunk/arch/arm/mach-kirkwood/include/mach/system.h b/trunk/arch/arm/mach-kirkwood/include/mach/system.h new file mode 100644 index 000000000000..5fddde002b5e --- /dev/null +++ b/trunk/arch/arm/mach-kirkwood/include/mach/system.h @@ -0,0 +1,17 @@ +/* + * arch/arm/mach-kirkwood/include/mach/system.h + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#ifndef __ASM_ARCH_SYSTEM_H +#define __ASM_ARCH_SYSTEM_H + +static inline void arch_idle(void) +{ + cpu_do_idle(); +} + +#endif diff --git a/trunk/arch/arm/mach-ks8695/include/mach/entry-macro.S b/trunk/arch/arm/mach-ks8695/include/mach/entry-macro.S index 8315b34f32ff..b4fe0c11c6ce 100644 --- a/trunk/arch/arm/mach-ks8695/include/mach/entry-macro.S +++ b/trunk/arch/arm/mach-ks8695/include/mach/entry-macro.S @@ -14,10 +14,16 @@ #include #include + .macro disable_fiq + .endm + .macro get_irqnr_preamble, base, tmp ldr \base, =KS8695_IRQ_VA @ Base address of interrupt controller .endm + .macro arch_ret_to_user, tmp1, tmp2 + .endm + .macro get_irqnr_and_base, irqnr, irqstat, base, tmp ldr \irqstat, [\base, #KS8695_INTMS] @ Mask Status register diff --git a/trunk/arch/arm/mach-ks8695/include/mach/system.h b/trunk/arch/arm/mach-ks8695/include/mach/system.h new file mode 100644 index 000000000000..59fe992395bf --- /dev/null +++ b/trunk/arch/arm/mach-ks8695/include/mach/system.h @@ -0,0 +1,27 @@ +/* + * arch/arm/mach-s3c2410/include/mach/system.h + * + * Copyright (C) 2006 Simtec Electronics + * Ben Dooks + * + * KS8695 - System function defines and includes + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __ASM_ARCH_SYSTEM_H +#define __ASM_ARCH_SYSTEM_H + +static void arch_idle(void) +{ + /* + * This should do all the clock switching + * and wait for interrupt tricks, + */ + cpu_do_idle(); + +} + +#endif diff --git a/trunk/arch/arm/mach-lpc32xx/include/mach/entry-macro.S b/trunk/arch/arm/mach-lpc32xx/include/mach/entry-macro.S index 24ca11b377c8..b725f6c93975 100644 --- a/trunk/arch/arm/mach-lpc32xx/include/mach/entry-macro.S +++ b/trunk/arch/arm/mach-lpc32xx/include/mach/entry-macro.S @@ -21,10 +21,16 @@ #define LPC32XX_INTC_MASKED_STATUS_OFS 0x8 + .macro disable_fiq + .endm + .macro get_irqnr_preamble, base, tmp ldr \base, =IO_ADDRESS(LPC32XX_MIC_BASE) .endm + .macro arch_ret_to_user, tmp1, tmp2 + .endm + /* * Return IRQ number in irqnr. Also return processor Z flag status in CPSR * as set if an interrupt is pending. diff --git a/trunk/arch/arm/mach-lpc32xx/include/mach/system.h b/trunk/arch/arm/mach-lpc32xx/include/mach/system.h new file mode 100644 index 000000000000..bf176c991520 --- /dev/null +++ b/trunk/arch/arm/mach-lpc32xx/include/mach/system.h @@ -0,0 +1,27 @@ +/* + * arch/arm/mach-lpc32xx/include/mach/system.h + * + * Author: Kevin Wells + * + * Copyright (C) 2010 NXP Semiconductors + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef __ASM_ARCH_SYSTEM_H +#define __ASM_ARCH_SYSTEM_H + +static void arch_idle(void) +{ + cpu_do_idle(); +} + +#endif diff --git a/trunk/arch/arm/mach-lpc32xx/phy3250.c b/trunk/arch/arm/mach-lpc32xx/phy3250.c index 5d51c102c255..bfee5b455105 100644 --- a/trunk/arch/arm/mach-lpc32xx/phy3250.c +++ b/trunk/arch/arm/mach-lpc32xx/phy3250.c @@ -149,8 +149,20 @@ static struct clcd_board lpc32xx_clcd_data = { .remove = lpc32xx_clcd_remove, }; -static AMBA_AHB_DEVICE(lpc32xx_clcd, "dev:clcd", 0, - LPC32XX_LCD_BASE, { IRQ_LPC32XX_LCD }, &lpc32xx_clcd_data); +static struct amba_device lpc32xx_clcd_device = { + .dev = { + .coherent_dma_mask = ~0, + .init_name = "dev:clcd", + .platform_data = &lpc32xx_clcd_data, + }, + .res = { + .start = LPC32XX_LCD_BASE, + .end = (LPC32XX_LCD_BASE + SZ_4K - 1), + .flags = IORESOURCE_MEM, + }, + .dma_mask = ~0, + .irq = {IRQ_LPC32XX_LCD, NO_IRQ}, +}; /* * AMBA SSP (SPI) @@ -179,8 +191,20 @@ static struct pl022_ssp_controller lpc32xx_ssp0_data = { .enable_dma = 0, }; -static AMBA_APB_DEVICE(lpc32xx_ssp0, "dev:ssp0", 0, - LPC32XX_SSP0_BASE, { IRQ_LPC32XX_SSP0 }, &lpc32xx_ssp0_data); +static struct amba_device lpc32xx_ssp0_device = { + .dev = { + .coherent_dma_mask = ~0, + .init_name = "dev:ssp0", + .platform_data = &lpc32xx_ssp0_data, + }, + .res = { + .start = LPC32XX_SSP0_BASE, + .end = (LPC32XX_SSP0_BASE + SZ_4K - 1), + .flags = IORESOURCE_MEM, + }, + .dma_mask = ~0, + .irq = {IRQ_LPC32XX_SSP0, NO_IRQ}, +}; /* AT25 driver registration */ static int __init phy3250_spi_board_register(void) diff --git a/trunk/arch/arm/mach-mmp/include/mach/entry-macro.S b/trunk/arch/arm/mach-mmp/include/mach/entry-macro.S index 9cff9e7a2b26..c42d9d4e892d 100644 --- a/trunk/arch/arm/mach-mmp/include/mach/entry-macro.S +++ b/trunk/arch/arm/mach-mmp/include/mach/entry-macro.S @@ -8,6 +8,12 @@ #include + .macro disable_fiq + .endm + + .macro arch_ret_to_user, tmp1, tmp2 + .endm + .macro get_irqnr_preamble, base, tmp mrc p15, 0, \tmp, c0, c0, 0 @ CPUID and \tmp, \tmp, #0xff00 diff --git a/trunk/arch/arm/mach-mmp/include/mach/system.h b/trunk/arch/arm/mach-mmp/include/mach/system.h new file mode 100644 index 000000000000..1d001eab81e1 --- /dev/null +++ b/trunk/arch/arm/mach-mmp/include/mach/system.h @@ -0,0 +1,16 @@ +/* + * linux/arch/arm/mach-mmp/include/mach/system.h + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __ASM_MACH_SYSTEM_H +#define __ASM_MACH_SYSTEM_H + +static inline void arch_idle(void) +{ + cpu_do_idle(); +} +#endif /* __ASM_MACH_SYSTEM_H */ diff --git a/trunk/arch/arm/mach-msm/idle.S b/trunk/arch/arm/mach-msm/idle.S new file mode 100644 index 000000000000..6a94f0527137 --- /dev/null +++ b/trunk/arch/arm/mach-msm/idle.S @@ -0,0 +1,36 @@ +/* arch/arm/mach-msm/include/mach/idle.S + * + * Idle processing for MSM7K - work around bugs with SWFI. + * + * Copyright (c) 2007 QUALCOMM Incorporated. + * Copyright (C) 2007 Google, Inc. + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include +#include + +ENTRY(arch_idle) +#ifdef CONFIG_MSM7X00A_IDLE + mrc p15, 0, r1, c1, c0, 0 /* read current CR */ + bic r0, r1, #(1 << 2) /* clear dcache bit */ + bic r0, r0, #(1 << 12) /* clear icache bit */ + mcr p15, 0, r0, c1, c0, 0 /* disable d/i cache */ + + mov r0, #0 /* prepare wfi value */ + mcr p15, 0, r0, c7, c10, 0 /* flush the cache */ + mcr p15, 0, r0, c7, c10, 4 /* memory barrier */ + mcr p15, 0, r0, c7, c0, 4 /* wait for interrupt */ + + mcr p15, 0, r1, c1, c0, 0 /* restore d/i cache */ +#endif + mov pc, lr diff --git a/trunk/arch/arm/mach-msm/idle.c b/trunk/arch/arm/mach-msm/idle.c deleted file mode 100644 index 0c9e13c65743..000000000000 --- a/trunk/arch/arm/mach-msm/idle.c +++ /dev/null @@ -1,49 +0,0 @@ -/* arch/arm/mach-msm/idle.c - * - * Idle processing for MSM7K - work around bugs with SWFI. - * - * Copyright (c) 2007 QUALCOMM Incorporated. - * Copyright (C) 2007 Google, Inc. - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#include -#include - -static void msm_idle(void) -{ -#ifdef CONFIG_MSM7X00A_IDLE - asm volatile ( - - "mrc p15, 0, r1, c1, c0, 0 /* read current CR */ \n\t" - "bic r0, r1, #(1 << 2) /* clear dcache bit */ \n\t" - "bic r0, r0, #(1 << 12) /* clear icache bit */ \n\t" - "mcr p15, 0, r0, c1, c0, 0 /* disable d/i cache */ \n\t" - - "mov r0, #0 /* prepare wfi value */ \n\t" - "mcr p15, 0, r0, c7, c10, 0 /* flush the cache */ \n\t" - "mcr p15, 0, r0, c7, c10, 4 /* memory barrier */ \n\t" - "mcr p15, 0, r0, c7, c0, 4 /* wait for interrupt */ \n\t" - - "mcr p15, 0, r1, c1, c0, 0 /* restore d/i cache */ \n\t" - - : : : "r0","r1" ); -#endif -} - -static int __init msm_idle_init(void) -{ - arm_pm_idle = msm_idle; - return 0; -} - -arch_initcall(msm_idle_init); diff --git a/trunk/arch/arm/mach-msm/include/mach/entry-macro.S b/trunk/arch/arm/mach-msm/include/mach/entry-macro.S index f2ae9087f654..41f7003ef34f 100644 --- a/trunk/arch/arm/mach-msm/include/mach/entry-macro.S +++ b/trunk/arch/arm/mach-msm/include/mach/entry-macro.S @@ -16,6 +16,12 @@ * */ + .macro disable_fiq + .endm + + .macro arch_ret_to_user, tmp1, tmp2 + .endm + #if !defined(CONFIG_ARM_GIC) #include diff --git a/trunk/arch/arm/mach-msm/include/mach/system.h b/trunk/arch/arm/mach-msm/include/mach/system.h index f5fb2ec87ffe..311db2b35da0 100644 --- a/trunk/arch/arm/mach-msm/include/mach/system.h +++ b/trunk/arch/arm/mach-msm/include/mach/system.h @@ -12,6 +12,7 @@ * GNU General Public License for more details. * */ +void arch_idle(void); /* low level hardware reset hook -- for example, hitting the * PSHOLD line on the PMIC to hard reset the system diff --git a/trunk/arch/arm/mach-mv78xx0/include/mach/entry-macro.S b/trunk/arch/arm/mach-mv78xx0/include/mach/entry-macro.S index 6b1f088e0597..66ae2d29e773 100644 --- a/trunk/arch/arm/mach-mv78xx0/include/mach/entry-macro.S +++ b/trunk/arch/arm/mach-mv78xx0/include/mach/entry-macro.S @@ -10,6 +10,12 @@ #include + .macro disable_fiq + .endm + + .macro arch_ret_to_user, tmp1, tmp2 + .endm + .macro get_irqnr_preamble, base, tmp ldr \base, =IRQ_VIRT_BASE .endm diff --git a/trunk/arch/arm/mach-mv78xx0/include/mach/system.h b/trunk/arch/arm/mach-mv78xx0/include/mach/system.h new file mode 100644 index 000000000000..8c3a5387cec7 --- /dev/null +++ b/trunk/arch/arm/mach-mv78xx0/include/mach/system.h @@ -0,0 +1,17 @@ +/* + * arch/arm/mach-mv78xx0/include/mach/system.h + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#ifndef __ASM_ARCH_SYSTEM_H +#define __ASM_ARCH_SYSTEM_H + +static inline void arch_idle(void) +{ + cpu_do_idle(); +} + +#endif diff --git a/trunk/arch/arm/mach-mxs/devices.c b/trunk/arch/arm/mach-mxs/devices.c index 01faffec3064..fe3e847930c9 100644 --- a/trunk/arch/arm/mach-mxs/devices.c +++ b/trunk/arch/arm/mach-mxs/devices.c @@ -77,18 +77,16 @@ struct platform_device *__init mxs_add_platform_device_dmamask( int __init mxs_add_amba_device(const struct amba_device *dev) { - struct amba_device *adev = amba_device_alloc(dev->dev.init_name, - dev->res.start, resource_size(&dev->res)); + struct amba_device *adev = kmalloc(sizeof(*adev), GFP_KERNEL); if (!adev) { pr_err("%s: failed to allocate memory", __func__); return -ENOMEM; } - adev->irq[0] = dev->irq[0]; - adev->irq[1] = dev->irq[1]; + *adev = *dev; - return amba_device_add(adev, &iomem_resource); + return amba_device_register(adev, &iomem_resource); } struct device mxs_apbh_bus = { diff --git a/trunk/arch/arm/mach-mxs/devices/amba-duart.c b/trunk/arch/arm/mach-mxs/devices/amba-duart.c index a5479f766046..a559db09b49c 100644 --- a/trunk/arch/arm/mach-mxs/devices/amba-duart.c +++ b/trunk/arch/arm/mach-mxs/devices/amba-duart.c @@ -23,7 +23,7 @@ const struct amba_device name##_device __initconst = { \ .end = (soc ## _DUART_BASE_ADDR) + SZ_8K - 1, \ .flags = IORESOURCE_MEM, \ }, \ - .irq = {soc ## _INT_DUART}, \ + .irq = {soc ## _INT_DUART, NO_IRQ}, \ } #ifdef CONFIG_SOC_IMX23 diff --git a/trunk/arch/arm/mach-mxs/include/mach/entry-macro.S b/trunk/arch/arm/mach-mxs/include/mach/entry-macro.S index 0c14259705b9..9f0da12e657a 100644 --- a/trunk/arch/arm/mach-mxs/include/mach/entry-macro.S +++ b/trunk/arch/arm/mach-mxs/include/mach/entry-macro.S @@ -23,6 +23,9 @@ #define MXS_ICOLL_VBASE MXS_IO_ADDRESS(MXS_ICOLL_BASE_ADDR) #define HW_ICOLL_STAT_OFFSET 0x70 + .macro disable_fiq + .endm + .macro get_irqnr_and_base, irqnr, irqstat, base, tmp ldr \irqnr, [\base, #HW_ICOLL_STAT_OFFSET] cmp \irqnr, #0x7F @@ -33,3 +36,6 @@ .macro get_irqnr_preamble, base, tmp ldr \base, =MXS_ICOLL_VBASE .endm + + .macro arch_ret_to_user, tmp1, tmp2 + .endm diff --git a/trunk/arch/arm/mach-mxs/include/mach/system.h b/trunk/arch/arm/mach-mxs/include/mach/system.h new file mode 100644 index 000000000000..e7ad1bb29423 --- /dev/null +++ b/trunk/arch/arm/mach-mxs/include/mach/system.h @@ -0,0 +1,25 @@ +/* + * Copyright (C) 1999 ARM Limited + * Copyright (C) 2000 Deep Blue Solutions Ltd + * Copyright 2004-2008 Freescale Semiconductor, Inc. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef __MACH_MXS_SYSTEM_H__ +#define __MACH_MXS_SYSTEM_H__ + +static inline void arch_idle(void) +{ + cpu_do_idle(); +} + +#endif /* __MACH_MXS_SYSTEM_H__ */ diff --git a/trunk/arch/arm/mach-mxs/pm.c b/trunk/arch/arm/mach-mxs/pm.c index a9b4bbcdafb4..fb042da29bda 100644 --- a/trunk/arch/arm/mach-mxs/pm.c +++ b/trunk/arch/arm/mach-mxs/pm.c @@ -15,12 +15,13 @@ #include #include #include +#include static int mxs_suspend_enter(suspend_state_t state) { switch (state) { case PM_SUSPEND_MEM: - cpu_do_idle(); + arch_idle(); break; default: diff --git a/trunk/arch/arm/mach-netx/fb.c b/trunk/arch/arm/mach-netx/fb.c index 2cdf6ef69bee..b9913234bbf6 100644 --- a/trunk/arch/arm/mach-netx/fb.c +++ b/trunk/arch/arm/mach-netx/fb.c @@ -92,7 +92,18 @@ void clk_put(struct clk *clk) { } -static AMBA_AHB_DEVICE(fb, "fb", 0, 0x00104000, { NETX_IRQ_LCD }, NULL); +static struct amba_device fb_device = { + .dev = { + .init_name = "fb", + .coherent_dma_mask = ~0, + }, + .res = { + .start = 0x00104000, + .end = 0x00104fff, + .flags = IORESOURCE_MEM, + }, + .irq = { NETX_IRQ_LCD, NO_IRQ }, +}; int netx_fb_init(struct clcd_board *board, struct clcd_panel *panel) { diff --git a/trunk/arch/arm/mach-netx/include/mach/entry-macro.S b/trunk/arch/arm/mach-netx/include/mach/entry-macro.S new file mode 100644 index 000000000000..6e9f1cbe1634 --- /dev/null +++ b/trunk/arch/arm/mach-netx/include/mach/entry-macro.S @@ -0,0 +1,26 @@ +/* + * arch/arm/mach-netx/include/mach/entry-macro.S + * + * Low-level IRQ helper macros for Hilscher netX based platforms + * + * Copyright (C) 2005 Sascha Hauer , Pengutronix + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 + * as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + + .macro disable_fiq + .endm + + .macro arch_ret_to_user, tmp1, tmp2 + .endm diff --git a/trunk/arch/arm/mach-netx/include/mach/system.h b/trunk/arch/arm/mach-netx/include/mach/system.h new file mode 100644 index 000000000000..b38fa36d58c4 --- /dev/null +++ b/trunk/arch/arm/mach-netx/include/mach/system.h @@ -0,0 +1,28 @@ +/* + * arch/arm/mach-netx/include/mach/system.h + * + * Copyright (C) 2005 Sascha Hauer , Pengutronix + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 + * as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#ifndef __ASM_ARCH_SYSTEM_H +#define __ASM_ARCH_SYSTEM_H + +static inline void arch_idle(void) +{ + cpu_do_idle(); +} + +#endif + diff --git a/trunk/arch/arm/mach-nomadik/board-nhk8815.c b/trunk/arch/arm/mach-nomadik/board-nhk8815.c index f6f74adbe8c4..7c878bf00340 100644 --- a/trunk/arch/arm/mach-nomadik/board-nhk8815.c +++ b/trunk/arch/arm/mach-nomadik/board-nhk8815.c @@ -185,11 +185,20 @@ static void __init nhk8815_onenand_init(void) #endif } -static AMBA_APB_DEVICE(uart0, "uart0", 0, NOMADIK_UART0_BASE, - { IRQ_UART0 }, NULL); +#define __MEM_4K_RESOURCE(x) \ + .res = {.start = (x), .end = (x) + SZ_4K - 1, .flags = IORESOURCE_MEM} -static AMBA_APB_DEVICE(uart1, "uart1", 0, NOMADIK_UART1_BASE, - { IRQ_UART1 }, NULL); +static struct amba_device uart0_device = { + .dev = { .init_name = "uart0" }, + __MEM_4K_RESOURCE(NOMADIK_UART0_BASE), + .irq = {IRQ_UART0, NO_IRQ}, +}; + +static struct amba_device uart1_device = { + .dev = { .init_name = "uart1" }, + __MEM_4K_RESOURCE(NOMADIK_UART1_BASE), + .irq = {IRQ_UART1, NO_IRQ}, +}; static struct amba_device *amba_devs[] __initdata = { &uart0_device, diff --git a/trunk/arch/arm/mach-nomadik/cpu-8815.c b/trunk/arch/arm/mach-nomadik/cpu-8815.c index 27f43a46985e..65df7b4fdd3e 100644 --- a/trunk/arch/arm/mach-nomadik/cpu-8815.c +++ b/trunk/arch/arm/mach-nomadik/cpu-8815.c @@ -97,7 +97,12 @@ static struct platform_device cpu8815_platform_gpio[] = { GPIO_DEVICE(3), }; -static AMBA_APB_DEVICE(cpu8815_amba_rng, "rng", 0, NOMADIK_RNG_BASE, { }, NULL); +static struct amba_device cpu8815_amba_rng = { + .dev = { + .init_name = "rng", + }, + __MEM_4K_RESOURCE(NOMADIK_RNG_BASE), +}; static struct platform_device *platform_devs[] __initdata = { cpu8815_platform_gpio + 0, @@ -107,7 +112,7 @@ static struct platform_device *platform_devs[] __initdata = { }; static struct amba_device *amba_devs[] __initdata = { - &cpu8815_amba_rng_device + &cpu8815_amba_rng }; static int __init cpu8815_init(void) diff --git a/trunk/arch/arm/mach-nomadik/include/mach/entry-macro.S b/trunk/arch/arm/mach-nomadik/include/mach/entry-macro.S new file mode 100644 index 000000000000..98ea1c1fbbab --- /dev/null +++ b/trunk/arch/arm/mach-nomadik/include/mach/entry-macro.S @@ -0,0 +1,13 @@ +/* + * Low-level IRQ helper macros for Nomadik platforms + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + + .macro disable_fiq + .endm + + .macro arch_ret_to_user, tmp1, tmp2 + .endm diff --git a/trunk/arch/arm/mach-nomadik/include/mach/system.h b/trunk/arch/arm/mach-nomadik/include/mach/system.h new file mode 100644 index 000000000000..25e198b8976c --- /dev/null +++ b/trunk/arch/arm/mach-nomadik/include/mach/system.h @@ -0,0 +1,32 @@ +/* + * mach-nomadik/include/mach/system.h + * + * Copyright (C) 2008 STMicroelectronics + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#ifndef __ASM_ARCH_SYSTEM_H +#define __ASM_ARCH_SYSTEM_H + +static inline void arch_idle(void) +{ + /* + * This should do all the clock switching + * and wait for interrupt tricks + */ + cpu_do_idle(); +} + +#endif diff --git a/trunk/arch/arm/mach-omap1/include/mach/entry-macro.S b/trunk/arch/arm/mach-omap1/include/mach/entry-macro.S index 83c0250c530a..bfb4fb1d7382 100644 --- a/trunk/arch/arm/mach-omap1/include/mach/entry-macro.S +++ b/trunk/arch/arm/mach-omap1/include/mach/entry-macro.S @@ -14,9 +14,15 @@ #include #include + .macro disable_fiq + .endm + .macro get_irqnr_preamble, base, tmp .endm + .macro arch_ret_to_user, tmp1, tmp2 + .endm + .macro get_irqnr_and_base, irqnr, irqstat, base, tmp ldr \base, =OMAP1_IO_ADDRESS(OMAP_IH1_BASE) ldr \irqnr, [\base, #IRQ_ITR_REG_OFFSET] diff --git a/trunk/arch/arm/mach-omap1/include/mach/system.h b/trunk/arch/arm/mach-omap1/include/mach/system.h new file mode 100644 index 000000000000..a6c1b3a16dfc --- /dev/null +++ b/trunk/arch/arm/mach-omap1/include/mach/system.h @@ -0,0 +1,5 @@ +/* + * arch/arm/mach-omap1/include/mach/system.h + */ + +#include diff --git a/trunk/arch/arm/mach-omap1/pm.c b/trunk/arch/arm/mach-omap1/pm.c index 0c2c3669d594..89ea20ca0ccc 100644 --- a/trunk/arch/arm/mach-omap1/pm.c +++ b/trunk/arch/arm/mach-omap1/pm.c @@ -42,9 +42,9 @@ #include #include #include -#include #include +#include #include #include @@ -108,7 +108,13 @@ void omap1_pm_idle(void) __u32 use_idlect1 = arm_idlect1_mask; int do_sleep = 0; + local_irq_disable(); local_fiq_disable(); + if (need_resched()) { + local_fiq_enable(); + local_irq_enable(); + return; + } #if defined(CONFIG_OMAP_MPU_TIMER) && !defined(CONFIG_OMAP_DM_TIMER) #warning Enable 32kHz OS timer in order to allow sleep states in idle @@ -151,12 +157,14 @@ void omap1_pm_idle(void) omap_writel(saved_idlect1, ARM_IDLECT1); local_fiq_enable(); + local_irq_enable(); return; } omap_sram_suspend(omap_readl(ARM_IDLECT1), omap_readl(ARM_IDLECT2)); local_fiq_enable(); + local_irq_enable(); } /* @@ -575,6 +583,8 @@ static void omap_pm_init_proc(void) #endif /* DEBUG && CONFIG_PROC_FS */ +static void (*saved_idle)(void) = NULL; + /* * omap_pm_prepare - Do preliminary suspend work. * @@ -582,7 +592,8 @@ static void omap_pm_init_proc(void) static int omap_pm_prepare(void) { /* We cannot sleep in idle until we have resumed */ - disable_hlt(); + saved_idle = pm_idle; + pm_idle = NULL; return 0; } @@ -619,7 +630,7 @@ static int omap_pm_enter(suspend_state_t state) static void omap_pm_finish(void) { - enable_hlt(); + pm_idle = saved_idle; } @@ -676,7 +687,7 @@ static int __init omap_pm_init(void) return -ENODEV; } - arm_pm_idle = omap1_pm_idle; + pm_idle = omap1_pm_idle; if (cpu_is_omap7xx()) setup_irq(INT_7XX_WAKE_UP_REQ, &omap_wakeup_irq); diff --git a/trunk/arch/arm/mach-omap2/board-cm-t35.c b/trunk/arch/arm/mach-omap2/board-cm-t35.c index d839c0506d8e..e921e3be24a4 100644 --- a/trunk/arch/arm/mach-omap2/board-cm-t35.c +++ b/trunk/arch/arm/mach-omap2/board-cm-t35.c @@ -280,6 +280,7 @@ static struct omap_dss_board_info cm_t35_dss_data = { static struct omap2_mcspi_device_config tdo24m_mcspi_config = { .turbo_mode = 0, + .single_channel = 1, /* 0: slave, 1: master */ }; static struct tdo24m_platform_data tdo24m_config = { diff --git a/trunk/arch/arm/mach-omap2/board-n8x0.c b/trunk/arch/arm/mach-omap2/board-n8x0.c index a9e983e01199..42a4d11fad23 100644 --- a/trunk/arch/arm/mach-omap2/board-n8x0.c +++ b/trunk/arch/arm/mach-omap2/board-n8x0.c @@ -137,6 +137,7 @@ static void __init n8x0_usb_init(void) {} static struct omap2_mcspi_device_config p54spi_mcspi_config = { .turbo_mode = 0, + .single_channel = 1, }; static struct spi_board_info n800_spi_board_info[] __initdata = { diff --git a/trunk/arch/arm/mach-omap2/board-rx51-peripherals.c b/trunk/arch/arm/mach-omap2/board-rx51-peripherals.c index 0a668916e3c1..acb4e77b39ef 100644 --- a/trunk/arch/arm/mach-omap2/board-rx51-peripherals.c +++ b/trunk/arch/arm/mach-omap2/board-rx51-peripherals.c @@ -138,14 +138,17 @@ static struct lp5523_platform_data rx51_lp5523_platform_data = { static struct omap2_mcspi_device_config wl1251_mcspi_config = { .turbo_mode = 0, + .single_channel = 1, }; static struct omap2_mcspi_device_config mipid_mcspi_config = { .turbo_mode = 0, + .single_channel = 1, }; static struct omap2_mcspi_device_config tsc2005_mcspi_config = { .turbo_mode = 0, + .single_channel = 1, }; static struct spi_board_info rx51_peripherals_spi_board_info[] __initdata = { diff --git a/trunk/arch/arm/mach-omap2/board-zoom-display.c b/trunk/arch/arm/mach-omap2/board-zoom-display.c index 281829036758..d4683ba5f721 100644 --- a/trunk/arch/arm/mach-omap2/board-zoom-display.c +++ b/trunk/arch/arm/mach-omap2/board-zoom-display.c @@ -117,6 +117,7 @@ static struct omap_dss_board_info zoom_dss_data = { static struct omap2_mcspi_device_config dss_lcd_mcspi_config = { .turbo_mode = 1, + .single_channel = 1, /* 0: slave, 1: master */ }; static struct spi_board_info nec_8048_spi_board_info[] __initdata = { diff --git a/trunk/arch/arm/mach-omap2/common-board-devices.c b/trunk/arch/arm/mach-omap2/common-board-devices.c index 2d1d775f2c3e..bcb0c5817167 100644 --- a/trunk/arch/arm/mach-omap2/common-board-devices.c +++ b/trunk/arch/arm/mach-omap2/common-board-devices.c @@ -33,6 +33,7 @@ defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE) static struct omap2_mcspi_device_config ads7846_mcspi_config = { .turbo_mode = 0, + .single_channel = 1, /* 0: slave, 1: master */ }; static struct ads7846_platform_data ads7846_config = { diff --git a/trunk/arch/arm/mach-omap2/emu.c b/trunk/arch/arm/mach-omap2/emu.c index ce91aad4cdad..9c442e290ccb 100644 --- a/trunk/arch/arm/mach-omap2/emu.c +++ b/trunk/arch/arm/mach-omap2/emu.c @@ -30,8 +30,29 @@ MODULE_AUTHOR("Alexander Shishkin"); #define ETB_BASE (L4_EMU_34XX_PHYS + 0x1b000) #define DAPCTL (L4_EMU_34XX_PHYS + 0x1d000) -static AMBA_APB_DEVICE(omap3_etb, "etb", 0x000bb907, ETB_BASE, { }, NULL); -static AMBA_APB_DEVICE(omap3_etm, "etm", 0x102bb921, ETM_BASE, { }, NULL); +static struct amba_device omap3_etb_device = { + .dev = { + .init_name = "etb", + }, + .res = { + .start = ETB_BASE, + .end = ETB_BASE + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + .periphid = 0x000bb907, +}; + +static struct amba_device omap3_etm_device = { + .dev = { + .init_name = "etm", + }, + .res = { + .start = ETM_BASE, + .end = ETM_BASE + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + .periphid = 0x102bb921, +}; static int __init emu_init(void) { @@ -45,3 +66,4 @@ static int __init emu_init(void) } subsys_initcall(emu_init); + diff --git a/trunk/arch/arm/mach-omap2/include/mach/entry-macro.S b/trunk/arch/arm/mach-omap2/include/mach/entry-macro.S new file mode 100644 index 000000000000..56964a0c4c7e --- /dev/null +++ b/trunk/arch/arm/mach-omap2/include/mach/entry-macro.S @@ -0,0 +1,18 @@ +/* + * arch/arm/plat-omap/include/mach/entry-macro.S + * + * Low-level IRQ helper macros for OMAP-based platforms + * + * Copyright (C) 2009 Texas Instruments + * Added OMAP4 support - Santosh Shilimkar + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + + .macro disable_fiq + .endm + + .macro arch_ret_to_user, tmp1, tmp2 + .endm diff --git a/trunk/arch/arm/mach-omap2/include/mach/system.h b/trunk/arch/arm/mach-omap2/include/mach/system.h new file mode 100644 index 000000000000..d488721ab90b --- /dev/null +++ b/trunk/arch/arm/mach-omap2/include/mach/system.h @@ -0,0 +1,5 @@ +/* + * arch/arm/mach-omap2/include/mach/system.h + */ + +#include diff --git a/trunk/arch/arm/mach-omap2/pm24xx.c b/trunk/arch/arm/mach-omap2/pm24xx.c index 1f736222a629..6d63973c7f15 100644 --- a/trunk/arch/arm/mach-omap2/pm24xx.c +++ b/trunk/arch/arm/mach-omap2/pm24xx.c @@ -232,6 +232,7 @@ static int omap2_can_sleep(void) static void omap2_pm_idle(void) { + local_irq_disable(); local_fiq_disable(); if (!omap2_can_sleep()) { @@ -248,6 +249,7 @@ static void omap2_pm_idle(void) out: local_fiq_enable(); + local_irq_enable(); } #ifdef CONFIG_SUSPEND @@ -258,26 +260,6 @@ static int omap2_pm_begin(suspend_state_t state) return 0; } -static int omap2_pm_suspend(void) -{ - u32 wken_wkup, mir1; - - wken_wkup = omap2_prm_read_mod_reg(WKUP_MOD, PM_WKEN); - wken_wkup &= ~OMAP24XX_EN_GPT1_MASK; - omap2_prm_write_mod_reg(wken_wkup, WKUP_MOD, PM_WKEN); - - /* Mask GPT1 */ - mir1 = omap_readl(0x480fe0a4); - omap_writel(1 << 5, 0x480fe0ac); - - omap2_enter_full_retention(); - - omap_writel(mir1, 0x480fe0a4); - omap2_prm_write_mod_reg(wken_wkup, WKUP_MOD, PM_WKEN); - - return 0; -} - static int omap2_pm_enter(suspend_state_t state) { int ret = 0; @@ -285,7 +267,7 @@ static int omap2_pm_enter(suspend_state_t state) switch (state) { case PM_SUSPEND_STANDBY: case PM_SUSPEND_MEM: - ret = omap2_pm_suspend(); + omap2_enter_full_retention(); break; default: ret = -EINVAL; @@ -466,7 +448,7 @@ static int __init omap2_pm_init(void) } suspend_set_ops(&omap_pm_ops); - arm_pm_idle = omap2_pm_idle; + pm_idle = omap2_pm_idle; return 0; } diff --git a/trunk/arch/arm/mach-omap2/pm34xx.c b/trunk/arch/arm/mach-omap2/pm34xx.c index b77df735fa6c..fc6987578920 100644 --- a/trunk/arch/arm/mach-omap2/pm34xx.c +++ b/trunk/arch/arm/mach-omap2/pm34xx.c @@ -418,9 +418,10 @@ void omap_sram_idle(void) static void omap3_pm_idle(void) { + local_irq_disable(); local_fiq_disable(); - if (omap_irq_pending()) + if (omap_irq_pending() || need_resched()) goto out; trace_power_start(POWER_CSTATE, 1, smp_processor_id()); @@ -433,6 +434,7 @@ static void omap3_pm_idle(void) out: local_fiq_enable(); + local_irq_enable(); } #ifdef CONFIG_SUSPEND @@ -846,7 +848,7 @@ static int __init omap3_pm_init(void) suspend_set_ops(&omap_pm_ops); #endif /* CONFIG_SUSPEND */ - arm_pm_idle = omap3_pm_idle; + pm_idle = omap3_pm_idle; omap3_idle_init(); /* diff --git a/trunk/arch/arm/mach-omap2/pm44xx.c b/trunk/arch/arm/mach-omap2/pm44xx.c index c840689df24a..c264ef7219c1 100644 --- a/trunk/arch/arm/mach-omap2/pm44xx.c +++ b/trunk/arch/arm/mach-omap2/pm44xx.c @@ -173,16 +173,18 @@ static int __init pwrdms_setup(struct powerdomain *pwrdm, void *unused) * omap_default_idle - OMAP4 default ilde routine.' * * Implements OMAP4 memory, IO ordering requirements which can't be addressed - * with default cpu_do_idle() hook. Used by all CPUs with !CONFIG_CPUIDLE and + * with default arch_idle() hook. Used by all CPUs with !CONFIG_CPUIDLE and * by secondary CPU with CONFIG_CPUIDLE. */ static void omap_default_idle(void) { + local_irq_disable(); local_fiq_disable(); omap_do_wfi(); local_fiq_enable(); + local_irq_enable(); } /** @@ -253,8 +255,8 @@ static int __init omap4_pm_init(void) suspend_set_ops(&omap_pm_ops); #endif /* CONFIG_SUSPEND */ - /* Overwrite the default cpu_do_idle() */ - arm_pm_idle = omap_default_idle; + /* Overwrite the default arch_idle() */ + pm_idle = omap_default_idle; omap4_idle_init(); diff --git a/trunk/arch/arm/mach-omap2/prm_common.c b/trunk/arch/arm/mach-omap2/prm_common.c index 873b51d494ea..860118ab43e2 100644 --- a/trunk/arch/arm/mach-omap2/prm_common.c +++ b/trunk/arch/arm/mach-omap2/prm_common.c @@ -24,6 +24,7 @@ #include #include +#include #include #include #include diff --git a/trunk/arch/arm/mach-orion5x/include/mach/entry-macro.S b/trunk/arch/arm/mach-orion5x/include/mach/entry-macro.S index 79eb502a1e64..d658992e5401 100644 --- a/trunk/arch/arm/mach-orion5x/include/mach/entry-macro.S +++ b/trunk/arch/arm/mach-orion5x/include/mach/entry-macro.S @@ -10,6 +10,12 @@ #include + .macro disable_fiq + .endm + + .macro arch_ret_to_user, tmp1, tmp2 + .endm + .macro get_irqnr_preamble, base, tmp ldr \base, =MAIN_IRQ_CAUSE .endm diff --git a/trunk/arch/arm/mach-orion5x/include/mach/system.h b/trunk/arch/arm/mach-orion5x/include/mach/system.h new file mode 100644 index 000000000000..825a2650cefa --- /dev/null +++ b/trunk/arch/arm/mach-orion5x/include/mach/system.h @@ -0,0 +1,19 @@ +/* + * arch/arm/mach-orion5x/include/mach/system.h + * + * Tzachi Perelstein + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#ifndef __ASM_ARCH_SYSTEM_H +#define __ASM_ARCH_SYSTEM_H + +static inline void arch_idle(void) +{ + cpu_do_idle(); +} + +#endif diff --git a/trunk/arch/arm/mach-picoxcell/include/mach/entry-macro.S b/trunk/arch/arm/mach-picoxcell/include/mach/entry-macro.S new file mode 100644 index 000000000000..9b505ac00be9 --- /dev/null +++ b/trunk/arch/arm/mach-picoxcell/include/mach/entry-macro.S @@ -0,0 +1,16 @@ +/* + * entry-macro.S + * + * Copyright (c) 2011 Picochip Ltd., Jamie Iles + * + * Low-level IRQ helper macros for picoXcell platforms + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + .macro disable_fiq + .endm + + .macro arch_ret_to_user, tmp1, tmp2 + .endm diff --git a/trunk/arch/arm/mach-picoxcell/include/mach/system.h b/trunk/arch/arm/mach-picoxcell/include/mach/system.h new file mode 100644 index 000000000000..1a5d8cb57df4 --- /dev/null +++ b/trunk/arch/arm/mach-picoxcell/include/mach/system.h @@ -0,0 +1,26 @@ +/* + * Copyright (c) 2011 Picochip Ltd., Jamie Iles + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ +#ifndef __ASM_ARCH_SYSTEM_H +#define __ASM_ARCH_SYSTEM_H + +static inline void arch_idle(void) +{ + /* + * This should do all the clock switching and wait for interrupt + * tricks. + */ + cpu_do_idle(); +} + +#endif /* __ASM_ARCH_SYSTEM_H */ diff --git a/trunk/arch/arm/mach-pnx4008/include/mach/entry-macro.S b/trunk/arch/arm/mach-pnx4008/include/mach/entry-macro.S index 77a555846719..db7eeebf30d7 100644 --- a/trunk/arch/arm/mach-pnx4008/include/mach/entry-macro.S +++ b/trunk/arch/arm/mach-pnx4008/include/mach/entry-macro.S @@ -25,9 +25,15 @@ #define SIC1_BASE_INT 32 #define SIC2_BASE_INT 64 + .macro disable_fiq + .endm + .macro get_irqnr_preamble, base, tmp .endm + .macro arch_ret_to_user, tmp1, tmp2 + .endm + .macro get_irqnr_and_base, irqnr, irqstat, base, tmp /* decode the MIC interrupt numbers */ ldr \base, =IO_ADDRESS(PNX4008_INTCTRLMIC_BASE) diff --git a/trunk/arch/arm/mach-pnx4008/include/mach/system.h b/trunk/arch/arm/mach-pnx4008/include/mach/system.h new file mode 100644 index 000000000000..60cfe7188091 --- /dev/null +++ b/trunk/arch/arm/mach-pnx4008/include/mach/system.h @@ -0,0 +1,29 @@ +/* + * arch/arm/mach-pnx4008/include/mach/system.h + * + * Copyright (C) 2003 Philips Semiconductors + * Copyright (C) 2005 MontaVista Software, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#ifndef __ASM_ARCH_SYSTEM_H +#define __ASM_ARCH_SYSTEM_H + +static void arch_idle(void) +{ + cpu_do_idle(); +} + +#endif diff --git a/trunk/arch/arm/mach-prima2/include/mach/entry-macro.S b/trunk/arch/arm/mach-prima2/include/mach/entry-macro.S index 86434e7a5be9..1c8a50f102a7 100644 --- a/trunk/arch/arm/mach-prima2/include/mach/entry-macro.S +++ b/trunk/arch/arm/mach-prima2/include/mach/entry-macro.S @@ -20,3 +20,10 @@ cmp \irqnr, #0x40 @ the irq num can't be larger than 0x3f movges \irqnr, #0 .endm + + .macro disable_fiq + .endm + + .macro arch_ret_to_user, tmp1, tmp2 + .endm + diff --git a/trunk/arch/arm/mach-prima2/include/mach/system.h b/trunk/arch/arm/mach-prima2/include/mach/system.h new file mode 100644 index 000000000000..2c7d2a9d0c92 --- /dev/null +++ b/trunk/arch/arm/mach-prima2/include/mach/system.h @@ -0,0 +1,17 @@ +/* + * arch/arm/mach-prima2/include/mach/system.h + * + * Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company. + * + * Licensed under GPLv2 or later. + */ + +#ifndef __MACH_SYSTEM_H__ +#define __MACH_SYSTEM_H__ + +static inline void arch_idle(void) +{ + cpu_do_idle(); +} + +#endif diff --git a/trunk/arch/arm/mach-pxa/include/mach/entry-macro.S b/trunk/arch/arm/mach-pxa/include/mach/entry-macro.S new file mode 100644 index 000000000000..260c0c17692a --- /dev/null +++ b/trunk/arch/arm/mach-pxa/include/mach/entry-macro.S @@ -0,0 +1,15 @@ +/* + * arch/arm/mach-pxa/include/mach/entry-macro.S + * + * Low-level IRQ helper macros for PXA-based platforms + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + + .macro disable_fiq + .endm + + .macro arch_ret_to_user, tmp1, tmp2 + .endm diff --git a/trunk/arch/arm/mach-pxa/include/mach/system.h b/trunk/arch/arm/mach-pxa/include/mach/system.h new file mode 100644 index 000000000000..c5afacd3cc0b --- /dev/null +++ b/trunk/arch/arm/mach-pxa/include/mach/system.h @@ -0,0 +1,15 @@ +/* + * arch/arm/mach-pxa/include/mach/system.h + * + * Author: Nicolas Pitre + * Created: Jun 15, 2001 + * Copyright: MontaVista Software Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +static inline void arch_idle(void) +{ + cpu_do_idle(); +} diff --git a/trunk/arch/arm/mach-realview/core.h b/trunk/arch/arm/mach-realview/core.h index f8f2c0ac4c01..735b57aaf2d6 100644 --- a/trunk/arch/arm/mach-realview/core.h +++ b/trunk/arch/arm/mach-realview/core.h @@ -28,11 +28,21 @@ #include #include -#define APB_DEVICE(name, busid, base, plat) \ -static AMBA_APB_DEVICE(name, busid, 0, REALVIEW_##base##_BASE, base##_IRQ, plat) - -#define AHB_DEVICE(name, busid, base, plat) \ -static AMBA_AHB_DEVICE(name, busid, 0, REALVIEW_##base##_BASE, base##_IRQ, plat) +#define AMBA_DEVICE(name,busid,base,plat) \ +static struct amba_device name##_device = { \ + .dev = { \ + .coherent_dma_mask = ~0, \ + .init_name = busid, \ + .platform_data = plat, \ + }, \ + .res = { \ + .start = REALVIEW_##base##_BASE, \ + .end = (REALVIEW_##base##_BASE) + SZ_4K - 1, \ + .flags = IORESOURCE_MEM, \ + }, \ + .dma_mask = ~0, \ + .irq = base##_IRQ, \ +} struct machine_desc; diff --git a/trunk/arch/arm/mach-realview/include/mach/entry-macro.S b/trunk/arch/arm/mach-realview/include/mach/entry-macro.S new file mode 100644 index 000000000000..e8a5179c2653 --- /dev/null +++ b/trunk/arch/arm/mach-realview/include/mach/entry-macro.S @@ -0,0 +1,16 @@ +/* + * arch/arm/mach-realview/include/mach/entry-macro.S + * + * Low-level IRQ helper macros for RealView platforms + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + + .macro disable_fiq + .endm + + .macro arch_ret_to_user, tmp1, tmp2 + .endm + diff --git a/trunk/arch/arm/mach-realview/include/mach/irqs-pb1176.h b/trunk/arch/arm/mach-realview/include/mach/irqs-pb1176.h index 708f84156f2c..5c3c625e3e04 100644 --- a/trunk/arch/arm/mach-realview/include/mach/irqs-pb1176.h +++ b/trunk/arch/arm/mach-realview/include/mach/irqs-pb1176.h @@ -40,7 +40,6 @@ #define IRQ_DC1176_L2CC (IRQ_DC1176_GIC_START + 13) #define IRQ_DC1176_RTC (IRQ_DC1176_GIC_START + 14) #define IRQ_DC1176_CLCD (IRQ_DC1176_GIC_START + 15) /* CLCD controller */ -#define IRQ_DC1176_GPIO0 (IRQ_DC1176_GIC_START + 16) #define IRQ_DC1176_SSP (IRQ_DC1176_GIC_START + 17) /* SSP port */ #define IRQ_DC1176_UART0 (IRQ_DC1176_GIC_START + 18) /* UART 0 on development chip */ #define IRQ_DC1176_UART1 (IRQ_DC1176_GIC_START + 19) /* UART 1 on development chip */ @@ -74,6 +73,7 @@ #define IRQ_PB1176_DMAC (IRQ_PB1176_GIC_START + 24) /* DMA controller */ #define IRQ_PB1176_RTC (IRQ_PB1176_GIC_START + 25) /* Real Time Clock */ +#define IRQ_PB1176_GPIO0 -1 #define IRQ_PB1176_SCTL -1 #define NR_GIC_PB1176 2 diff --git a/trunk/arch/arm/mach-realview/include/mach/system.h b/trunk/arch/arm/mach-realview/include/mach/system.h new file mode 100644 index 000000000000..471b671159ce --- /dev/null +++ b/trunk/arch/arm/mach-realview/include/mach/system.h @@ -0,0 +1,33 @@ +/* + * arch/arm/mach-realview/include/mach/system.h + * + * Copyright (C) 2003 ARM Limited + * Copyright (C) 2000 Deep Blue Solutions Ltd + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#ifndef __ASM_ARCH_SYSTEM_H +#define __ASM_ARCH_SYSTEM_H + +static inline void arch_idle(void) +{ + /* + * This should do all the clock switching + * and wait for interrupt tricks + */ + cpu_do_idle(); +} + +#endif diff --git a/trunk/arch/arm/mach-realview/realview_eb.c b/trunk/arch/arm/mach-realview/realview_eb.c index 157e1bc6e83c..9578145f2df0 100644 --- a/trunk/arch/arm/mach-realview/realview_eb.c +++ b/trunk/arch/arm/mach-realview/realview_eb.c @@ -135,63 +135,63 @@ static struct pl022_ssp_controller ssp0_plat_data = { /* * These devices are connected via the core APB bridge */ -#define GPIO2_IRQ { IRQ_EB_GPIO2 } -#define GPIO3_IRQ { IRQ_EB_GPIO3 } +#define GPIO2_IRQ { IRQ_EB_GPIO2, NO_IRQ } +#define GPIO3_IRQ { IRQ_EB_GPIO3, NO_IRQ } -#define AACI_IRQ { IRQ_EB_AACI } +#define AACI_IRQ { IRQ_EB_AACI, NO_IRQ } #define MMCI0_IRQ { IRQ_EB_MMCI0A, IRQ_EB_MMCI0B } -#define KMI0_IRQ { IRQ_EB_KMI0 } -#define KMI1_IRQ { IRQ_EB_KMI1 } +#define KMI0_IRQ { IRQ_EB_KMI0, NO_IRQ } +#define KMI1_IRQ { IRQ_EB_KMI1, NO_IRQ } /* * These devices are connected directly to the multi-layer AHB switch */ -#define EB_SMC_IRQ { } -#define MPMC_IRQ { } -#define EB_CLCD_IRQ { IRQ_EB_CLCD } -#define DMAC_IRQ { IRQ_EB_DMA } +#define EB_SMC_IRQ { NO_IRQ, NO_IRQ } +#define MPMC_IRQ { NO_IRQ, NO_IRQ } +#define EB_CLCD_IRQ { IRQ_EB_CLCD, NO_IRQ } +#define DMAC_IRQ { IRQ_EB_DMA, NO_IRQ } /* * These devices are connected via the core APB bridge */ -#define SCTL_IRQ { } -#define EB_WATCHDOG_IRQ { IRQ_EB_WDOG } -#define EB_GPIO0_IRQ { IRQ_EB_GPIO0 } -#define GPIO1_IRQ { IRQ_EB_GPIO1 } -#define EB_RTC_IRQ { IRQ_EB_RTC } +#define SCTL_IRQ { NO_IRQ, NO_IRQ } +#define EB_WATCHDOG_IRQ { IRQ_EB_WDOG, NO_IRQ } +#define EB_GPIO0_IRQ { IRQ_EB_GPIO0, NO_IRQ } +#define GPIO1_IRQ { IRQ_EB_GPIO1, NO_IRQ } +#define EB_RTC_IRQ { IRQ_EB_RTC, NO_IRQ } /* * These devices are connected via the DMA APB bridge */ -#define SCI_IRQ { IRQ_EB_SCI } -#define EB_UART0_IRQ { IRQ_EB_UART0 } -#define EB_UART1_IRQ { IRQ_EB_UART1 } -#define EB_UART2_IRQ { IRQ_EB_UART2 } -#define EB_UART3_IRQ { IRQ_EB_UART3 } -#define EB_SSP_IRQ { IRQ_EB_SSP } +#define SCI_IRQ { IRQ_EB_SCI, NO_IRQ } +#define EB_UART0_IRQ { IRQ_EB_UART0, NO_IRQ } +#define EB_UART1_IRQ { IRQ_EB_UART1, NO_IRQ } +#define EB_UART2_IRQ { IRQ_EB_UART2, NO_IRQ } +#define EB_UART3_IRQ { IRQ_EB_UART3, NO_IRQ } +#define EB_SSP_IRQ { IRQ_EB_SSP, NO_IRQ } /* FPGA Primecells */ -APB_DEVICE(aaci, "fpga:aaci", AACI, NULL); -APB_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data); -APB_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL); -APB_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL); -APB_DEVICE(uart3, "fpga:uart3", EB_UART3, NULL); +AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL); +AMBA_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data); +AMBA_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL); +AMBA_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL); +AMBA_DEVICE(uart3, "fpga:uart3", EB_UART3, NULL); /* DevChip Primecells */ -AHB_DEVICE(smc, "dev:smc", EB_SMC, NULL); -AHB_DEVICE(clcd, "dev:clcd", EB_CLCD, &clcd_plat_data); -AHB_DEVICE(dmac, "dev:dmac", DMAC, NULL); -AHB_DEVICE(sctl, "dev:sctl", SCTL, NULL); -APB_DEVICE(wdog, "dev:wdog", EB_WATCHDOG, NULL); -APB_DEVICE(gpio0, "dev:gpio0", EB_GPIO0, &gpio0_plat_data); -APB_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data); -APB_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data); -APB_DEVICE(rtc, "dev:rtc", EB_RTC, NULL); -APB_DEVICE(sci0, "dev:sci0", SCI, NULL); -APB_DEVICE(uart0, "dev:uart0", EB_UART0, NULL); -APB_DEVICE(uart1, "dev:uart1", EB_UART1, NULL); -APB_DEVICE(uart2, "dev:uart2", EB_UART2, NULL); -APB_DEVICE(ssp0, "dev:ssp0", EB_SSP, &ssp0_plat_data); +AMBA_DEVICE(smc, "dev:smc", EB_SMC, NULL); +AMBA_DEVICE(clcd, "dev:clcd", EB_CLCD, &clcd_plat_data); +AMBA_DEVICE(dmac, "dev:dmac", DMAC, NULL); +AMBA_DEVICE(sctl, "dev:sctl", SCTL, NULL); +AMBA_DEVICE(wdog, "dev:wdog", EB_WATCHDOG, NULL); +AMBA_DEVICE(gpio0, "dev:gpio0", EB_GPIO0, &gpio0_plat_data); +AMBA_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data); +AMBA_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data); +AMBA_DEVICE(rtc, "dev:rtc", EB_RTC, NULL); +AMBA_DEVICE(sci0, "dev:sci0", SCI, NULL); +AMBA_DEVICE(uart0, "dev:uart0", EB_UART0, NULL); +AMBA_DEVICE(uart1, "dev:uart1", EB_UART1, NULL); +AMBA_DEVICE(uart2, "dev:uart2", EB_UART2, NULL); +AMBA_DEVICE(ssp0, "dev:ssp0", EB_SSP, &ssp0_plat_data); static struct amba_device *amba_devs[] __initdata = { &dmac_device, diff --git a/trunk/arch/arm/mach-realview/realview_pb1176.c b/trunk/arch/arm/mach-realview/realview_pb1176.c index b1d7cafa1a6d..e4abe94fb11a 100644 --- a/trunk/arch/arm/mach-realview/realview_pb1176.c +++ b/trunk/arch/arm/mach-realview/realview_pb1176.c @@ -132,50 +132,50 @@ static struct pl022_ssp_controller ssp0_plat_data = { /* * RealView PB1176 AMBA devices */ -#define GPIO2_IRQ { IRQ_PB1176_GPIO2 } -#define GPIO3_IRQ { IRQ_PB1176_GPIO3 } -#define AACI_IRQ { IRQ_PB1176_AACI } +#define GPIO2_IRQ { IRQ_PB1176_GPIO2, NO_IRQ } +#define GPIO3_IRQ { IRQ_PB1176_GPIO3, NO_IRQ } +#define AACI_IRQ { IRQ_PB1176_AACI, NO_IRQ } #define MMCI0_IRQ { IRQ_PB1176_MMCI0A, IRQ_PB1176_MMCI0B } -#define KMI0_IRQ { IRQ_PB1176_KMI0 } -#define KMI1_IRQ { IRQ_PB1176_KMI1 } -#define PB1176_SMC_IRQ { } -#define MPMC_IRQ { } -#define PB1176_CLCD_IRQ { IRQ_DC1176_CLCD } -#define SCTL_IRQ { } -#define PB1176_WATCHDOG_IRQ { IRQ_DC1176_WATCHDOG } -#define PB1176_GPIO0_IRQ { IRQ_DC1176_GPIO0 } -#define GPIO1_IRQ { IRQ_PB1176_GPIO1 } -#define PB1176_RTC_IRQ { IRQ_DC1176_RTC } -#define SCI_IRQ { IRQ_PB1176_SCI } -#define PB1176_UART0_IRQ { IRQ_DC1176_UART0 } -#define PB1176_UART1_IRQ { IRQ_DC1176_UART1 } -#define PB1176_UART2_IRQ { IRQ_DC1176_UART2 } -#define PB1176_UART3_IRQ { IRQ_DC1176_UART3 } -#define PB1176_UART4_IRQ { IRQ_PB1176_UART4 } -#define PB1176_SSP_IRQ { IRQ_DC1176_SSP } +#define KMI0_IRQ { IRQ_PB1176_KMI0, NO_IRQ } +#define KMI1_IRQ { IRQ_PB1176_KMI1, NO_IRQ } +#define PB1176_SMC_IRQ { NO_IRQ, NO_IRQ } +#define MPMC_IRQ { NO_IRQ, NO_IRQ } +#define PB1176_CLCD_IRQ { IRQ_DC1176_CLCD, NO_IRQ } +#define SCTL_IRQ { NO_IRQ, NO_IRQ } +#define PB1176_WATCHDOG_IRQ { IRQ_DC1176_WATCHDOG, NO_IRQ } +#define PB1176_GPIO0_IRQ { IRQ_PB1176_GPIO0, NO_IRQ } +#define GPIO1_IRQ { IRQ_PB1176_GPIO1, NO_IRQ } +#define PB1176_RTC_IRQ { IRQ_DC1176_RTC, NO_IRQ } +#define SCI_IRQ { IRQ_PB1176_SCI, NO_IRQ } +#define PB1176_UART0_IRQ { IRQ_DC1176_UART0, NO_IRQ } +#define PB1176_UART1_IRQ { IRQ_DC1176_UART1, NO_IRQ } +#define PB1176_UART2_IRQ { IRQ_DC1176_UART2, NO_IRQ } +#define PB1176_UART3_IRQ { IRQ_DC1176_UART3, NO_IRQ } +#define PB1176_UART4_IRQ { IRQ_PB1176_UART4, NO_IRQ } +#define PB1176_SSP_IRQ { IRQ_DC1176_SSP, NO_IRQ } /* FPGA Primecells */ -APB_DEVICE(aaci, "fpga:aaci", AACI, NULL); -APB_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data); -APB_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL); -APB_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL); -APB_DEVICE(uart4, "fpga:uart4", PB1176_UART4, NULL); +AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL); +AMBA_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data); +AMBA_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL); +AMBA_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL); +AMBA_DEVICE(uart4, "fpga:uart4", PB1176_UART4, NULL); /* DevChip Primecells */ -AHB_DEVICE(smc, "dev:smc", PB1176_SMC, NULL); -AHB_DEVICE(sctl, "dev:sctl", SCTL, NULL); -APB_DEVICE(wdog, "dev:wdog", PB1176_WATCHDOG, NULL); -APB_DEVICE(gpio0, "dev:gpio0", PB1176_GPIO0, &gpio0_plat_data); -APB_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data); -APB_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data); -APB_DEVICE(rtc, "dev:rtc", PB1176_RTC, NULL); -APB_DEVICE(sci0, "dev:sci0", SCI, NULL); -APB_DEVICE(uart0, "dev:uart0", PB1176_UART0, NULL); -APB_DEVICE(uart1, "dev:uart1", PB1176_UART1, NULL); -APB_DEVICE(uart2, "dev:uart2", PB1176_UART2, NULL); -APB_DEVICE(uart3, "dev:uart3", PB1176_UART3, NULL); -APB_DEVICE(ssp0, "dev:ssp0", PB1176_SSP, &ssp0_plat_data); -AHB_DEVICE(clcd, "dev:clcd", PB1176_CLCD, &clcd_plat_data); +AMBA_DEVICE(smc, "dev:smc", PB1176_SMC, NULL); +AMBA_DEVICE(sctl, "dev:sctl", SCTL, NULL); +AMBA_DEVICE(wdog, "dev:wdog", PB1176_WATCHDOG, NULL); +AMBA_DEVICE(gpio0, "dev:gpio0", PB1176_GPIO0, &gpio0_plat_data); +AMBA_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data); +AMBA_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data); +AMBA_DEVICE(rtc, "dev:rtc", PB1176_RTC, NULL); +AMBA_DEVICE(sci0, "dev:sci0", SCI, NULL); +AMBA_DEVICE(uart0, "dev:uart0", PB1176_UART0, NULL); +AMBA_DEVICE(uart1, "dev:uart1", PB1176_UART1, NULL); +AMBA_DEVICE(uart2, "dev:uart2", PB1176_UART2, NULL); +AMBA_DEVICE(uart3, "dev:uart3", PB1176_UART3, NULL); +AMBA_DEVICE(ssp0, "dev:ssp0", PB1176_SSP, &ssp0_plat_data); +AMBA_DEVICE(clcd, "dev:clcd", PB1176_CLCD, &clcd_plat_data); static struct amba_device *amba_devs[] __initdata = { &uart0_device, diff --git a/trunk/arch/arm/mach-realview/realview_pb11mp.c b/trunk/arch/arm/mach-realview/realview_pb11mp.c index ae7fe54f6eb6..2147335f66f5 100644 --- a/trunk/arch/arm/mach-realview/realview_pb11mp.c +++ b/trunk/arch/arm/mach-realview/realview_pb11mp.c @@ -127,52 +127,52 @@ static struct pl022_ssp_controller ssp0_plat_data = { * RealView PB11MPCore AMBA devices */ -#define GPIO2_IRQ { IRQ_PB11MP_GPIO2 } -#define GPIO3_IRQ { IRQ_PB11MP_GPIO3 } -#define AACI_IRQ { IRQ_TC11MP_AACI } +#define GPIO2_IRQ { IRQ_PB11MP_GPIO2, NO_IRQ } +#define GPIO3_IRQ { IRQ_PB11MP_GPIO3, NO_IRQ } +#define AACI_IRQ { IRQ_TC11MP_AACI, NO_IRQ } #define MMCI0_IRQ { IRQ_TC11MP_MMCI0A, IRQ_TC11MP_MMCI0B } -#define KMI0_IRQ { IRQ_TC11MP_KMI0 } -#define KMI1_IRQ { IRQ_TC11MP_KMI1 } -#define PB11MP_SMC_IRQ { } -#define MPMC_IRQ { } -#define PB11MP_CLCD_IRQ { IRQ_PB11MP_CLCD } -#define DMAC_IRQ { IRQ_PB11MP_DMAC } -#define SCTL_IRQ { } -#define PB11MP_WATCHDOG_IRQ { IRQ_PB11MP_WATCHDOG } -#define PB11MP_GPIO0_IRQ { IRQ_PB11MP_GPIO0 } -#define GPIO1_IRQ { IRQ_PB11MP_GPIO1 } -#define PB11MP_RTC_IRQ { IRQ_TC11MP_RTC } -#define SCI_IRQ { IRQ_PB11MP_SCI } -#define PB11MP_UART0_IRQ { IRQ_TC11MP_UART0 } -#define PB11MP_UART1_IRQ { IRQ_TC11MP_UART1 } -#define PB11MP_UART2_IRQ { IRQ_PB11MP_UART2 } -#define PB11MP_UART3_IRQ { IRQ_PB11MP_UART3 } -#define PB11MP_SSP_IRQ { IRQ_PB11MP_SSP } +#define KMI0_IRQ { IRQ_TC11MP_KMI0, NO_IRQ } +#define KMI1_IRQ { IRQ_TC11MP_KMI1, NO_IRQ } +#define PB11MP_SMC_IRQ { NO_IRQ, NO_IRQ } +#define MPMC_IRQ { NO_IRQ, NO_IRQ } +#define PB11MP_CLCD_IRQ { IRQ_PB11MP_CLCD, NO_IRQ } +#define DMAC_IRQ { IRQ_PB11MP_DMAC, NO_IRQ } +#define SCTL_IRQ { NO_IRQ, NO_IRQ } +#define PB11MP_WATCHDOG_IRQ { IRQ_PB11MP_WATCHDOG, NO_IRQ } +#define PB11MP_GPIO0_IRQ { IRQ_PB11MP_GPIO0, NO_IRQ } +#define GPIO1_IRQ { IRQ_PB11MP_GPIO1, NO_IRQ } +#define PB11MP_RTC_IRQ { IRQ_TC11MP_RTC, NO_IRQ } +#define SCI_IRQ { IRQ_PB11MP_SCI, NO_IRQ } +#define PB11MP_UART0_IRQ { IRQ_TC11MP_UART0, NO_IRQ } +#define PB11MP_UART1_IRQ { IRQ_TC11MP_UART1, NO_IRQ } +#define PB11MP_UART2_IRQ { IRQ_PB11MP_UART2, NO_IRQ } +#define PB11MP_UART3_IRQ { IRQ_PB11MP_UART3, NO_IRQ } +#define PB11MP_SSP_IRQ { IRQ_PB11MP_SSP, NO_IRQ } /* FPGA Primecells */ -APB_DEVICE(aaci, "fpga:aaci", AACI, NULL); -APB_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data); -APB_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL); -APB_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL); -APB_DEVICE(uart3, "fpga:uart3", PB11MP_UART3, NULL); +AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL); +AMBA_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data); +AMBA_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL); +AMBA_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL); +AMBA_DEVICE(uart3, "fpga:uart3", PB11MP_UART3, NULL); /* DevChip Primecells */ -AHB_DEVICE(smc, "dev:smc", PB11MP_SMC, NULL); -AHB_DEVICE(sctl, "dev:sctl", SCTL, NULL); -APB_DEVICE(wdog, "dev:wdog", PB11MP_WATCHDOG, NULL); -APB_DEVICE(gpio0, "dev:gpio0", PB11MP_GPIO0, &gpio0_plat_data); -APB_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data); -APB_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data); -APB_DEVICE(rtc, "dev:rtc", PB11MP_RTC, NULL); -APB_DEVICE(sci0, "dev:sci0", SCI, NULL); -APB_DEVICE(uart0, "dev:uart0", PB11MP_UART0, NULL); -APB_DEVICE(uart1, "dev:uart1", PB11MP_UART1, NULL); -APB_DEVICE(uart2, "dev:uart2", PB11MP_UART2, NULL); -APB_DEVICE(ssp0, "dev:ssp0", PB11MP_SSP, &ssp0_plat_data); +AMBA_DEVICE(smc, "dev:smc", PB11MP_SMC, NULL); +AMBA_DEVICE(sctl, "dev:sctl", SCTL, NULL); +AMBA_DEVICE(wdog, "dev:wdog", PB11MP_WATCHDOG, NULL); +AMBA_DEVICE(gpio0, "dev:gpio0", PB11MP_GPIO0, &gpio0_plat_data); +AMBA_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data); +AMBA_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data); +AMBA_DEVICE(rtc, "dev:rtc", PB11MP_RTC, NULL); +AMBA_DEVICE(sci0, "dev:sci0", SCI, NULL); +AMBA_DEVICE(uart0, "dev:uart0", PB11MP_UART0, NULL); +AMBA_DEVICE(uart1, "dev:uart1", PB11MP_UART1, NULL); +AMBA_DEVICE(uart2, "dev:uart2", PB11MP_UART2, NULL); +AMBA_DEVICE(ssp0, "dev:ssp0", PB11MP_SSP, &ssp0_plat_data); /* Primecells on the NEC ISSP chip */ -AHB_DEVICE(clcd, "issp:clcd", PB11MP_CLCD, &clcd_plat_data); -AHB_DEVICE(dmac, "issp:dmac", DMAC, NULL); +AMBA_DEVICE(clcd, "issp:clcd", PB11MP_CLCD, &clcd_plat_data); +AMBA_DEVICE(dmac, "issp:dmac", DMAC, NULL); static struct amba_device *amba_devs[] __initdata = { &dmac_device, diff --git a/trunk/arch/arm/mach-realview/realview_pba8.c b/trunk/arch/arm/mach-realview/realview_pba8.c index 59650174e6ed..25b2e59296f8 100644 --- a/trunk/arch/arm/mach-realview/realview_pba8.c +++ b/trunk/arch/arm/mach-realview/realview_pba8.c @@ -122,52 +122,52 @@ static struct pl022_ssp_controller ssp0_plat_data = { * RealView PBA8Core AMBA devices */ -#define GPIO2_IRQ { IRQ_PBA8_GPIO2 } -#define GPIO3_IRQ { IRQ_PBA8_GPIO3 } -#define AACI_IRQ { IRQ_PBA8_AACI } +#define GPIO2_IRQ { IRQ_PBA8_GPIO2, NO_IRQ } +#define GPIO3_IRQ { IRQ_PBA8_GPIO3, NO_IRQ } +#define AACI_IRQ { IRQ_PBA8_AACI, NO_IRQ } #define MMCI0_IRQ { IRQ_PBA8_MMCI0A, IRQ_PBA8_MMCI0B } -#define KMI0_IRQ { IRQ_PBA8_KMI0 } -#define KMI1_IRQ { IRQ_PBA8_KMI1 } -#define PBA8_SMC_IRQ { } -#define MPMC_IRQ { } -#define PBA8_CLCD_IRQ { IRQ_PBA8_CLCD } -#define DMAC_IRQ { IRQ_PBA8_DMAC } -#define SCTL_IRQ { } -#define PBA8_WATCHDOG_IRQ { IRQ_PBA8_WATCHDOG } -#define PBA8_GPIO0_IRQ { IRQ_PBA8_GPIO0 } -#define GPIO1_IRQ { IRQ_PBA8_GPIO1 } -#define PBA8_RTC_IRQ { IRQ_PBA8_RTC } -#define SCI_IRQ { IRQ_PBA8_SCI } -#define PBA8_UART0_IRQ { IRQ_PBA8_UART0 } -#define PBA8_UART1_IRQ { IRQ_PBA8_UART1 } -#define PBA8_UART2_IRQ { IRQ_PBA8_UART2 } -#define PBA8_UART3_IRQ { IRQ_PBA8_UART3 } -#define PBA8_SSP_IRQ { IRQ_PBA8_SSP } +#define KMI0_IRQ { IRQ_PBA8_KMI0, NO_IRQ } +#define KMI1_IRQ { IRQ_PBA8_KMI1, NO_IRQ } +#define PBA8_SMC_IRQ { NO_IRQ, NO_IRQ } +#define MPMC_IRQ { NO_IRQ, NO_IRQ } +#define PBA8_CLCD_IRQ { IRQ_PBA8_CLCD, NO_IRQ } +#define DMAC_IRQ { IRQ_PBA8_DMAC, NO_IRQ } +#define SCTL_IRQ { NO_IRQ, NO_IRQ } +#define PBA8_WATCHDOG_IRQ { IRQ_PBA8_WATCHDOG, NO_IRQ } +#define PBA8_GPIO0_IRQ { IRQ_PBA8_GPIO0, NO_IRQ } +#define GPIO1_IRQ { IRQ_PBA8_GPIO1, NO_IRQ } +#define PBA8_RTC_IRQ { IRQ_PBA8_RTC, NO_IRQ } +#define SCI_IRQ { IRQ_PBA8_SCI, NO_IRQ } +#define PBA8_UART0_IRQ { IRQ_PBA8_UART0, NO_IRQ } +#define PBA8_UART1_IRQ { IRQ_PBA8_UART1, NO_IRQ } +#define PBA8_UART2_IRQ { IRQ_PBA8_UART2, NO_IRQ } +#define PBA8_UART3_IRQ { IRQ_PBA8_UART3, NO_IRQ } +#define PBA8_SSP_IRQ { IRQ_PBA8_SSP, NO_IRQ } /* FPGA Primecells */ -APB_DEVICE(aaci, "fpga:aaci", AACI, NULL); -APB_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data); -APB_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL); -APB_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL); -APB_DEVICE(uart3, "fpga:uart3", PBA8_UART3, NULL); +AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL); +AMBA_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data); +AMBA_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL); +AMBA_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL); +AMBA_DEVICE(uart3, "fpga:uart3", PBA8_UART3, NULL); /* DevChip Primecells */ -AHB_DEVICE(smc, "dev:smc", PBA8_SMC, NULL); -AHB_DEVICE(sctl, "dev:sctl", SCTL, NULL); -APB_DEVICE(wdog, "dev:wdog", PBA8_WATCHDOG, NULL); -APB_DEVICE(gpio0, "dev:gpio0", PBA8_GPIO0, &gpio0_plat_data); -APB_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data); -APB_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data); -APB_DEVICE(rtc, "dev:rtc", PBA8_RTC, NULL); -APB_DEVICE(sci0, "dev:sci0", SCI, NULL); -APB_DEVICE(uart0, "dev:uart0", PBA8_UART0, NULL); -APB_DEVICE(uart1, "dev:uart1", PBA8_UART1, NULL); -APB_DEVICE(uart2, "dev:uart2", PBA8_UART2, NULL); -APB_DEVICE(ssp0, "dev:ssp0", PBA8_SSP, &ssp0_plat_data); +AMBA_DEVICE(smc, "dev:smc", PBA8_SMC, NULL); +AMBA_DEVICE(sctl, "dev:sctl", SCTL, NULL); +AMBA_DEVICE(wdog, "dev:wdog", PBA8_WATCHDOG, NULL); +AMBA_DEVICE(gpio0, "dev:gpio0", PBA8_GPIO0, &gpio0_plat_data); +AMBA_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data); +AMBA_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data); +AMBA_DEVICE(rtc, "dev:rtc", PBA8_RTC, NULL); +AMBA_DEVICE(sci0, "dev:sci0", SCI, NULL); +AMBA_DEVICE(uart0, "dev:uart0", PBA8_UART0, NULL); +AMBA_DEVICE(uart1, "dev:uart1", PBA8_UART1, NULL); +AMBA_DEVICE(uart2, "dev:uart2", PBA8_UART2, NULL); +AMBA_DEVICE(ssp0, "dev:ssp0", PBA8_SSP, &ssp0_plat_data); /* Primecells on the NEC ISSP chip */ -AHB_DEVICE(clcd, "issp:clcd", PBA8_CLCD, &clcd_plat_data); -AHB_DEVICE(dmac, "issp:dmac", DMAC, NULL); +AMBA_DEVICE(clcd, "issp:clcd", PBA8_CLCD, &clcd_plat_data); +AMBA_DEVICE(dmac, "issp:dmac", DMAC, NULL); static struct amba_device *amba_devs[] __initdata = { &dmac_device, diff --git a/trunk/arch/arm/mach-realview/realview_pbx.c b/trunk/arch/arm/mach-realview/realview_pbx.c index 1cd9956f5875..ac715645b860 100644 --- a/trunk/arch/arm/mach-realview/realview_pbx.c +++ b/trunk/arch/arm/mach-realview/realview_pbx.c @@ -144,52 +144,52 @@ static struct pl022_ssp_controller ssp0_plat_data = { * RealView PBXCore AMBA devices */ -#define GPIO2_IRQ { IRQ_PBX_GPIO2 } -#define GPIO3_IRQ { IRQ_PBX_GPIO3 } -#define AACI_IRQ { IRQ_PBX_AACI } +#define GPIO2_IRQ { IRQ_PBX_GPIO2, NO_IRQ } +#define GPIO3_IRQ { IRQ_PBX_GPIO3, NO_IRQ } +#define AACI_IRQ { IRQ_PBX_AACI, NO_IRQ } #define MMCI0_IRQ { IRQ_PBX_MMCI0A, IRQ_PBX_MMCI0B } -#define KMI0_IRQ { IRQ_PBX_KMI0 } -#define KMI1_IRQ { IRQ_PBX_KMI1 } -#define PBX_SMC_IRQ { } -#define MPMC_IRQ { } -#define PBX_CLCD_IRQ { IRQ_PBX_CLCD } -#define DMAC_IRQ { IRQ_PBX_DMAC } -#define SCTL_IRQ { } -#define PBX_WATCHDOG_IRQ { IRQ_PBX_WATCHDOG } -#define PBX_GPIO0_IRQ { IRQ_PBX_GPIO0 } -#define GPIO1_IRQ { IRQ_PBX_GPIO1 } -#define PBX_RTC_IRQ { IRQ_PBX_RTC } -#define SCI_IRQ { IRQ_PBX_SCI } -#define PBX_UART0_IRQ { IRQ_PBX_UART0 } -#define PBX_UART1_IRQ { IRQ_PBX_UART1 } -#define PBX_UART2_IRQ { IRQ_PBX_UART2 } -#define PBX_UART3_IRQ { IRQ_PBX_UART3 } -#define PBX_SSP_IRQ { IRQ_PBX_SSP } +#define KMI0_IRQ { IRQ_PBX_KMI0, NO_IRQ } +#define KMI1_IRQ { IRQ_PBX_KMI1, NO_IRQ } +#define PBX_SMC_IRQ { NO_IRQ, NO_IRQ } +#define MPMC_IRQ { NO_IRQ, NO_IRQ } +#define PBX_CLCD_IRQ { IRQ_PBX_CLCD, NO_IRQ } +#define DMAC_IRQ { IRQ_PBX_DMAC, NO_IRQ } +#define SCTL_IRQ { NO_IRQ, NO_IRQ } +#define PBX_WATCHDOG_IRQ { IRQ_PBX_WATCHDOG, NO_IRQ } +#define PBX_GPIO0_IRQ { IRQ_PBX_GPIO0, NO_IRQ } +#define GPIO1_IRQ { IRQ_PBX_GPIO1, NO_IRQ } +#define PBX_RTC_IRQ { IRQ_PBX_RTC, NO_IRQ } +#define SCI_IRQ { IRQ_PBX_SCI, NO_IRQ } +#define PBX_UART0_IRQ { IRQ_PBX_UART0, NO_IRQ } +#define PBX_UART1_IRQ { IRQ_PBX_UART1, NO_IRQ } +#define PBX_UART2_IRQ { IRQ_PBX_UART2, NO_IRQ } +#define PBX_UART3_IRQ { IRQ_PBX_UART3, NO_IRQ } +#define PBX_SSP_IRQ { IRQ_PBX_SSP, NO_IRQ } /* FPGA Primecells */ -APB_DEVICE(aaci, "fpga:aaci", AACI, NULL); -APB_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data); -APB_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL); -APB_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL); -APB_DEVICE(uart3, "fpga:uart3", PBX_UART3, NULL); +AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL); +AMBA_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data); +AMBA_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL); +AMBA_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL); +AMBA_DEVICE(uart3, "fpga:uart3", PBX_UART3, NULL); /* DevChip Primecells */ -AHB_DEVICE(smc, "dev:smc", PBX_SMC, NULL); -AHB_DEVICE(sctl, "dev:sctl", SCTL, NULL); -APB_DEVICE(wdog, "dev:wdog", PBX_WATCHDOG, NULL); -APB_DEVICE(gpio0, "dev:gpio0", PBX_GPIO0, &gpio0_plat_data); -APB_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data); -APB_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data); -APB_DEVICE(rtc, "dev:rtc", PBX_RTC, NULL); -APB_DEVICE(sci0, "dev:sci0", SCI, NULL); -APB_DEVICE(uart0, "dev:uart0", PBX_UART0, NULL); -APB_DEVICE(uart1, "dev:uart1", PBX_UART1, NULL); -APB_DEVICE(uart2, "dev:uart2", PBX_UART2, NULL); -APB_DEVICE(ssp0, "dev:ssp0", PBX_SSP, &ssp0_plat_data); +AMBA_DEVICE(smc, "dev:smc", PBX_SMC, NULL); +AMBA_DEVICE(sctl, "dev:sctl", SCTL, NULL); +AMBA_DEVICE(wdog, "dev:wdog", PBX_WATCHDOG, NULL); +AMBA_DEVICE(gpio0, "dev:gpio0", PBX_GPIO0, &gpio0_plat_data); +AMBA_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data); +AMBA_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data); +AMBA_DEVICE(rtc, "dev:rtc", PBX_RTC, NULL); +AMBA_DEVICE(sci0, "dev:sci0", SCI, NULL); +AMBA_DEVICE(uart0, "dev:uart0", PBX_UART0, NULL); +AMBA_DEVICE(uart1, "dev:uart1", PBX_UART1, NULL); +AMBA_DEVICE(uart2, "dev:uart2", PBX_UART2, NULL); +AMBA_DEVICE(ssp0, "dev:ssp0", PBX_SSP, &ssp0_plat_data); /* Primecells on the NEC ISSP chip */ -AHB_DEVICE(clcd, "issp:clcd", PBX_CLCD, &clcd_plat_data); -AHB_DEVICE(dmac, "issp:dmac", DMAC, NULL); +AMBA_DEVICE(clcd, "issp:clcd", PBX_CLCD, &clcd_plat_data); +AMBA_DEVICE(dmac, "issp:dmac", DMAC, NULL); static struct amba_device *amba_devs[] __initdata = { &dmac_device, diff --git a/trunk/arch/arm/mach-rpc/Makefile b/trunk/arch/arm/mach-rpc/Makefile index dfa405c0cfde..aa77bc9efbbb 100644 --- a/trunk/arch/arm/mach-rpc/Makefile +++ b/trunk/arch/arm/mach-rpc/Makefile @@ -4,7 +4,7 @@ # Object file lists. -obj-y := dma.o fiq.o irq.o riscpc.o +obj-y := dma.o irq.o riscpc.o obj-m := obj-n := obj- := diff --git a/trunk/arch/arm/mach-rpc/fiq.S b/trunk/arch/arm/mach-rpc/fiq.S deleted file mode 100644 index 48ddd57db16e..000000000000 --- a/trunk/arch/arm/mach-rpc/fiq.S +++ /dev/null @@ -1,16 +0,0 @@ -#include -#include -#include -#include - - .text - - .global rpc_default_fiq_end -ENTRY(rpc_default_fiq_start) - mov r12, #ioc_base_high - .if ioc_base_low - orr r12, r12, #ioc_base_low - .endif - strb r12, [r12, #0x38] @ Disable FIQ register - subs pc, lr, #4 -rpc_default_fiq_end: diff --git a/trunk/arch/arm/mach-rpc/include/mach/entry-macro.S b/trunk/arch/arm/mach-rpc/include/mach/entry-macro.S index 7178368d7062..4e7e54144093 100644 --- a/trunk/arch/arm/mach-rpc/include/mach/entry-macro.S +++ b/trunk/arch/arm/mach-rpc/include/mach/entry-macro.S @@ -10,3 +10,7 @@ orr \base, \base, #ioc_base_low .endif .endm + + .macro arch_ret_to_user, tmp1, tmp2 + .endm + diff --git a/trunk/arch/arm/mach-rpc/include/mach/system.h b/trunk/arch/arm/mach-rpc/include/mach/system.h new file mode 100644 index 000000000000..359bab94b6af --- /dev/null +++ b/trunk/arch/arm/mach-rpc/include/mach/system.h @@ -0,0 +1,13 @@ +/* + * arch/arm/mach-rpc/include/mach/system.h + * + * Copyright (C) 1996-1999 Russell King. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +static inline void arch_idle(void) +{ + cpu_do_idle(); +} diff --git a/trunk/arch/arm/mach-rpc/irq.c b/trunk/arch/arm/mach-rpc/irq.c index cf0e669eaf1a..2e1b5309fbab 100644 --- a/trunk/arch/arm/mach-rpc/irq.c +++ b/trunk/arch/arm/mach-rpc/irq.c @@ -5,7 +5,6 @@ #include #include #include -#include static void iomd_ack_irq_a(struct irq_data *d) { @@ -113,8 +112,6 @@ static struct irq_chip iomd_fiq_chip = { .irq_unmask = iomd_unmask_irq_fiq, }; -extern unsigned char rpc_default_fiq_start, rpc_default_fiq_end; - void __init rpc_init_irq(void) { unsigned int irq, flags; @@ -124,9 +121,6 @@ void __init rpc_init_irq(void) iomd_writeb(0, IOMD_FIQMASK); iomd_writeb(0, IOMD_DMAMASK); - set_fiq_handler(&rpc_default_fiq_start, - &rpc_default_fiq_end - &rpc_default_fiq_start); - for (irq = 0; irq < NR_IRQS; irq++) { flags = IRQF_VALID; diff --git a/trunk/arch/arm/mach-s3c2410/include/mach/entry-macro.S b/trunk/arch/arm/mach-s3c2410/include/mach/entry-macro.S index 7615a14773fa..473b3cd37d9b 100644 --- a/trunk/arch/arm/mach-s3c2410/include/mach/entry-macro.S +++ b/trunk/arch/arm/mach-s3c2410/include/mach/entry-macro.S @@ -25,6 +25,9 @@ .macro get_irqnr_preamble, base, tmp .endm + .macro arch_ret_to_user, tmp1, tmp2 + .endm + .macro get_irqnr_and_base, irqnr, irqstat, base, tmp mov \base, #S3C24XX_VA_IRQ @@ -68,3 +71,8 @@ @@ exit here, Z flag unset if IRQ .endm + + /* currently don't need an disable_fiq macro */ + + .macro disable_fiq + .endm diff --git a/trunk/arch/arm/mach-s3c2410/include/mach/system.h b/trunk/arch/arm/mach-s3c2410/include/mach/system.h new file mode 100644 index 000000000000..5e215c1a5c8f --- /dev/null +++ b/trunk/arch/arm/mach-s3c2410/include/mach/system.h @@ -0,0 +1,54 @@ +/* arch/arm/mach-s3c2410/include/mach/system.h + * + * Copyright (c) 2003 Simtec Electronics + * Ben Dooks + * + * S3C2410 - System function defines and includes + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#include +#include + +#include +#include + +#include + +void (*s3c24xx_idle)(void); + +void s3c24xx_default_idle(void) +{ + unsigned long tmp; + int i; + + /* idle the system by using the idle mode which will wait for an + * interrupt to happen before restarting the system. + */ + + /* Warning: going into idle state upsets jtag scanning */ + + __raw_writel(__raw_readl(S3C2410_CLKCON) | S3C2410_CLKCON_IDLE, + S3C2410_CLKCON); + + /* the samsung port seems to do a loop and then unset idle.. */ + for (i = 0; i < 50; i++) { + tmp += __raw_readl(S3C2410_CLKCON); /* ensure loop not optimised out */ + } + + /* this bit is not cleared on re-start... */ + + __raw_writel(__raw_readl(S3C2410_CLKCON) & ~S3C2410_CLKCON_IDLE, + S3C2410_CLKCON); +} + +static void arch_idle(void) +{ + if (s3c24xx_idle != NULL) + (s3c24xx_idle)(); + else + s3c24xx_default_idle(); +} diff --git a/trunk/arch/arm/mach-s3c2412/s3c2412.c b/trunk/arch/arm/mach-s3c2412/s3c2412.c index c6eac9871093..aff6e85a97c6 100644 --- a/trunk/arch/arm/mach-s3c2412/s3c2412.c +++ b/trunk/arch/arm/mach-s3c2412/s3c2412.c @@ -32,6 +32,8 @@ #include #include +#include + #include #include @@ -162,7 +164,7 @@ void __init s3c2412_map_io(void) /* set our idle function */ - arm_pm_idle = s3c2412_idle; + s3c24xx_idle = s3c2412_idle; /* register our io-tables */ diff --git a/trunk/arch/arm/mach-s3c2416/s3c2416.c b/trunk/arch/arm/mach-s3c2416/s3c2416.c index 08bb0355159d..5287d2808d3e 100644 --- a/trunk/arch/arm/mach-s3c2416/s3c2416.c +++ b/trunk/arch/arm/mach-s3c2416/s3c2416.c @@ -44,6 +44,7 @@ #include #include +#include #include #include @@ -87,6 +88,8 @@ int __init s3c2416_init(void) { printk(KERN_INFO "S3C2416: Initializing architecture\n"); + /* s3c24xx_idle = s3c2416_idle; */ + /* change WDT IRQ number */ s3c_device_wdt.resource[1].start = IRQ_S3C2443_WDT; s3c_device_wdt.resource[1].end = IRQ_S3C2443_WDT; diff --git a/trunk/arch/arm/mach-s3c64xx/include/mach/entry-macro.S b/trunk/arch/arm/mach-s3c64xx/include/mach/entry-macro.S new file mode 100644 index 000000000000..dc2bc15142ce --- /dev/null +++ b/trunk/arch/arm/mach-s3c64xx/include/mach/entry-macro.S @@ -0,0 +1,19 @@ +/* arch/arm/mach-s3c6400/include/mach/entry-macro.S + * + * Copyright 2008 Openmoko, Inc. + * Copyright 2008 Simtec Electronics + * http://armlinux.simtec.co.uk/ + * Ben Dooks + * + * Low-level IRQ helper macros for the Samsung S3C64XX series + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. +*/ + + .macro disable_fiq + .endm + + .macro arch_ret_to_user, tmp1, tmp2 + .endm diff --git a/trunk/arch/arm/mach-s3c64xx/include/mach/system.h b/trunk/arch/arm/mach-s3c64xx/include/mach/system.h new file mode 100644 index 000000000000..353ed4389ae7 --- /dev/null +++ b/trunk/arch/arm/mach-s3c64xx/include/mach/system.h @@ -0,0 +1,19 @@ +/* linux/arch/arm/mach-s3c6400/include/mach/system.h + * + * Copyright 2008 Openmoko, Inc. + * Copyright 2008 Simtec Electronics + * Ben Dooks + * http://armlinux.simtec.co.uk/ + * + * S3C6400 - system implementation + */ + +#ifndef __ASM_ARCH_SYSTEM_H +#define __ASM_ARCH_SYSTEM_H __FILE__ + +static void arch_idle(void) +{ + /* nothing here yet */ +} + +#endif /* __ASM_ARCH_IRQ_H */ diff --git a/trunk/arch/arm/mach-s5p64x0/common.c b/trunk/arch/arm/mach-s5p64x0/common.c index 9143f8b19962..52b89a376447 100644 --- a/trunk/arch/arm/mach-s5p64x0/common.c +++ b/trunk/arch/arm/mach-s5p64x0/common.c @@ -146,12 +146,15 @@ static void s5p64x0_idle(void) { unsigned long val; - val = __raw_readl(S5P64X0_PWR_CFG); - val &= ~(0x3 << 5); - val |= (0x1 << 5); - __raw_writel(val, S5P64X0_PWR_CFG); + if (!need_resched()) { + val = __raw_readl(S5P64X0_PWR_CFG); + val &= ~(0x3 << 5); + val |= (0x1 << 5); + __raw_writel(val, S5P64X0_PWR_CFG); - cpu_do_idle(); + cpu_do_idle(); + } + local_irq_enable(); } /* @@ -283,7 +286,7 @@ int __init s5p64x0_init(void) printk(KERN_INFO "S5P64X0(S5P6440/S5P6450): Initializing architecture\n"); /* set idle function */ - arm_pm_idle = s5p64x0_idle; + pm_idle = s5p64x0_idle; return device_register(&s5p64x0_dev); } diff --git a/trunk/arch/arm/mach-s5p64x0/dma.c b/trunk/arch/arm/mach-s5p64x0/dma.c index f7f68ad77910..f820c0744405 100644 --- a/trunk/arch/arm/mach-s5p64x0/dma.c +++ b/trunk/arch/arm/mach-s5p64x0/dma.c @@ -108,22 +108,34 @@ struct dma_pl330_platdata s5p6450_pdma_pdata = { .peri_id = s5p6450_pdma_peri, }; -AMBA_AHB_DEVICE(s5p64x0_pdma, "dma-pl330", 0x00041330, S5P64X0_PA_PDMA, - {IRQ_DMA0}, NULL); +struct amba_device s5p64x0_device_pdma = { + .dev = { + .init_name = "dma-pl330", + .dma_mask = &dma_dmamask, + .coherent_dma_mask = DMA_BIT_MASK(32), + }, + .res = { + .start = S5P64X0_PA_PDMA, + .end = S5P64X0_PA_PDMA + SZ_4K, + .flags = IORESOURCE_MEM, + }, + .irq = {IRQ_DMA0, NO_IRQ}, + .periphid = 0x00041330, +}; static int __init s5p64x0_dma_init(void) { if (soc_is_s5p6450()) { dma_cap_set(DMA_SLAVE, s5p6450_pdma_pdata.cap_mask); dma_cap_set(DMA_CYCLIC, s5p6450_pdma_pdata.cap_mask); - s5p64x0_pdma_device.dev.platform_data = &s5p6450_pdma_pdata; + s5p64x0_device_pdma.dev.platform_data = &s5p6450_pdma_pdata; } else { dma_cap_set(DMA_SLAVE, s5p6440_pdma_pdata.cap_mask); dma_cap_set(DMA_CYCLIC, s5p6440_pdma_pdata.cap_mask); - s5p64x0_pdma_device.dev.platform_data = &s5p6440_pdma_pdata; + s5p64x0_device_pdma.dev.platform_data = &s5p6440_pdma_pdata; } - amba_device_register(&s5p64x0_pdma_device, &iomem_resource); + amba_device_register(&s5p64x0_device_pdma, &iomem_resource); return 0; } diff --git a/trunk/arch/arm/mach-s5p64x0/include/mach/entry-macro.S b/trunk/arch/arm/mach-s5p64x0/include/mach/entry-macro.S new file mode 100644 index 000000000000..fbb246d0a3df --- /dev/null +++ b/trunk/arch/arm/mach-s5p64x0/include/mach/entry-macro.S @@ -0,0 +1,17 @@ +/* linux/arch/arm/mach-s5p64x0/include/mach/entry-macro.S + * + * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * + * Low-level IRQ helper macros for the Samsung S5P64X0 + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + + .macro disable_fiq + .endm + + .macro arch_ret_to_user, tmp1, tmp2 + .endm diff --git a/trunk/arch/arm/mach-s5p64x0/include/mach/system.h b/trunk/arch/arm/mach-s5p64x0/include/mach/system.h new file mode 100644 index 000000000000..cf26e0954a2f --- /dev/null +++ b/trunk/arch/arm/mach-s5p64x0/include/mach/system.h @@ -0,0 +1,21 @@ +/* linux/arch/arm/mach-s5p64x0/include/mach/system.h + * + * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * + * S5P64X0 - system support header + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __ASM_ARCH_SYSTEM_H +#define __ASM_ARCH_SYSTEM_H __FILE__ + +static void arch_idle(void) +{ + /* nothing here yet */ +} + +#endif /* __ASM_ARCH_SYSTEM_H */ diff --git a/trunk/arch/arm/mach-s5pc100/common.c b/trunk/arch/arm/mach-s5pc100/common.c index ff71e2d467c6..c9095730a7f5 100644 --- a/trunk/arch/arm/mach-s5pc100/common.c +++ b/trunk/arch/arm/mach-s5pc100/common.c @@ -129,6 +129,14 @@ static struct map_desc s5pc100_iodesc[] __initdata = { } }; +static void s5pc100_idle(void) +{ + if (!need_resched()) + cpu_do_idle(); + + local_irq_enable(); +} + /* * s5pc100_map_io * @@ -202,6 +210,10 @@ core_initcall(s5pc100_core_init); int __init s5pc100_init(void) { printk(KERN_INFO "S5PC100: Initializing architecture\n"); + + /* set idle function */ + pm_idle = s5pc100_idle; + return device_register(&s5pc100_dev); } diff --git a/trunk/arch/arm/mach-s5pc100/dma.c b/trunk/arch/arm/mach-s5pc100/dma.c index 96b1ab3dcd48..c841f4d313f2 100644 --- a/trunk/arch/arm/mach-s5pc100/dma.c +++ b/trunk/arch/arm/mach-s5pc100/dma.c @@ -73,8 +73,21 @@ struct dma_pl330_platdata s5pc100_pdma0_pdata = { .peri_id = pdma0_peri, }; -AMBA_AHB_DEVICE(s5pc100_pdma0, "dma-pl330.0", 0x00041330, S5PC100_PA_PDMA0, - {IRQ_PDMA0}, &s5pc100_pdma0_pdata); +struct amba_device s5pc100_device_pdma0 = { + .dev = { + .init_name = "dma-pl330.0", + .dma_mask = &dma_dmamask, + .coherent_dma_mask = DMA_BIT_MASK(32), + .platform_data = &s5pc100_pdma0_pdata, + }, + .res = { + .start = S5PC100_PA_PDMA0, + .end = S5PC100_PA_PDMA0 + SZ_4K, + .flags = IORESOURCE_MEM, + }, + .irq = {IRQ_PDMA0, NO_IRQ}, + .periphid = 0x00041330, +}; u8 pdma1_peri[] = { DMACH_UART0_RX, @@ -114,18 +127,31 @@ struct dma_pl330_platdata s5pc100_pdma1_pdata = { .peri_id = pdma1_peri, }; -AMBA_AHB_DEVICE(s5pc100_pdma1, "dma-pl330.1", 0x00041330, S5PC100_PA_PDMA1, - {IRQ_PDMA1}, &s5pc100_pdma1_pdata); +struct amba_device s5pc100_device_pdma1 = { + .dev = { + .init_name = "dma-pl330.1", + .dma_mask = &dma_dmamask, + .coherent_dma_mask = DMA_BIT_MASK(32), + .platform_data = &s5pc100_pdma1_pdata, + }, + .res = { + .start = S5PC100_PA_PDMA1, + .end = S5PC100_PA_PDMA1 + SZ_4K, + .flags = IORESOURCE_MEM, + }, + .irq = {IRQ_PDMA1, NO_IRQ}, + .periphid = 0x00041330, +}; static int __init s5pc100_dma_init(void) { dma_cap_set(DMA_SLAVE, s5pc100_pdma0_pdata.cap_mask); dma_cap_set(DMA_CYCLIC, s5pc100_pdma0_pdata.cap_mask); - amba_device_register(&s5pc100_pdma0_device, &iomem_resource); + amba_device_register(&s5pc100_device_pdma0, &iomem_resource); dma_cap_set(DMA_SLAVE, s5pc100_pdma1_pdata.cap_mask); dma_cap_set(DMA_CYCLIC, s5pc100_pdma1_pdata.cap_mask); - amba_device_register(&s5pc100_pdma1_device, &iomem_resource); + amba_device_register(&s5pc100_device_pdma1, &iomem_resource); return 0; } diff --git a/trunk/arch/arm/mach-s5pc100/include/mach/entry-macro.S b/trunk/arch/arm/mach-s5pc100/include/mach/entry-macro.S index bad0700457db..b8c242edfa22 100644 --- a/trunk/arch/arm/mach-s5pc100/include/mach/entry-macro.S +++ b/trunk/arch/arm/mach-s5pc100/include/mach/entry-macro.S @@ -12,8 +12,14 @@ * warranty of any kind, whether express or implied. */ + .macro disable_fiq + .endm + .macro get_irqnr_preamble, base, tmp .endm + .macro arch_ret_to_user, tmp1, tmp2 + .endm + .macro get_irqnr_and_base, irqnr, irqstat, base, tmp .endm diff --git a/trunk/arch/arm/mach-s5pc100/include/mach/system.h b/trunk/arch/arm/mach-s5pc100/include/mach/system.h new file mode 100644 index 000000000000..afc96c298518 --- /dev/null +++ b/trunk/arch/arm/mach-s5pc100/include/mach/system.h @@ -0,0 +1,19 @@ +/* linux/arch/arm/mach-s5pc100/include/mach/system.h + * + * Copyright 2009 Samsung Electronics Co. + * Byungho Min + * + * S5PC100 - system implementation + * + * Based on mach-s3c6400/include/mach/system.h + */ + +#ifndef __ASM_ARCH_SYSTEM_H +#define __ASM_ARCH_SYSTEM_H __FILE__ + +static void arch_idle(void) +{ + /* nothing here yet */ +} + +#endif /* __ASM_ARCH_IRQ_H */ diff --git a/trunk/arch/arm/mach-s5pv210/common.c b/trunk/arch/arm/mach-s5pv210/common.c index 4c9e9027df9a..9c1bcdcc12c3 100644 --- a/trunk/arch/arm/mach-s5pv210/common.c +++ b/trunk/arch/arm/mach-s5pv210/common.c @@ -142,6 +142,14 @@ static struct map_desc s5pv210_iodesc[] __initdata = { } }; +static void s5pv210_idle(void) +{ + if (!need_resched()) + cpu_do_idle(); + + local_irq_enable(); +} + void s5pv210_restart(char mode, const char *cmd) { __raw_writel(0x1, S5P_SWRESET); @@ -239,6 +247,10 @@ core_initcall(s5pv210_core_init); int __init s5pv210_init(void) { printk(KERN_INFO "S5PV210: Initializing architecture\n"); + + /* set idle function */ + pm_idle = s5pv210_idle; + return device_register(&s5pv210_dev); } diff --git a/trunk/arch/arm/mach-s5pv210/dma.c b/trunk/arch/arm/mach-s5pv210/dma.c index f6885d247d14..a6113e0267f2 100644 --- a/trunk/arch/arm/mach-s5pv210/dma.c +++ b/trunk/arch/arm/mach-s5pv210/dma.c @@ -71,8 +71,21 @@ struct dma_pl330_platdata s5pv210_pdma0_pdata = { .peri_id = pdma0_peri, }; -AMBA_AHB_DEVICE(s5pv210_pdma0, "dma-pl330.0", 0x00041330, S5PV210_PA_PDMA0, - {IRQ_PDMA0}, &s5pv210_pdma0_pdata); +struct amba_device s5pv210_device_pdma0 = { + .dev = { + .init_name = "dma-pl330.0", + .dma_mask = &dma_dmamask, + .coherent_dma_mask = DMA_BIT_MASK(32), + .platform_data = &s5pv210_pdma0_pdata, + }, + .res = { + .start = S5PV210_PA_PDMA0, + .end = S5PV210_PA_PDMA0 + SZ_4K, + .flags = IORESOURCE_MEM, + }, + .irq = {IRQ_PDMA0, NO_IRQ}, + .periphid = 0x00041330, +}; u8 pdma1_peri[] = { DMACH_UART0_RX, @@ -114,18 +127,31 @@ struct dma_pl330_platdata s5pv210_pdma1_pdata = { .peri_id = pdma1_peri, }; -AMBA_AHB_DEVICE(s5pv210_pdma1, "dma-pl330.1", 0x00041330, S5PV210_PA_PDMA1, - {IRQ_PDMA1}, &s5pv210_pdma1_pdata); +struct amba_device s5pv210_device_pdma1 = { + .dev = { + .init_name = "dma-pl330.1", + .dma_mask = &dma_dmamask, + .coherent_dma_mask = DMA_BIT_MASK(32), + .platform_data = &s5pv210_pdma1_pdata, + }, + .res = { + .start = S5PV210_PA_PDMA1, + .end = S5PV210_PA_PDMA1 + SZ_4K, + .flags = IORESOURCE_MEM, + }, + .irq = {IRQ_PDMA1, NO_IRQ}, + .periphid = 0x00041330, +}; static int __init s5pv210_dma_init(void) { dma_cap_set(DMA_SLAVE, s5pv210_pdma0_pdata.cap_mask); dma_cap_set(DMA_CYCLIC, s5pv210_pdma0_pdata.cap_mask); - amba_device_register(&s5pv210_pdma0_device, &iomem_resource); + amba_device_register(&s5pv210_device_pdma0, &iomem_resource); dma_cap_set(DMA_SLAVE, s5pv210_pdma1_pdata.cap_mask); dma_cap_set(DMA_CYCLIC, s5pv210_pdma1_pdata.cap_mask); - amba_device_register(&s5pv210_pdma1_device, &iomem_resource); + amba_device_register(&s5pv210_device_pdma1, &iomem_resource); return 0; } diff --git a/trunk/arch/arm/mach-s5pv210/include/mach/entry-macro.S b/trunk/arch/arm/mach-s5pv210/include/mach/entry-macro.S new file mode 100644 index 000000000000..bebca1b5d0b1 --- /dev/null +++ b/trunk/arch/arm/mach-s5pv210/include/mach/entry-macro.S @@ -0,0 +1,17 @@ +/* linux/arch/arm/mach-s5pv210/include/mach/entry-macro.S + * + * Copyright (c) 2010 Samsung Electronics Co., Ltd. + * http://www.samsung.com/ + * + * Low-level IRQ helper macros for the Samsung S5PV210 + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + + .macro disable_fiq + .endm + + .macro arch_ret_to_user, tmp1, tmp2 + .endm diff --git a/trunk/arch/arm/mach-s5pv210/include/mach/system.h b/trunk/arch/arm/mach-s5pv210/include/mach/system.h new file mode 100644 index 000000000000..bf288ced860a --- /dev/null +++ b/trunk/arch/arm/mach-s5pv210/include/mach/system.h @@ -0,0 +1,21 @@ +/* linux/arch/arm/mach-s5pv210/include/mach/system.h + * + * Copyright (c) 2010 Samsung Electronics Co., Ltd. + * http://www.samsung.com/ + * + * S5PV210 - system support header + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __ASM_ARCH_SYSTEM_H +#define __ASM_ARCH_SYSTEM_H __FILE__ + +static void arch_idle(void) +{ + /* nothing here yet */ +} + +#endif /* __ASM_ARCH_SYSTEM_H */ diff --git a/trunk/arch/arm/mach-sa1100/include/mach/entry-macro.S b/trunk/arch/arm/mach-sa1100/include/mach/entry-macro.S index 8cf7630bf024..6aa13c46c5d3 100644 --- a/trunk/arch/arm/mach-sa1100/include/mach/entry-macro.S +++ b/trunk/arch/arm/mach-sa1100/include/mach/entry-macro.S @@ -8,11 +8,17 @@ * warranty of any kind, whether express or implied. */ + .macro disable_fiq + .endm + .macro get_irqnr_preamble, base, tmp mov \base, #0xfa000000 @ ICIP = 0xfa050000 add \base, \base, #0x00050000 .endm + .macro arch_ret_to_user, tmp1, tmp2 + .endm + .macro get_irqnr_and_base, irqnr, irqstat, base, tmp ldr \irqstat, [\base] @ get irqs ldr \irqnr, [\base, #4] @ ICMR = 0xfa050004 diff --git a/trunk/arch/arm/mach-sa1100/include/mach/system.h b/trunk/arch/arm/mach-sa1100/include/mach/system.h new file mode 100644 index 000000000000..e17b208f76d4 --- /dev/null +++ b/trunk/arch/arm/mach-sa1100/include/mach/system.h @@ -0,0 +1,9 @@ +/* + * arch/arm/mach-sa1100/include/mach/system.h + * + * Copyright (c) 1999 Nicolas Pitre + */ +static inline void arch_idle(void) +{ + cpu_do_idle(); +} diff --git a/trunk/arch/arm/mach-shark/core.c b/trunk/arch/arm/mach-shark/core.c index 6a2a7f2c2557..a851c254ad6c 100644 --- a/trunk/arch/arm/mach-shark/core.c +++ b/trunk/arch/arm/mach-shark/core.c @@ -149,16 +149,10 @@ static struct sys_timer shark_timer = { .init = shark_timer_init, }; -static void shark_init_early(void) -{ - disable_hlt(); -} - MACHINE_START(SHARK, "Shark") /* Maintainer: Alexander Schulz */ .atag_offset = 0x3000, .map_io = shark_map_io, - .init_early = shark_init_early, .init_irq = shark_init_irq, .timer = &shark_timer, .dma_zone_size = SZ_4M, diff --git a/trunk/arch/arm/mach-shark/include/mach/entry-macro.S b/trunk/arch/arm/mach-shark/include/mach/entry-macro.S index 5901b09fc96a..0bb6cc626eb7 100644 --- a/trunk/arch/arm/mach-shark/include/mach/entry-macro.S +++ b/trunk/arch/arm/mach-shark/include/mach/entry-macro.S @@ -7,10 +7,16 @@ * License version 2. This program is licensed "as is" without any * warranty of any kind, whether express or implied. */ + .macro disable_fiq + .endm + .macro get_irqnr_preamble, base, tmp mov \base, #0xe0000000 .endm + .macro arch_ret_to_user, tmp1, tmp2 + .endm + .macro get_irqnr_and_base, irqnr, irqstat, base, tmp mov \irqstat, #0x0C diff --git a/trunk/arch/arm/mach-shark/include/mach/system.h b/trunk/arch/arm/mach-shark/include/mach/system.h new file mode 100644 index 000000000000..1b2f2c5050a8 --- /dev/null +++ b/trunk/arch/arm/mach-shark/include/mach/system.h @@ -0,0 +1,13 @@ +/* + * arch/arm/mach-shark/include/mach/system.h + * + * by Alexander Schulz + */ +#ifndef __ASM_ARCH_SYSTEM_H +#define __ASM_ARCH_SYSTEM_H + +static inline void arch_idle(void) +{ +} + +#endif diff --git a/trunk/arch/arm/mach-shmobile/include/mach/entry-macro.S b/trunk/arch/arm/mach-shmobile/include/mach/entry-macro.S new file mode 100644 index 000000000000..2a57b2964ee9 --- /dev/null +++ b/trunk/arch/arm/mach-shmobile/include/mach/entry-macro.S @@ -0,0 +1,22 @@ +/* + * Copyright (C) 2010 Paul Mundt + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + + .macro disable_fiq + .endm + + .macro arch_ret_to_user, tmp1, tmp2 + .endm diff --git a/trunk/arch/arm/mach-shmobile/include/mach/system.h b/trunk/arch/arm/mach-shmobile/include/mach/system.h index 3bbcb3fa0775..956ac18ddbf9 100644 --- a/trunk/arch/arm/mach-shmobile/include/mach/system.h +++ b/trunk/arch/arm/mach-shmobile/include/mach/system.h @@ -1,6 +1,11 @@ #ifndef __ASM_ARCH_SYSTEM_H #define __ASM_ARCH_SYSTEM_H +static inline void arch_idle(void) +{ + cpu_do_idle(); +} + static inline void arch_reset(char mode, const char *cmd) { soft_restart(0); diff --git a/trunk/arch/arm/mach-spear3xx/include/mach/entry-macro.S b/trunk/arch/arm/mach-spear3xx/include/mach/entry-macro.S new file mode 100644 index 000000000000..de3bb41c8e9e --- /dev/null +++ b/trunk/arch/arm/mach-spear3xx/include/mach/entry-macro.S @@ -0,0 +1,18 @@ +/* + * arch/arm/mach-spear3xx/include/mach/entry-macro.S + * + * Low-level IRQ helper macros for SPEAr3xx machine family + * + * Copyright (C) 2009 ST Microelectronics + * Viresh Kumar + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + + .macro disable_fiq + .endm + + .macro arch_ret_to_user, tmp1, tmp2 + .endm diff --git a/trunk/arch/arm/mach-spear3xx/include/mach/system.h b/trunk/arch/arm/mach-spear3xx/include/mach/system.h new file mode 100644 index 000000000000..92cee6335c90 --- /dev/null +++ b/trunk/arch/arm/mach-spear3xx/include/mach/system.h @@ -0,0 +1,19 @@ +/* + * arch/arm/mach-spear3xx/include/mach/system.h + * + * SPEAr3xx Machine family specific architecture functions + * + * Copyright (C) 2009 ST Microelectronics + * Viresh Kumar + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#ifndef __MACH_SYSTEM_H +#define __MACH_SYSTEM_H + +#include + +#endif /* __MACH_SYSTEM_H */ diff --git a/trunk/arch/arm/mach-spear3xx/spear300.c b/trunk/arch/arm/mach-spear3xx/spear300.c index 9da50e281e98..a5e46b4ade20 100644 --- a/trunk/arch/arm/mach-spear3xx/spear300.c +++ b/trunk/arch/arm/mach-spear3xx/spear300.c @@ -430,8 +430,18 @@ static struct pl061_platform_data gpio1_plat_data = { .irq_base = SPEAR300_GPIO1_INT_BASE, }; -AMBA_APB_DEVICE(spear300_gpio1, "gpio1", 0, SPEAR300_GPIO_BASE, - {SPEAR300_VIRQ_GPIO1}, &gpio1_plat_data); +struct amba_device spear300_gpio1_device = { + .dev = { + .init_name = "gpio1", + .platform_data = &gpio1_plat_data, + }, + .res = { + .start = SPEAR300_GPIO_BASE, + .end = SPEAR300_GPIO_BASE + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + .irq = {SPEAR300_VIRQ_GPIO1, NO_IRQ}, +}; /* spear300 routines */ void __init spear300_init(struct pmx_mode *pmx_mode, struct pmx_dev **pmx_devs, diff --git a/trunk/arch/arm/mach-spear3xx/spear3xx.c b/trunk/arch/arm/mach-spear3xx/spear3xx.c index b1733c37f209..10af45da86a0 100644 --- a/trunk/arch/arm/mach-spear3xx/spear3xx.c +++ b/trunk/arch/arm/mach-spear3xx/spear3xx.c @@ -28,12 +28,31 @@ static struct pl061_platform_data gpio_plat_data = { .irq_base = SPEAR3XX_GPIO_INT_BASE, }; -AMBA_APB_DEVICE(spear3xx_gpio, "gpio", 0, SPEAR3XX_ICM3_GPIO_BASE, - {SPEAR3XX_IRQ_BASIC_GPIO}, &gpio_plat_data); +struct amba_device spear3xx_gpio_device = { + .dev = { + .init_name = "gpio", + .platform_data = &gpio_plat_data, + }, + .res = { + .start = SPEAR3XX_ICM3_GPIO_BASE, + .end = SPEAR3XX_ICM3_GPIO_BASE + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + .irq = {SPEAR3XX_IRQ_BASIC_GPIO, NO_IRQ}, +}; /* uart device registration */ -AMBA_APB_DEVICE(spear3xx_uart, "uart", 0, SPEAR3XX_ICM1_UART_BASE, - {SPEAR3XX_IRQ_UART}, NULL); +struct amba_device spear3xx_uart_device = { + .dev = { + .init_name = "uart", + }, + .res = { + .start = SPEAR3XX_ICM1_UART_BASE, + .end = SPEAR3XX_ICM1_UART_BASE + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + .irq = {SPEAR3XX_IRQ_UART, NO_IRQ}, +}; /* Do spear3xx familiy common initialization part here */ void __init spear3xx_init(void) diff --git a/trunk/arch/arm/mach-spear6xx/include/mach/entry-macro.S b/trunk/arch/arm/mach-spear6xx/include/mach/entry-macro.S new file mode 100644 index 000000000000..d490a910d925 --- /dev/null +++ b/trunk/arch/arm/mach-spear6xx/include/mach/entry-macro.S @@ -0,0 +1,18 @@ +/* + * arch/arm/mach-spear6xx/include/mach/entry-macro.S + * + * Low-level IRQ helper macros for SPEAr6xx machine family + * + * Copyright (C) 2009 ST Microelectronics + * Rajeev Kumar + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + + .macro disable_fiq + .endm + + .macro arch_ret_to_user, tmp1, tmp2 + .endm diff --git a/trunk/arch/arm/mach-spear6xx/include/mach/system.h b/trunk/arch/arm/mach-spear6xx/include/mach/system.h new file mode 100644 index 000000000000..0b1d2be81cfb --- /dev/null +++ b/trunk/arch/arm/mach-spear6xx/include/mach/system.h @@ -0,0 +1,19 @@ +/* + * arch/arm/mach-spear6xx/include/mach/system.h + * + * SPEAr6xx Machine family specific architecture functions + * + * Copyright (C) 2009 ST Microelectronics + * Rajeev Kumar + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#ifndef __MACH_SYSTEM_H +#define __MACH_SYSTEM_H + +#include + +#endif /* __MACH_SYSTEM_H */ diff --git a/trunk/arch/arm/mach-spear6xx/spear6xx.c b/trunk/arch/arm/mach-spear6xx/spear6xx.c index b997b1b10ba0..e0f6628c8b2c 100644 --- a/trunk/arch/arm/mach-spear6xx/spear6xx.c +++ b/trunk/arch/arm/mach-spear6xx/spear6xx.c @@ -34,7 +34,7 @@ struct amba_device uart_device[] = { .end = SPEAR6XX_ICM1_UART0_BASE + SZ_4K - 1, .flags = IORESOURCE_MEM, }, - .irq = {IRQ_UART_0}, + .irq = {IRQ_UART_0, NO_IRQ}, }, { .dev = { .init_name = "uart1", @@ -44,7 +44,7 @@ struct amba_device uart_device[] = { .end = SPEAR6XX_ICM1_UART1_BASE + SZ_4K - 1, .flags = IORESOURCE_MEM, }, - .irq = {IRQ_UART_1}, + .irq = {IRQ_UART_1, NO_IRQ}, } }; @@ -73,7 +73,7 @@ struct amba_device gpio_device[] = { .end = SPEAR6XX_CPU_GPIO_BASE + SZ_4K - 1, .flags = IORESOURCE_MEM, }, - .irq = {IRQ_LOCAL_GPIO}, + .irq = {IRQ_LOCAL_GPIO, NO_IRQ}, }, { .dev = { .init_name = "gpio1", @@ -84,7 +84,7 @@ struct amba_device gpio_device[] = { .end = SPEAR6XX_ICM3_GPIO_BASE + SZ_4K - 1, .flags = IORESOURCE_MEM, }, - .irq = {IRQ_BASIC_GPIO}, + .irq = {IRQ_BASIC_GPIO, NO_IRQ}, }, { .dev = { .init_name = "gpio2", @@ -95,7 +95,7 @@ struct amba_device gpio_device[] = { .end = SPEAR6XX_ICM2_GPIO_BASE + SZ_4K - 1, .flags = IORESOURCE_MEM, }, - .irq = {IRQ_APPL_GPIO}, + .irq = {IRQ_APPL_GPIO, NO_IRQ}, } }; diff --git a/trunk/arch/arm/mach-tegra/common.c b/trunk/arch/arm/mach-tegra/common.c index 2db20da1d585..a2eb90169aed 100644 --- a/trunk/arch/arm/mach-tegra/common.c +++ b/trunk/arch/arm/mach-tegra/common.c @@ -27,6 +27,7 @@ #include #include +#include #include "board.h" #include "clock.h" @@ -95,8 +96,6 @@ static void __init tegra_init_cache(u32 tag_latency, u32 data_latency) #ifdef CONFIG_ARCH_TEGRA_2x_SOC void __init tegra20_init_early(void) { - disable_hlt(); /* idle WFI usage needs to be confirmed */ - tegra_init_fuse(); tegra2_init_clocks(); tegra_clk_init_from_table(tegra20_clk_init_table); diff --git a/trunk/arch/arm/mach-tegra/include/mach/entry-macro.S b/trunk/arch/arm/mach-tegra/include/mach/entry-macro.S new file mode 100644 index 000000000000..e577cfe27e72 --- /dev/null +++ b/trunk/arch/arm/mach-tegra/include/mach/entry-macro.S @@ -0,0 +1,20 @@ +/* arch/arm/mach-tegra/include/mach/entry-macro.S + * + * Copyright (C) 2009 Palm, Inc. + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + + .macro disable_fiq + .endm + + .macro arch_ret_to_user, tmp1, tmp2 + .endm diff --git a/trunk/arch/arm/mach-tegra/include/mach/system.h b/trunk/arch/arm/mach-tegra/include/mach/system.h new file mode 100644 index 000000000000..a312988bf6f8 --- /dev/null +++ b/trunk/arch/arm/mach-tegra/include/mach/system.h @@ -0,0 +1,28 @@ +/* + * arch/arm/mach-tegra/include/mach/system.h + * + * Copyright (C) 2010 Google, Inc. + * + * Author: + * Colin Cross + * Erik Gilling + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#ifndef __MACH_TEGRA_SYSTEM_H +#define __MACH_TEGRA_SYSTEM_H + +static inline void arch_idle(void) +{ +} + +#endif diff --git a/trunk/arch/arm/mach-u300/core.c b/trunk/arch/arm/mach-u300/core.c index b9865605da09..b4c6926a700c 100644 --- a/trunk/arch/arm/mach-u300/core.c +++ b/trunk/arch/arm/mach-u300/core.c @@ -94,9 +94,19 @@ static struct amba_pl011_data uart0_plat_data = { #endif }; -/* Slow device at 0x3000 offset */ -static AMBA_APB_DEVICE(uart0, "uart0", 0, U300_UART0_BASE, - { IRQ_U300_UART0 }, &uart0_plat_data); +static struct amba_device uart0_device = { + .dev = { + .coherent_dma_mask = ~0, + .init_name = "uart0", /* Slow device at 0x3000 offset */ + .platform_data = &uart0_plat_data, + }, + .res = { + .start = U300_UART0_BASE, + .end = U300_UART0_BASE + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + .irq = { IRQ_U300_UART0, NO_IRQ }, +}; /* The U335 have an additional UART1 on the APP CPU */ #ifdef CONFIG_MACH_U300_BS335 @@ -108,28 +118,71 @@ static struct amba_pl011_data uart1_plat_data = { #endif }; -/* Fast device at 0x7000 offset */ -static AMBA_APB_DEVICE(uart1, "uart1", 0, U300_UART1_BASE, - { IRQ_U300_UART1 }, &uart1_plat_data); +static struct amba_device uart1_device = { + .dev = { + .coherent_dma_mask = ~0, + .init_name = "uart1", /* Fast device at 0x7000 offset */ + .platform_data = &uart1_plat_data, + }, + .res = { + .start = U300_UART1_BASE, + .end = U300_UART1_BASE + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + .irq = { IRQ_U300_UART1, NO_IRQ }, +}; #endif -/* AHB device at 0x4000 offset */ -static AMBA_APB_DEVICE(pl172, "pl172", 0, U300_EMIF_CFG_BASE, { }, NULL); +static struct amba_device pl172_device = { + .dev = { + .init_name = "pl172", /* AHB device at 0x4000 offset */ + .platform_data = NULL, + }, + .res = { + .start = U300_EMIF_CFG_BASE, + .end = U300_EMIF_CFG_BASE + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, +}; /* * Everything within this next ifdef deals with external devices connected to * the APP SPI bus. */ -/* Fast device at 0x6000 offset */ -static AMBA_APB_DEVICE(pl022, "pl022", 0, U300_SPI_BASE, - { IRQ_U300_SPI }, NULL); - -/* Fast device at 0x1000 offset */ -#define U300_MMCSD_IRQS { IRQ_U300_MMCSD_MCIINTR0, IRQ_U300_MMCSD_MCIINTR1 } +static struct amba_device pl022_device = { + .dev = { + .coherent_dma_mask = ~0, + .init_name = "pl022", /* Fast device at 0x6000 offset */ + }, + .res = { + .start = U300_SPI_BASE, + .end = U300_SPI_BASE + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + .irq = {IRQ_U300_SPI, NO_IRQ }, + /* + * This device has a DMA channel but the Linux driver does not use + * it currently. + */ +}; -static AMBA_APB_DEVICE(mmcsd, "mmci", 0, U300_MMCSD_BASE, - U300_MMCSD_IRQS, NULL); +static struct amba_device mmcsd_device = { + .dev = { + .init_name = "mmci", /* Fast device at 0x1000 offset */ + .platform_data = NULL, /* Added later */ + }, + .res = { + .start = U300_MMCSD_BASE, + .end = U300_MMCSD_BASE + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + .irq = {IRQ_U300_MMCSD_MCIINTR0, IRQ_U300_MMCSD_MCIINTR1 }, + /* + * This device has a DMA channel but the Linux driver does not use + * it currently. + */ +}; /* * The order of device declaration may be important, since some devices diff --git a/trunk/arch/arm/mach-u300/include/mach/entry-macro.S b/trunk/arch/arm/mach-u300/include/mach/entry-macro.S new file mode 100644 index 000000000000..7181d6ac6651 --- /dev/null +++ b/trunk/arch/arm/mach-u300/include/mach/entry-macro.S @@ -0,0 +1,16 @@ +/* + * + * arch-arm/mach-u300/include/mach/entry-macro.S + * + * + * Copyright (C) 2006-2009 ST-Ericsson AB + * License terms: GNU General Public License (GPL) version 2 + * Low-level IRQ helper macros for ST-Ericsson U300 + * Author: Linus Walleij + */ + + .macro disable_fiq + .endm + + .macro arch_ret_to_user, tmp1, tmp2 + .endm diff --git a/trunk/arch/arm/mach-u300/include/mach/system.h b/trunk/arch/arm/mach-u300/include/mach/system.h new file mode 100644 index 000000000000..574d46e38290 --- /dev/null +++ b/trunk/arch/arm/mach-u300/include/mach/system.h @@ -0,0 +1,14 @@ +/* + * + * arch/arm/mach-u300/include/mach/system.h + * + * + * Copyright (C) 2007-2009 ST-Ericsson AB + * License terms: GNU General Public License (GPL) version 2 + * System shutdown and reset functions. + * Author: Linus Walleij + */ +static inline void arch_idle(void) +{ + cpu_do_idle(); +} diff --git a/trunk/arch/arm/mach-ux500/devices-common.c b/trunk/arch/arm/mach-ux500/devices-common.c index 898a64517b09..c563e5418d80 100644 --- a/trunk/arch/arm/mach-ux500/devices-common.c +++ b/trunk/arch/arm/mach-ux500/devices-common.c @@ -26,22 +26,29 @@ dbx500_add_amba_device(const char *name, resource_size_t base, struct amba_device *dev; int ret; - dev = amba_device_alloc(name, base, SZ_4K); + dev = kzalloc(sizeof *dev, GFP_KERNEL); if (!dev) return ERR_PTR(-ENOMEM); + dev->dev.init_name = name; + + dev->res.start = base; + dev->res.end = base + SZ_4K - 1; + dev->res.flags = IORESOURCE_MEM; + dev->dma_mask = DMA_BIT_MASK(32); dev->dev.coherent_dma_mask = DMA_BIT_MASK(32); dev->irq[0] = irq; + dev->irq[1] = NO_IRQ; dev->periphid = periphid; dev->dev.platform_data = pdata; - ret = amba_device_add(dev, &iomem_resource); + ret = amba_device_register(dev, &iomem_resource); if (ret) { - amba_device_put(dev); + kfree(dev); return ERR_PTR(ret); } diff --git a/trunk/arch/arm/mach-ux500/include/mach/entry-macro.S b/trunk/arch/arm/mach-ux500/include/mach/entry-macro.S new file mode 100644 index 000000000000..e16299e1020a --- /dev/null +++ b/trunk/arch/arm/mach-ux500/include/mach/entry-macro.S @@ -0,0 +1,18 @@ +/* + * Low-level IRQ helper macros for U8500 platforms + * + * Copyright (C) 2009 ST-Ericsson. + * + * This file is a copy of ARM Realview platform. + * -just satisfied checkpatch script. + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + + .macro disable_fiq + .endm + + .macro arch_ret_to_user, tmp1, tmp2 + .endm diff --git a/trunk/arch/arm/mach-ux500/include/mach/system.h b/trunk/arch/arm/mach-ux500/include/mach/system.h new file mode 100644 index 000000000000..258e5c919c24 --- /dev/null +++ b/trunk/arch/arm/mach-ux500/include/mach/system.h @@ -0,0 +1,20 @@ +/* + * Copyright (C) 2009 ST-Ericsson. + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ +#ifndef __ASM_ARCH_SYSTEM_H +#define __ASM_ARCH_SYSTEM_H + +static inline void arch_idle(void) +{ + /* + * This should do all the clock switching + * and wait for interrupt tricks + */ + cpu_do_idle(); +} + +#endif diff --git a/trunk/arch/arm/mach-versatile/core.c b/trunk/arch/arm/mach-versatile/core.c index 4f352e45be0a..02b7b9303f3b 100644 --- a/trunk/arch/arm/mach-versatile/core.c +++ b/trunk/arch/arm/mach-versatile/core.c @@ -582,58 +582,58 @@ static struct pl022_ssp_controller ssp0_plat_data = { .num_chipselect = 1, }; -#define AACI_IRQ { IRQ_AACI } +#define AACI_IRQ { IRQ_AACI, NO_IRQ } #define MMCI0_IRQ { IRQ_MMCI0A,IRQ_SIC_MMCI0B } -#define KMI0_IRQ { IRQ_SIC_KMI0 } -#define KMI1_IRQ { IRQ_SIC_KMI1 } +#define KMI0_IRQ { IRQ_SIC_KMI0, NO_IRQ } +#define KMI1_IRQ { IRQ_SIC_KMI1, NO_IRQ } /* * These devices are connected directly to the multi-layer AHB switch */ -#define SMC_IRQ { } -#define MPMC_IRQ { } -#define CLCD_IRQ { IRQ_CLCDINT } -#define DMAC_IRQ { IRQ_DMAINT } +#define SMC_IRQ { NO_IRQ, NO_IRQ } +#define MPMC_IRQ { NO_IRQ, NO_IRQ } +#define CLCD_IRQ { IRQ_CLCDINT, NO_IRQ } +#define DMAC_IRQ { IRQ_DMAINT, NO_IRQ } /* * These devices are connected via the core APB bridge */ -#define SCTL_IRQ { } -#define WATCHDOG_IRQ { IRQ_WDOGINT } -#define GPIO0_IRQ { IRQ_GPIOINT0 } -#define GPIO1_IRQ { IRQ_GPIOINT1 } -#define RTC_IRQ { IRQ_RTCINT } +#define SCTL_IRQ { NO_IRQ, NO_IRQ } +#define WATCHDOG_IRQ { IRQ_WDOGINT, NO_IRQ } +#define GPIO0_IRQ { IRQ_GPIOINT0, NO_IRQ } +#define GPIO1_IRQ { IRQ_GPIOINT1, NO_IRQ } +#define RTC_IRQ { IRQ_RTCINT, NO_IRQ } /* * These devices are connected via the DMA APB bridge */ -#define SCI_IRQ { IRQ_SCIINT } -#define UART0_IRQ { IRQ_UARTINT0 } -#define UART1_IRQ { IRQ_UARTINT1 } -#define UART2_IRQ { IRQ_UARTINT2 } -#define SSP_IRQ { IRQ_SSPINT } +#define SCI_IRQ { IRQ_SCIINT, NO_IRQ } +#define UART0_IRQ { IRQ_UARTINT0, NO_IRQ } +#define UART1_IRQ { IRQ_UARTINT1, NO_IRQ } +#define UART2_IRQ { IRQ_UARTINT2, NO_IRQ } +#define SSP_IRQ { IRQ_SSPINT, NO_IRQ } /* FPGA Primecells */ -APB_DEVICE(aaci, "fpga:04", AACI, NULL); -APB_DEVICE(mmc0, "fpga:05", MMCI0, &mmc0_plat_data); -APB_DEVICE(kmi0, "fpga:06", KMI0, NULL); -APB_DEVICE(kmi1, "fpga:07", KMI1, NULL); +AMBA_DEVICE(aaci, "fpga:04", AACI, NULL); +AMBA_DEVICE(mmc0, "fpga:05", MMCI0, &mmc0_plat_data); +AMBA_DEVICE(kmi0, "fpga:06", KMI0, NULL); +AMBA_DEVICE(kmi1, "fpga:07", KMI1, NULL); /* DevChip Primecells */ -AHB_DEVICE(smc, "dev:00", SMC, NULL); -AHB_DEVICE(mpmc, "dev:10", MPMC, NULL); -AHB_DEVICE(clcd, "dev:20", CLCD, &clcd_plat_data); -AHB_DEVICE(dmac, "dev:30", DMAC, NULL); -APB_DEVICE(sctl, "dev:e0", SCTL, NULL); -APB_DEVICE(wdog, "dev:e1", WATCHDOG, NULL); -APB_DEVICE(gpio0, "dev:e4", GPIO0, &gpio0_plat_data); -APB_DEVICE(gpio1, "dev:e5", GPIO1, &gpio1_plat_data); -APB_DEVICE(rtc, "dev:e8", RTC, NULL); -APB_DEVICE(sci0, "dev:f0", SCI, NULL); -APB_DEVICE(uart0, "dev:f1", UART0, NULL); -APB_DEVICE(uart1, "dev:f2", UART1, NULL); -APB_DEVICE(uart2, "dev:f3", UART2, NULL); -APB_DEVICE(ssp0, "dev:f4", SSP, &ssp0_plat_data); +AMBA_DEVICE(smc, "dev:00", SMC, NULL); +AMBA_DEVICE(mpmc, "dev:10", MPMC, NULL); +AMBA_DEVICE(clcd, "dev:20", CLCD, &clcd_plat_data); +AMBA_DEVICE(dmac, "dev:30", DMAC, NULL); +AMBA_DEVICE(sctl, "dev:e0", SCTL, NULL); +AMBA_DEVICE(wdog, "dev:e1", WATCHDOG, NULL); +AMBA_DEVICE(gpio0, "dev:e4", GPIO0, &gpio0_plat_data); +AMBA_DEVICE(gpio1, "dev:e5", GPIO1, &gpio1_plat_data); +AMBA_DEVICE(rtc, "dev:e8", RTC, NULL); +AMBA_DEVICE(sci0, "dev:f0", SCI, NULL); +AMBA_DEVICE(uart0, "dev:f1", UART0, NULL); +AMBA_DEVICE(uart1, "dev:f2", UART1, NULL); +AMBA_DEVICE(uart2, "dev:f3", UART2, NULL); +AMBA_DEVICE(ssp0, "dev:f4", SSP, &ssp0_plat_data); static struct amba_device *amba_devs[] __initdata = { &dmac_device, diff --git a/trunk/arch/arm/mach-versatile/core.h b/trunk/arch/arm/mach-versatile/core.h index 683e60776a85..2ef2f555f315 100644 --- a/trunk/arch/arm/mach-versatile/core.h +++ b/trunk/arch/arm/mach-versatile/core.h @@ -36,10 +36,20 @@ extern unsigned int mmc_status(struct device *dev); extern struct of_dev_auxdata versatile_auxdata_lookup[]; #endif -#define APB_DEVICE(name, busid, base, plat) \ -static AMBA_APB_DEVICE(name, busid, 0, VERSATILE_##base##_BASE, base##_IRQ, plat) - -#define AHB_DEVICE(name, busid, base, plat) \ -static AMBA_AHB_DEVICE(name, busid, 0, VERSATILE_##base##_BASE, base##_IRQ, plat) +#define AMBA_DEVICE(name,busid,base,plat) \ +static struct amba_device name##_device = { \ + .dev = { \ + .coherent_dma_mask = ~0, \ + .init_name = busid, \ + .platform_data = plat, \ + }, \ + .res = { \ + .start = VERSATILE_##base##_BASE, \ + .end = (VERSATILE_##base##_BASE) + SZ_4K - 1,\ + .flags = IORESOURCE_MEM, \ + }, \ + .dma_mask = ~0, \ + .irq = base##_IRQ, \ +} #endif diff --git a/trunk/arch/arm/mach-versatile/include/mach/entry-macro.S b/trunk/arch/arm/mach-versatile/include/mach/entry-macro.S new file mode 100644 index 000000000000..b6f0dbf122ee --- /dev/null +++ b/trunk/arch/arm/mach-versatile/include/mach/entry-macro.S @@ -0,0 +1,15 @@ +/* + * arch/arm/mach-versatile/include/mach/entry-macro.S + * + * Low-level IRQ helper macros for Versatile platforms + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + + .macro disable_fiq + .endm + + .macro arch_ret_to_user, tmp1, tmp2 + .endm diff --git a/trunk/arch/arm/mach-versatile/include/mach/system.h b/trunk/arch/arm/mach-versatile/include/mach/system.h new file mode 100644 index 000000000000..f3fa347895f0 --- /dev/null +++ b/trunk/arch/arm/mach-versatile/include/mach/system.h @@ -0,0 +1,33 @@ +/* + * arch/arm/mach-versatile/include/mach/system.h + * + * Copyright (C) 2003 ARM Limited + * Copyright (C) 2000 Deep Blue Solutions Ltd + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#ifndef __ASM_ARCH_SYSTEM_H +#define __ASM_ARCH_SYSTEM_H + +static inline void arch_idle(void) +{ + /* + * This should do all the clock switching + * and wait for interrupt tricks + */ + cpu_do_idle(); +} + +#endif diff --git a/trunk/arch/arm/mach-versatile/versatile_pb.c b/trunk/arch/arm/mach-versatile/versatile_pb.c index 19738331bd3d..9581c197500c 100644 --- a/trunk/arch/arm/mach-versatile/versatile_pb.c +++ b/trunk/arch/arm/mach-versatile/versatile_pb.c @@ -58,28 +58,28 @@ static struct pl061_platform_data gpio3_plat_data = { .irq_base = IRQ_GPIO3_START, }; -#define UART3_IRQ { IRQ_SIC_UART3 } -#define SCI1_IRQ { IRQ_SIC_SCI3 } +#define UART3_IRQ { IRQ_SIC_UART3, NO_IRQ } +#define SCI1_IRQ { IRQ_SIC_SCI3, NO_IRQ } #define MMCI1_IRQ { IRQ_MMCI1A, IRQ_SIC_MMCI1B } /* * These devices are connected via the core APB bridge */ -#define GPIO2_IRQ { IRQ_GPIOINT2 } -#define GPIO3_IRQ { IRQ_GPIOINT3 } +#define GPIO2_IRQ { IRQ_GPIOINT2, NO_IRQ } +#define GPIO3_IRQ { IRQ_GPIOINT3, NO_IRQ } /* * These devices are connected via the DMA APB bridge */ /* FPGA Primecells */ -APB_DEVICE(uart3, "fpga:09", UART3, NULL); -APB_DEVICE(sci1, "fpga:0a", SCI1, NULL); -APB_DEVICE(mmc1, "fpga:0b", MMCI1, &mmc1_plat_data); +AMBA_DEVICE(uart3, "fpga:09", UART3, NULL); +AMBA_DEVICE(sci1, "fpga:0a", SCI1, NULL); +AMBA_DEVICE(mmc1, "fpga:0b", MMCI1, &mmc1_plat_data); /* DevChip Primecells */ -APB_DEVICE(gpio2, "dev:e6", GPIO2, &gpio2_plat_data); -APB_DEVICE(gpio3, "dev:e7", GPIO3, &gpio3_plat_data); +AMBA_DEVICE(gpio2, "dev:e6", GPIO2, &gpio2_plat_data); +AMBA_DEVICE(gpio3, "dev:e7", GPIO3, &gpio3_plat_data); static struct amba_device *amba_devs[] __initdata = { &uart3_device, diff --git a/trunk/arch/arm/mach-vexpress/core.h b/trunk/arch/arm/mach-vexpress/core.h index 9f0f2827c711..f4397159c173 100644 --- a/trunk/arch/arm/mach-vexpress/core.h +++ b/trunk/arch/arm/mach-vexpress/core.h @@ -1,2 +1,19 @@ #define __MMIO_P2V(x) (((x) & 0xfffff) | (((x) & 0x0f000000) >> 4) | 0xf8000000) #define MMIO_P2V(x) ((void __iomem *)__MMIO_P2V(x)) + +#define AMBA_DEVICE(name,busid,base,plat) \ +struct amba_device name##_device = { \ + .dev = { \ + .coherent_dma_mask = ~0UL, \ + .init_name = busid, \ + .platform_data = plat, \ + }, \ + .res = { \ + .start = base, \ + .end = base + SZ_4K - 1, \ + .flags = IORESOURCE_MEM, \ + }, \ + .dma_mask = ~0UL, \ + .irq = IRQ_##base, \ + /* .dma = DMA_##base,*/ \ +} diff --git a/trunk/arch/arm/mach-vexpress/ct-ca9x4.c b/trunk/arch/arm/mach-vexpress/ct-ca9x4.c index 1b1d2e4892b9..b1e87c184e54 100644 --- a/trunk/arch/arm/mach-vexpress/ct-ca9x4.c +++ b/trunk/arch/arm/mach-vexpress/ct-ca9x4.c @@ -109,10 +109,10 @@ static struct clcd_board ct_ca9x4_clcd_data = { .remove = versatile_clcd_remove_dma, }; -static AMBA_AHB_DEVICE(clcd, "ct:clcd", 0, CT_CA9X4_CLCDC, IRQ_CT_CA9X4_CLCDC, &ct_ca9x4_clcd_data); -static AMBA_APB_DEVICE(dmc, "ct:dmc", 0, CT_CA9X4_DMC, IRQ_CT_CA9X4_DMC, NULL); -static AMBA_APB_DEVICE(smc, "ct:smc", 0, CT_CA9X4_SMC, IRQ_CT_CA9X4_SMC, NULL); -static AMBA_APB_DEVICE(gpio, "ct:gpio", 0, CT_CA9X4_GPIO, IRQ_CT_CA9X4_GPIO, NULL); +static AMBA_DEVICE(clcd, "ct:clcd", CT_CA9X4_CLCDC, &ct_ca9x4_clcd_data); +static AMBA_DEVICE(dmc, "ct:dmc", CT_CA9X4_DMC, NULL); +static AMBA_DEVICE(smc, "ct:smc", CT_CA9X4_SMC, NULL); +static AMBA_DEVICE(gpio, "ct:gpio", CT_CA9X4_GPIO, NULL); static struct amba_device *ct_ca9x4_amba_devs[] __initdata = { &clcd_device, diff --git a/trunk/arch/arm/mach-vexpress/include/mach/ct-ca9x4.h b/trunk/arch/arm/mach-vexpress/include/mach/ct-ca9x4.h index a40468f3b938..a34d3d4faae1 100644 --- a/trunk/arch/arm/mach-vexpress/include/mach/ct-ca9x4.h +++ b/trunk/arch/arm/mach-vexpress/include/mach/ct-ca9x4.h @@ -35,7 +35,7 @@ * Interrupts. Those in {} are for AMBA devices */ #define IRQ_CT_CA9X4_CLCDC { 76 } -#define IRQ_CT_CA9X4_DMC { 0 } +#define IRQ_CT_CA9X4_DMC { -1 } #define IRQ_CT_CA9X4_SMC { 77, 78 } #define IRQ_CT_CA9X4_TIMER0 80 #define IRQ_CT_CA9X4_TIMER1 81 diff --git a/trunk/arch/arm/mach-vexpress/include/mach/entry-macro.S b/trunk/arch/arm/mach-vexpress/include/mach/entry-macro.S new file mode 100644 index 000000000000..a14f9e62ca92 --- /dev/null +++ b/trunk/arch/arm/mach-vexpress/include/mach/entry-macro.S @@ -0,0 +1,5 @@ + .macro disable_fiq + .endm + + .macro arch_ret_to_user, tmp1, tmp2 + .endm diff --git a/trunk/arch/arm/mach-vexpress/include/mach/system.h b/trunk/arch/arm/mach-vexpress/include/mach/system.h new file mode 100644 index 000000000000..f653a8e265bd --- /dev/null +++ b/trunk/arch/arm/mach-vexpress/include/mach/system.h @@ -0,0 +1,33 @@ +/* + * arch/arm/mach-vexpress/include/mach/system.h + * + * Copyright (C) 2003 ARM Limited + * Copyright (C) 2000 Deep Blue Solutions Ltd + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#ifndef __ASM_ARCH_SYSTEM_H +#define __ASM_ARCH_SYSTEM_H + +static inline void arch_idle(void) +{ + /* + * This should do all the clock switching + * and wait for interrupt tricks + */ + cpu_do_idle(); +} + +#endif diff --git a/trunk/arch/arm/mach-vexpress/v2m.c b/trunk/arch/arm/mach-vexpress/v2m.c index ad64f97a2003..b4a28ca0e50a 100644 --- a/trunk/arch/arm/mach-vexpress/v2m.c +++ b/trunk/arch/arm/mach-vexpress/v2m.c @@ -266,16 +266,16 @@ static struct mmci_platform_data v2m_mmci_data = { .status = v2m_mmci_status, }; -static AMBA_APB_DEVICE(aaci, "mb:aaci", 0, V2M_AACI, IRQ_V2M_AACI, NULL); -static AMBA_APB_DEVICE(mmci, "mb:mmci", 0, V2M_MMCI, IRQ_V2M_MMCI, &v2m_mmci_data); -static AMBA_APB_DEVICE(kmi0, "mb:kmi0", 0, V2M_KMI0, IRQ_V2M_KMI0, NULL); -static AMBA_APB_DEVICE(kmi1, "mb:kmi1", 0, V2M_KMI1, IRQ_V2M_KMI1, NULL); -static AMBA_APB_DEVICE(uart0, "mb:uart0", 0, V2M_UART0, IRQ_V2M_UART0, NULL); -static AMBA_APB_DEVICE(uart1, "mb:uart1", 0, V2M_UART1, IRQ_V2M_UART1, NULL); -static AMBA_APB_DEVICE(uart2, "mb:uart2", 0, V2M_UART2, IRQ_V2M_UART2, NULL); -static AMBA_APB_DEVICE(uart3, "mb:uart3", 0, V2M_UART3, IRQ_V2M_UART3, NULL); -static AMBA_APB_DEVICE(wdt, "mb:wdt", 0, V2M_WDT, IRQ_V2M_WDT, NULL); -static AMBA_APB_DEVICE(rtc, "mb:rtc", 0, V2M_RTC, IRQ_V2M_RTC, NULL); +static AMBA_DEVICE(aaci, "mb:aaci", V2M_AACI, NULL); +static AMBA_DEVICE(mmci, "mb:mmci", V2M_MMCI, &v2m_mmci_data); +static AMBA_DEVICE(kmi0, "mb:kmi0", V2M_KMI0, NULL); +static AMBA_DEVICE(kmi1, "mb:kmi1", V2M_KMI1, NULL); +static AMBA_DEVICE(uart0, "mb:uart0", V2M_UART0, NULL); +static AMBA_DEVICE(uart1, "mb:uart1", V2M_UART1, NULL); +static AMBA_DEVICE(uart2, "mb:uart2", V2M_UART2, NULL); +static AMBA_DEVICE(uart3, "mb:uart3", V2M_UART3, NULL); +static AMBA_DEVICE(wdt, "mb:wdt", V2M_WDT, NULL); +static AMBA_DEVICE(rtc, "mb:rtc", V2M_RTC, NULL); static struct amba_device *v2m_amba_devs[] __initdata = { &aaci_device, diff --git a/trunk/arch/arm/mach-vt8500/include/mach/entry-macro.S b/trunk/arch/arm/mach-vt8500/include/mach/entry-macro.S index 367d1b55fb9a..92684c7eaed3 100644 --- a/trunk/arch/arm/mach-vt8500/include/mach/entry-macro.S +++ b/trunk/arch/arm/mach-vt8500/include/mach/entry-macro.S @@ -8,12 +8,18 @@ * warranty of any kind, whether express or implied. */ + .macro disable_fiq + .endm + .macro get_irqnr_preamble, base, tmp @ physical 0xd8140000 is virtual 0xf8140000 mov \base, #0xf8000000 orr \base, \base, #0x00140000 .endm + .macro arch_ret_to_user, tmp1, tmp2 + .endm + .macro get_irqnr_and_base, irqnr, irqstat, base, tmp ldr \irqnr, [\base] cmp \irqnr, #63 @ may be false positive, check interrupt status diff --git a/trunk/arch/arm/mach-vt8500/include/mach/system.h b/trunk/arch/arm/mach-vt8500/include/mach/system.h index 58fa8010ee61..d6c757eaf26b 100644 --- a/trunk/arch/arm/mach-vt8500/include/mach/system.h +++ b/trunk/arch/arm/mach-vt8500/include/mach/system.h @@ -7,6 +7,11 @@ /* PM Software Reset request register */ #define VT8500_PMSR_VIRT 0xf8130060 +static inline void arch_idle(void) +{ + cpu_do_idle(); +} + static inline void arch_reset(char mode, const char *cmd) { writel(1, VT8500_PMSR_VIRT); diff --git a/trunk/arch/arm/mach-w90x900/dev.c b/trunk/arch/arm/mach-w90x900/dev.c index db82568a998a..78110befb7a9 100644 --- a/trunk/arch/arm/mach-w90x900/dev.c +++ b/trunk/arch/arm/mach-w90x900/dev.c @@ -530,7 +530,6 @@ static struct platform_device *nuc900_public_dev[] __initdata = { void __init nuc900_board_init(struct platform_device **device, int size) { - disable_hlt(); platform_add_devices(device, size); platform_add_devices(nuc900_public_dev, ARRAY_SIZE(nuc900_public_dev)); spi_register_board_info(nuc900_spi_board_info, diff --git a/trunk/arch/arm/mach-w90x900/include/mach/entry-macro.S b/trunk/arch/arm/mach-w90x900/include/mach/entry-macro.S index e286daca6827..d39aca5be9ee 100644 --- a/trunk/arch/arm/mach-w90x900/include/mach/entry-macro.S +++ b/trunk/arch/arm/mach-w90x900/include/mach/entry-macro.S @@ -15,6 +15,9 @@ .macro get_irqnr_preamble, base, tmp .endm + .macro arch_ret_to_user, tmp1, tmp2 + .endm + .macro get_irqnr_and_base, irqnr, irqstat, base, tmp mov \base, #AIC_BA @@ -24,3 +27,8 @@ cmp \irqnr, #0 .endm + + /* currently don't need an disable_fiq macro */ + + .macro disable_fiq + .endm diff --git a/trunk/arch/arm/mach-w90x900/include/mach/system.h b/trunk/arch/arm/mach-w90x900/include/mach/system.h new file mode 100644 index 000000000000..2aaeb9311619 --- /dev/null +++ b/trunk/arch/arm/mach-w90x900/include/mach/system.h @@ -0,0 +1,19 @@ +/* + * arch/arm/mach-w90x900/include/mach/system.h + * + * Copyright (c) 2008 Nuvoton technology corporation + * All rights reserved. + * + * Wan ZongShun + * + * Based on arch/arm/mach-s3c2410/include/mach/system.h + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + */ +static void arch_idle(void) +{ +} diff --git a/trunk/arch/arm/mach-zynq/include/mach/entry-macro.S b/trunk/arch/arm/mach-zynq/include/mach/entry-macro.S new file mode 100644 index 000000000000..d621fb732569 --- /dev/null +++ b/trunk/arch/arm/mach-zynq/include/mach/entry-macro.S @@ -0,0 +1,27 @@ +/* + * arch/arm/mach-zynq/include/mach/entry-macro.S + * + * Low-level IRQ helper macros + * + * Copyright (C) 2011 Xilinx + * + * based on arch/plat-mxc/include/mach/entry-macro.S + * + * Copyright (C) 2007 Lennert Buytenhek + * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + + .macro disable_fiq + .endm + + .macro arch_ret_to_user, tmp1, tmp2 + .endm diff --git a/trunk/arch/arm/mach-zynq/include/mach/system.h b/trunk/arch/arm/mach-zynq/include/mach/system.h new file mode 100644 index 000000000000..8e88e0b8d2ba --- /dev/null +++ b/trunk/arch/arm/mach-zynq/include/mach/system.h @@ -0,0 +1,23 @@ +/* arch/arm/mach-zynq/include/mach/system.h + * + * Copyright (C) 2011 Xilinx + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef __MACH_SYSTEM_H__ +#define __MACH_SYSTEM_H__ + +static inline void arch_idle(void) +{ + cpu_do_idle(); +} + +#endif diff --git a/trunk/arch/arm/plat-mxc/include/mach/entry-macro.S b/trunk/arch/arm/plat-mxc/include/mach/entry-macro.S new file mode 100644 index 000000000000..def5d30cb67e --- /dev/null +++ b/trunk/arch/arm/plat-mxc/include/mach/entry-macro.S @@ -0,0 +1,16 @@ +/* + * Copyright (C) 2007 Lennert Buytenhek + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + + .macro disable_fiq + .endm + + .macro arch_ret_to_user, tmp1, tmp2 + .endm diff --git a/trunk/arch/arm/plat-mxc/include/mach/system.h b/trunk/arch/arm/plat-mxc/include/mach/system.h new file mode 100644 index 000000000000..13ad0df2e860 --- /dev/null +++ b/trunk/arch/arm/plat-mxc/include/mach/system.h @@ -0,0 +1,25 @@ +/* + * Copyright (C) 1999 ARM Limited + * Copyright (C) 2000 Deep Blue Solutions Ltd + * Copyright 2004-2008 Freescale Semiconductor, Inc. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef __ASM_ARCH_MXC_SYSTEM_H__ +#define __ASM_ARCH_MXC_SYSTEM_H__ + +static inline void arch_idle(void) +{ + cpu_do_idle(); +} + +#endif /* __ASM_ARCH_MXC_SYSTEM_H__ */ diff --git a/trunk/arch/arm/plat-omap/include/plat/mcspi.h b/trunk/arch/arm/plat-omap/include/plat/mcspi.h index a357eb26bd25..3d51b18131cc 100644 --- a/trunk/arch/arm/plat-omap/include/plat/mcspi.h +++ b/trunk/arch/arm/plat-omap/include/plat/mcspi.h @@ -18,6 +18,9 @@ struct omap2_mcspi_dev_attr { struct omap2_mcspi_device_config { unsigned turbo_mode:1; + + /* Do we want one channel enabled at the same time? */ + unsigned single_channel:1; }; #endif diff --git a/trunk/arch/arm/plat-omap/include/plat/system.h b/trunk/arch/arm/plat-omap/include/plat/system.h new file mode 100644 index 000000000000..8e5ebd74b129 --- /dev/null +++ b/trunk/arch/arm/plat-omap/include/plat/system.h @@ -0,0 +1,15 @@ +/* + * Copied from arch/arm/mach-sa1100/include/mach/system.h + * Copyright (c) 1999 Nicolas Pitre + */ +#ifndef __ASM_ARCH_SYSTEM_H +#define __ASM_ARCH_SYSTEM_H + +#include + +static inline void arch_idle(void) +{ + cpu_do_idle(); +} + +#endif diff --git a/trunk/arch/arm/plat-s3c24xx/cpu.c b/trunk/arch/arm/plat-s3c24xx/cpu.c index 32a09931350c..21f1fda8b661 100644 --- a/trunk/arch/arm/plat-s3c24xx/cpu.c +++ b/trunk/arch/arm/plat-s3c24xx/cpu.c @@ -32,7 +32,6 @@ #include #include -#include #include #include @@ -191,34 +190,8 @@ static unsigned long s3c24xx_read_idcode_v4(void) return __raw_readl(S3C2410_GSTATUS1); } -static void s3c24xx_default_idle(void) -{ - unsigned long tmp; - int i; - - /* idle the system by using the idle mode which will wait for an - * interrupt to happen before restarting the system. - */ - - /* Warning: going into idle state upsets jtag scanning */ - - __raw_writel(__raw_readl(S3C2410_CLKCON) | S3C2410_CLKCON_IDLE, - S3C2410_CLKCON); - - /* the samsung port seems to do a loop and then unset idle.. */ - for (i = 0; i < 50; i++) - tmp += __raw_readl(S3C2410_CLKCON); /* ensure loop not optimised out */ - - /* this bit is not cleared on re-start... */ - - __raw_writel(__raw_readl(S3C2410_CLKCON) & ~S3C2410_CLKCON_IDLE, - S3C2410_CLKCON); -} - void __init s3c24xx_init_io(struct map_desc *mach_desc, int size) { - arm_pm_idle = s3c24xx_default_idle; - /* initialise the io descriptors we need for initialisation */ iotable_init(mach_desc, size); iotable_init(s3c_iodesc, ARRAY_SIZE(s3c_iodesc)); diff --git a/trunk/arch/arm/plat-spear/include/plat/system.h b/trunk/arch/arm/plat-spear/include/plat/system.h new file mode 100644 index 000000000000..86c6f83b44cc --- /dev/null +++ b/trunk/arch/arm/plat-spear/include/plat/system.h @@ -0,0 +1,26 @@ +/* + * arch/arm/plat-spear/include/plat/system.h + * + * SPEAr platform specific architecture functions + * + * Copyright (C) 2009 ST Microelectronics + * Viresh Kumar + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#ifndef __PLAT_SYSTEM_H +#define __PLAT_SYSTEM_H + +static inline void arch_idle(void) +{ + /* + * This should do all the clock switching + * and wait for interrupt tricks + */ + cpu_do_idle(); +} + +#endif /* __PLAT_SYSTEM_H */ diff --git a/trunk/drivers/amba/bus.c b/trunk/drivers/amba/bus.c index 01c2cf4efcdd..54eaf96ab217 100644 --- a/trunk/drivers/amba/bus.c +++ b/trunk/drivers/amba/bus.c @@ -497,22 +497,37 @@ static void amba_device_release(struct device *dev) } /** - * amba_device_add - add a previously allocated AMBA device structure - * @dev: AMBA device allocated by amba_device_alloc - * @parent: resource parent for this devices resources + * amba_device_register - register an AMBA device + * @dev: AMBA device to register + * @parent: parent memory resource * - * Claim the resource, and read the device cell ID if not already - * initialized. Register the AMBA device with the Linux device - * manager. + * Setup the AMBA device, reading the cell ID if present. + * Claim the resource, and register the AMBA device with + * the Linux device manager. */ -int amba_device_add(struct amba_device *dev, struct resource *parent) +int amba_device_register(struct amba_device *dev, struct resource *parent) { u32 size; void __iomem *tmp; int i, ret; - WARN_ON(dev->irq[0] == (unsigned int)-1); - WARN_ON(dev->irq[1] == (unsigned int)-1); + device_initialize(&dev->dev); + + /* + * Copy from device_add + */ + if (dev->dev.init_name) { + dev_set_name(&dev->dev, "%s", dev->dev.init_name); + dev->dev.init_name = NULL; + } + + dev->dev.release = amba_device_release; + dev->dev.bus = &amba_bustype; + dev->dev.dma_mask = &dev->dma_mask; + dev->res.name = dev_name(&dev->dev); + + if (!dev->dev.coherent_dma_mask && dev->dma_mask) + dev_warn(&dev->dev, "coherent dma mask is unset\n"); ret = request_resource(parent, &dev->res); if (ret) @@ -567,9 +582,9 @@ int amba_device_add(struct amba_device *dev, struct resource *parent) if (ret) goto err_release; - if (dev->irq[0] && dev->irq[0] != NO_IRQ) + if (dev->irq[0] != NO_IRQ) ret = device_create_file(&dev->dev, &dev_attr_irq0); - if (ret == 0 && dev->irq[1] && dev->irq[1] != NO_IRQ) + if (ret == 0 && dev->irq[1] != NO_IRQ) ret = device_create_file(&dev->dev, &dev_attr_irq1); if (ret == 0) return ret; @@ -581,74 +596,6 @@ int amba_device_add(struct amba_device *dev, struct resource *parent) err_out: return ret; } -EXPORT_SYMBOL_GPL(amba_device_add); - -static void amba_device_initialize(struct amba_device *dev, const char *name) -{ - device_initialize(&dev->dev); - if (name) - dev_set_name(&dev->dev, "%s", name); - dev->dev.release = amba_device_release; - dev->dev.bus = &amba_bustype; - dev->dev.dma_mask = &dev->dma_mask; - dev->res.name = dev_name(&dev->dev); -} - -/** - * amba_device_alloc - allocate an AMBA device - * @name: sysfs name of the AMBA device - * @base: base of AMBA device - * @size: size of AMBA device - * - * Allocate and initialize an AMBA device structure. Returns %NULL - * on failure. - */ -struct amba_device *amba_device_alloc(const char *name, resource_size_t base, - size_t size) -{ - struct amba_device *dev; - - dev = kzalloc(sizeof(*dev), GFP_KERNEL); - if (dev) { - amba_device_initialize(dev, name); - dev->res.start = base; - dev->res.end = base + size - 1; - dev->res.flags = IORESOURCE_MEM; - } - - return dev; -} -EXPORT_SYMBOL_GPL(amba_device_alloc); - -/** - * amba_device_register - register an AMBA device - * @dev: AMBA device to register - * @parent: parent memory resource - * - * Setup the AMBA device, reading the cell ID if present. - * Claim the resource, and register the AMBA device with - * the Linux device manager. - */ -int amba_device_register(struct amba_device *dev, struct resource *parent) -{ - amba_device_initialize(dev, dev->dev.init_name); - dev->dev.init_name = NULL; - - if (!dev->dev.coherent_dma_mask && dev->dma_mask) - dev_warn(&dev->dev, "coherent dma mask is unset\n"); - - return amba_device_add(dev, parent); -} - -/** - * amba_device_put - put an AMBA device - * @dev: AMBA device to put - */ -void amba_device_put(struct amba_device *dev) -{ - put_device(&dev->dev); -} -EXPORT_SYMBOL_GPL(amba_device_put); /** * amba_device_unregister - unregister an AMBA device diff --git a/trunk/drivers/mmc/host/mmci.c b/trunk/drivers/mmc/host/mmci.c index 304f2f98b680..0d955ffaf44e 100644 --- a/trunk/drivers/mmc/host/mmci.c +++ b/trunk/drivers/mmc/host/mmci.c @@ -1325,7 +1325,7 @@ static int __devinit mmci_probe(struct amba_device *dev, if (ret) goto unmap; - if (dev->irq[1] == NO_IRQ || !dev->irq[1]) + if (dev->irq[1] == NO_IRQ) host->singleirq = true; else { ret = request_irq(dev->irq[1], mmci_pio_irq, IRQF_SHARED, diff --git a/trunk/drivers/of/platform.c b/trunk/drivers/of/platform.c index cae9477a6ed3..63b3ec48c203 100644 --- a/trunk/drivers/of/platform.c +++ b/trunk/drivers/of/platform.c @@ -253,7 +253,7 @@ static struct amba_device *of_amba_device_create(struct device_node *node, if (!of_device_is_available(node)) return NULL; - dev = amba_device_alloc(NULL, 0, 0); + dev = kzalloc(sizeof(*dev), GFP_KERNEL); if (!dev) return NULL; @@ -283,14 +283,14 @@ static struct amba_device *of_amba_device_create(struct device_node *node, if (ret) goto err_free; - ret = amba_device_add(dev, &iomem_resource); + ret = amba_device_register(dev, &iomem_resource); if (ret) goto err_free; return dev; err_free: - amba_device_put(dev); + kfree(dev); return NULL; } #else /* CONFIG_ARM_AMBA */ diff --git a/trunk/include/linux/amba/bus.h b/trunk/include/linux/amba/bus.h index a9fab831caf8..724c69c40bb8 100644 --- a/trunk/include/linux/amba/bus.h +++ b/trunk/include/linux/amba/bus.h @@ -60,9 +60,6 @@ extern struct bus_type amba_bustype; int amba_driver_register(struct amba_driver *); void amba_driver_unregister(struct amba_driver *); -struct amba_device *amba_device_alloc(const char *, resource_size_t, size_t); -void amba_device_put(struct amba_device *); -int amba_device_add(struct amba_device *, struct resource *); int amba_device_register(struct amba_device *, struct resource *); void amba_device_unregister(struct amba_device *); struct amba_device *amba_find_device(const char *, struct device *, unsigned int, unsigned int); @@ -92,37 +89,4 @@ void amba_release_regions(struct amba_device *); #define amba_manf(d) AMBA_MANF_BITS((d)->periphid) #define amba_part(d) AMBA_PART_BITS((d)->periphid) -#define __AMBA_DEV(busid, data, mask) \ - { \ - .coherent_dma_mask = mask, \ - .init_name = busid, \ - .platform_data = data, \ - } - -/* - * APB devices do not themselves have the ability to address memory, - * so DMA masks should be zero (much like USB peripheral devices.) - * The DMA controller DMA masks should be used instead (much like - * USB host controllers in conventional PCs.) - */ -#define AMBA_APB_DEVICE(name, busid, id, base, irqs, data) \ -struct amba_device name##_device = { \ - .dev = __AMBA_DEV(busid, data, 0), \ - .res = DEFINE_RES_MEM(base, SZ_4K), \ - .irq = irqs, \ - .periphid = id, \ -} - -/* - * AHB devices are DMA capable, so set their DMA masks - */ -#define AMBA_AHB_DEVICE(name, busid, id, base, irqs, data) \ -struct amba_device name##_device = { \ - .dev = __AMBA_DEV(busid, data, ~0ULL), \ - .res = DEFINE_RES_MEM(base, SZ_4K), \ - .dma_mask = ~0ULL, \ - .irq = irqs, \ - .periphid = id, \ -} - #endif