From faceb020e7f4f2338c343422799ff80b7d6eae57 Mon Sep 17 00:00:00 2001 From: Zhao Yakui Date: Thu, 10 Sep 2009 15:45:49 +0800 Subject: [PATCH] --- yaml --- r: 165987 b: refs/heads/master c: bb66c5122b4300b475b585fffb811311f39f5431 h: refs/heads/master i: 165985: 686ad9bf2a287f25098a1073c2a47d4184375d94 165983: 0c575d892d84b5e2f10d7cba57fc1033de655a00 v: v3 --- [refs] | 2 +- trunk/drivers/gpu/drm/i915/intel_display.c | 7 +++++-- 2 files changed, 6 insertions(+), 3 deletions(-) diff --git a/[refs] b/[refs] index d5b917c2e4a2..3c221f1ff8fb 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: e270846fa7c350712553d767e61cf8b3bbfbd58a +refs/heads/master: bb66c5122b4300b475b585fffb811311f39f5431 diff --git a/trunk/drivers/gpu/drm/i915/intel_display.c b/trunk/drivers/gpu/drm/i915/intel_display.c index 155719ff99d1..cb5305ccb15c 100644 --- a/trunk/drivers/gpu/drm/i915/intel_display.c +++ b/trunk/drivers/gpu/drm/i915/intel_display.c @@ -2652,9 +2652,12 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc, udelay(150); if (IS_I965G(dev) && !IS_IGDNG(dev)) { - sdvo_pixel_multiply = adjusted_mode->clock / mode->clock; - I915_WRITE(dpll_md_reg, (0 << DPLL_MD_UDI_DIVIDER_SHIFT) | + if (is_sdvo) { + sdvo_pixel_multiply = adjusted_mode->clock / mode->clock; + I915_WRITE(dpll_md_reg, (0 << DPLL_MD_UDI_DIVIDER_SHIFT) | ((sdvo_pixel_multiply - 1) << DPLL_MD_UDI_MULTIPLIER_SHIFT)); + } else + I915_WRITE(dpll_md_reg, 0); } else { /* write it again -- the BIOS does, after all */ I915_WRITE(dpll_reg, dpll);