From fbb511dc57cc12b67ce5988be6d5bcae4067a2bf Mon Sep 17 00:00:00 2001 From: Grant Grundler Date: Thu, 17 Nov 2005 16:26:20 -0500 Subject: [PATCH] --- yaml --- r: 14449 b: refs/heads/master c: 3f902886a81c6d4e6c399760936b645b5c7a7342 h: refs/heads/master i: 14447: c1aedc474ede335c4946b941d29d10bb378ec0fc v: v3 --- [refs] | 2 +- trunk/arch/parisc/kernel/irq.c | 13 ++++++------- 2 files changed, 7 insertions(+), 8 deletions(-) diff --git a/[refs] b/[refs] index bc702fde0005..d5e516062259 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 9a8b4584065dd241d6c2bf818e349986bd900b8e +refs/heads/master: 3f902886a81c6d4e6c399760936b645b5c7a7342 diff --git a/trunk/arch/parisc/kernel/irq.c b/trunk/arch/parisc/kernel/irq.c index f7ae2bcd49a5..21a9c5ad580b 100644 --- a/trunk/arch/parisc/kernel/irq.c +++ b/trunk/arch/parisc/kernel/irq.c @@ -250,10 +250,11 @@ void do_cpu_irq_mask(struct pt_regs *regs) irq_enter(); /* - * Only allow interrupt processing to be interrupted by the - * timer tick + * Don't allow TIMER or IPI nested interrupts. + * Allowing any single interrupt to nest can lead to that CPU + * handling interrupts with all enabled interrupts unmasked. */ - set_eiem(EIEM_MASK(TIMER_IRQ)); + set_eiem(0UL); /* 1) only process IRQs that are enabled/unmasked (cpu_eiem) * 2) We loop here on EIRR contents in order to avoid @@ -267,9 +268,6 @@ void do_cpu_irq_mask(struct pt_regs *regs) if (!eirr_val) break; - if (eirr_val & EIEM_MASK(TIMER_IRQ)) - set_eiem(0); - mtctl(eirr_val, 23); /* reset bits we are going to process */ /* Work our way from MSb to LSb...same order we alloc EIRs */ @@ -283,7 +281,8 @@ void do_cpu_irq_mask(struct pt_regs *regs) __do_IRQ(irq, regs); } } - set_eiem(cpu_eiem); + + set_eiem(cpu_eiem); /* restore original mask */ irq_exit(); }