From fbdf31d4ec9b90d4cf562a29f426d23b38538a3e Mon Sep 17 00:00:00 2001 From: Florian Tobias Schandinat Date: Mon, 21 Mar 2011 13:28:26 +0000 Subject: [PATCH] --- yaml --- r: 247848 b: refs/heads/master c: eb0536c5e2815e3e38ed2b2f31401e114faec016 h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/drivers/video/via/chip.h | 6 + trunk/drivers/video/via/dvi.c | 160 +++++++++- trunk/drivers/video/via/dvi.h | 2 +- trunk/drivers/video/via/global.c | 4 + trunk/drivers/video/via/global.h | 2 + trunk/drivers/video/via/hw.c | 478 ++++++++--------------------- trunk/drivers/video/via/hw.h | 12 +- trunk/drivers/video/via/lcd.c | 16 +- trunk/drivers/video/via/lcd.h | 2 +- trunk/drivers/video/via/share.h | 9 +- trunk/drivers/video/via/viafbdev.c | 23 +- trunk/drivers/video/via/viafbdev.h | 4 + trunk/drivers/video/via/viamode.c | 21 +- 14 files changed, 361 insertions(+), 380 deletions(-) diff --git a/[refs] b/[refs] index b5b0fad9932e..0ea5a3acd03c 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 75ec72f8c53b9f981e68704432a2e425a01f79b7 +refs/heads/master: eb0536c5e2815e3e38ed2b2f31401e114faec016 diff --git a/trunk/drivers/video/via/chip.h b/trunk/drivers/video/via/chip.h index 3ebf20c06eef..29d70244a21f 100644 --- a/trunk/drivers/video/via/chip.h +++ b/trunk/drivers/video/via/chip.h @@ -137,11 +137,17 @@ struct chip_information { struct lvds_chip_information lvds_chip_info2; }; +struct crt_setting_information { + int iga_path; +}; + struct tmds_setting_information { int iga_path; int h_active; int v_active; int max_pixel_clock; + int max_hres; + int max_vres; }; struct lvds_setting_information { diff --git a/trunk/drivers/video/via/dvi.c b/trunk/drivers/video/via/dvi.c index b1f364745ca0..41ca198b5098 100644 --- a/trunk/drivers/video/via/dvi.c +++ b/trunk/drivers/video/via/dvi.c @@ -28,11 +28,17 @@ static int tmds_register_read_bytes(int index, u8 *buff, int buff_len); static void __devinit dvi_get_panel_size_from_DDCv1( struct tmds_chip_information *tmds_chip, struct tmds_setting_information *tmds_setting); +static void __devinit dvi_get_panel_size_from_DDCv2( + struct tmds_chip_information *tmds_chip, + struct tmds_setting_information *tmds_setting); static int viafb_dvi_query_EDID(void); -static inline bool check_tmds_chip(int device_id_subaddr, int device_id) +static int check_tmds_chip(int device_id_subaddr, int device_id) { - return tmds_register_read(device_id_subaddr) == device_id; + if (tmds_register_read(device_id_subaddr) == device_id) + return OK; + else + return FAIL; } void __devinit viafb_init_dvi_size(struct tmds_chip_information *tmds_chip, @@ -41,13 +47,22 @@ void __devinit viafb_init_dvi_size(struct tmds_chip_information *tmds_chip, DEBUG_MSG(KERN_INFO "viafb_init_dvi_size()\n"); viafb_dvi_sense(); - if (viafb_dvi_query_EDID() == 1) + switch (viafb_dvi_query_EDID()) { + case 1: dvi_get_panel_size_from_DDCv1(tmds_chip, tmds_setting); + break; + case 2: + dvi_get_panel_size_from_DDCv2(tmds_chip, tmds_setting); + break; + default: + printk(KERN_WARNING "viafb_init_dvi_size: DVI panel size undetected!\n"); + break; + } return; } -bool __devinit viafb_tmds_trasmitter_identify(void) +int __devinit viafb_tmds_trasmitter_identify(void) { unsigned char sr2a = 0, sr1e = 0, sr3e = 0; @@ -86,7 +101,7 @@ bool __devinit viafb_tmds_trasmitter_identify(void) viaparinfo->chip_info-> tmds_chip_info.tmds_chip_slave_addr = VT1632_TMDS_I2C_ADDR; viaparinfo->chip_info->tmds_chip_info.i2c_port = VIA_PORT_31; - if (check_tmds_chip(VT1632_DEVICE_ID_REG, VT1632_DEVICE_ID)) { + if (check_tmds_chip(VT1632_DEVICE_ID_REG, VT1632_DEVICE_ID) != FAIL) { /* * Currently only support 12bits,dual edge,add 24bits mode later */ @@ -97,10 +112,11 @@ bool __devinit viafb_tmds_trasmitter_identify(void) viaparinfo->chip_info->tmds_chip_info.tmds_chip_name); DEBUG_MSG(KERN_INFO "\n %2d", viaparinfo->chip_info->tmds_chip_info.i2c_port); - return true; + return OK; } else { viaparinfo->chip_info->tmds_chip_info.i2c_port = VIA_PORT_2C; - if (check_tmds_chip(VT1632_DEVICE_ID_REG, VT1632_DEVICE_ID)) { + if (check_tmds_chip(VT1632_DEVICE_ID_REG, VT1632_DEVICE_ID) + != FAIL) { tmds_register_write(0x08, 0x3b); DEBUG_MSG(KERN_INFO "\n VT1632 TMDS ! \n"); DEBUG_MSG(KERN_INFO "\n %2d", @@ -109,7 +125,7 @@ bool __devinit viafb_tmds_trasmitter_identify(void) DEBUG_MSG(KERN_INFO "\n %2d", viaparinfo->chip_info-> tmds_chip_info.i2c_port); - return true; + return OK; } } @@ -119,7 +135,7 @@ bool __devinit viafb_tmds_trasmitter_identify(void) ((viafb_display_hardware_layout == HW_LAYOUT_DVI_ONLY) || (viafb_display_hardware_layout == HW_LAYOUT_LCD_DVI))) { DEBUG_MSG(KERN_INFO "\n Integrated TMDS ! \n"); - return true; + return OK; } switch (viaparinfo->chip_info->gfx_chip_name) { @@ -143,7 +159,7 @@ bool __devinit viafb_tmds_trasmitter_identify(void) tmds_chip_info.tmds_chip_name = NON_TMDS_TRANSMITTER; viaparinfo->chip_info->tmds_chip_info. tmds_chip_slave_addr = VT1632_TMDS_I2C_ADDR; - return false; + return FAIL; } static void tmds_register_write(int index, u8 data) @@ -290,7 +306,12 @@ static int viafb_dvi_query_EDID(void) return EDID_VERSION_1; /* Found EDID1 Table */ } - return false; + data0 = (u8) tmds_register_read(0x00); + viaparinfo->chip_info->tmds_chip_info.tmds_chip_slave_addr = restore; + if (data0 == 0x20) + return EDID_VERSION_2; /* Found EDID2 Table */ + else + return false; } /* Get Panel Size Using EDID1 Table */ @@ -298,15 +319,50 @@ static void __devinit dvi_get_panel_size_from_DDCv1( struct tmds_chip_information *tmds_chip, struct tmds_setting_information *tmds_setting) { - int i, restore; + int i, max_h = 0, tmp, restore; + unsigned char rData; unsigned char EDID_DATA[18]; DEBUG_MSG(KERN_INFO "\n dvi_get_panel_size_from_DDCv1 \n"); restore = tmds_chip->tmds_chip_slave_addr; tmds_chip->tmds_chip_slave_addr = 0xA0; + + rData = tmds_register_read(0x23); + if (rData & 0x3C) + max_h = 640; + if (rData & 0xC0) + max_h = 720; + if (rData & 0x03) + max_h = 800; + + rData = tmds_register_read(0x24); + if (rData & 0xC0) + max_h = 800; + if (rData & 0x1E) + max_h = 1024; + if (rData & 0x01) + max_h = 1280; + for (i = 0x25; i < 0x6D; i++) { switch (i) { + case 0x26: + case 0x28: + case 0x2A: + case 0x2C: + case 0x2E: + case 0x30: + case 0x32: + case 0x34: + rData = tmds_register_read(i); + if (rData == 1) + break; + /* data = (data + 31) * 8 */ + tmp = (rData + 31) << 3; + if (tmp > max_h) + max_h = tmp; + break; + case 0x36: case 0x48: case 0x5A: @@ -327,11 +383,91 @@ static void __devinit dvi_get_panel_size_from_DDCv1( } } + tmds_setting->max_hres = max_h; + switch (max_h) { + case 640: + tmds_setting->max_vres = 480; + break; + case 800: + tmds_setting->max_vres = 600; + break; + case 1024: + tmds_setting->max_vres = 768; + break; + case 1280: + tmds_setting->max_vres = 1024; + break; + case 1400: + tmds_setting->max_vres = 1050; + break; + case 1440: + tmds_setting->max_vres = 1050; + break; + case 1600: + tmds_setting->max_vres = 1200; + break; + case 1920: + tmds_setting->max_vres = 1080; + break; + default: + DEBUG_MSG(KERN_INFO "Unknown panel size max resolution = %d ! " + "set default panel size.\n", max_h); + break; + } + DEBUG_MSG(KERN_INFO "DVI max pixelclock = %d\n", tmds_setting->max_pixel_clock); tmds_chip->tmds_chip_slave_addr = restore; } +/* Get Panel Size Using EDID2 Table */ +static void __devinit dvi_get_panel_size_from_DDCv2( + struct tmds_chip_information *tmds_chip, + struct tmds_setting_information *tmds_setting) +{ + int restore; + unsigned char R_Buffer[2]; + + DEBUG_MSG(KERN_INFO "\n dvi_get_panel_size_from_DDCv2 \n"); + + restore = tmds_chip->tmds_chip_slave_addr; + tmds_chip->tmds_chip_slave_addr = 0xA2; + + /* Horizontal: 0x76, 0x77 */ + tmds_register_read_bytes(0x76, R_Buffer, 2); + tmds_setting->max_hres = R_Buffer[0] + (R_Buffer[1] << 8); + + switch (tmds_setting->max_hres) { + case 640: + tmds_setting->max_vres = 480; + break; + case 800: + tmds_setting->max_vres = 600; + break; + case 1024: + tmds_setting->max_vres = 768; + break; + case 1280: + tmds_setting->max_vres = 1024; + break; + case 1400: + tmds_setting->max_vres = 1050; + break; + case 1440: + tmds_setting->max_vres = 1050; + break; + case 1600: + tmds_setting->max_vres = 1200; + break; + default: + DEBUG_MSG(KERN_INFO "Unknown panel size max resolution = %d! " + "set default panel size.\n", tmds_setting->max_hres); + break; + } + + tmds_chip->tmds_chip_slave_addr = restore; +} + /* If Disable DVI, turn off pad */ void viafb_dvi_disable(void) { diff --git a/trunk/drivers/video/via/dvi.h b/trunk/drivers/video/via/dvi.h index f473dd010977..2c525c0c1adb 100644 --- a/trunk/drivers/video/via/dvi.h +++ b/trunk/drivers/video/via/dvi.h @@ -56,7 +56,7 @@ int viafb_dvi_sense(void); void viafb_dvi_disable(void); void viafb_dvi_enable(void); -bool __devinit viafb_tmds_trasmitter_identify(void); +int __devinit viafb_tmds_trasmitter_identify(void); void __devinit viafb_init_dvi_size(struct tmds_chip_information *tmds_chip, struct tmds_setting_information *tmds_setting); void viafb_dvi_set_mode(struct VideoModeTable *videoMode, int mode_bpp, diff --git a/trunk/drivers/video/via/global.c b/trunk/drivers/video/via/global.c index e10d8249534c..1ee511b73307 100644 --- a/trunk/drivers/video/via/global.c +++ b/trunk/drivers/video/via/global.c @@ -40,6 +40,10 @@ int viafb_hotplug_Yres = 480; int viafb_hotplug_bpp = 32; int viafb_hotplug_refresh = 60; int viafb_primary_dev = None_Device; +unsigned int viafb_second_xres = 640; +unsigned int viafb_second_yres = 480; +unsigned int viafb_second_virtual_xres; +unsigned int viafb_second_virtual_yres; int viafb_lcd_panel_id = LCD_PANEL_ID_MAXIMUM + 1; struct fb_info *viafbinfo; struct fb_info *viafbinfo1; diff --git a/trunk/drivers/video/via/global.h b/trunk/drivers/video/via/global.h index ff969dc34593..38ef5ac66953 100644 --- a/trunk/drivers/video/via/global.h +++ b/trunk/drivers/video/via/global.h @@ -73,6 +73,8 @@ extern int viafb_hotplug_bpp; extern int viafb_hotplug_refresh; extern int viafb_primary_dev; +extern unsigned int viafb_second_xres; +extern unsigned int viafb_second_yres; extern int viafb_lcd_panel_id; #endif /* __GLOBAL_H__ */ diff --git a/trunk/drivers/video/via/hw.c b/trunk/drivers/video/via/hw.c index 3308f471b68a..063ff65fbea6 100644 --- a/trunk/drivers/video/via/hw.c +++ b/trunk/drivers/video/via/hw.c @@ -20,275 +20,82 @@ */ #include -#include #include "global.h" -static struct pll_config cle266_pll_config[] = { - {19, 4, 0}, - {26, 5, 0}, - {28, 5, 0}, - {31, 5, 0}, - {33, 5, 0}, - {55, 5, 0}, - {102, 5, 0}, - {53, 6, 0}, - {92, 6, 0}, - {98, 6, 0}, - {112, 6, 0}, - {41, 7, 0}, - {60, 7, 0}, - {99, 7, 0}, - {100, 7, 0}, - {83, 8, 0}, - {86, 8, 0}, - {108, 8, 0}, - {87, 9, 0}, - {118, 9, 0}, - {95, 12, 0}, - {115, 12, 0}, - {108, 13, 0}, - {83, 17, 0}, - {67, 20, 0}, - {86, 20, 0}, - {98, 20, 0}, - {121, 24, 0}, - {99, 29, 0}, - {33, 3, 1}, - {15, 4, 1}, - {23, 4, 1}, - {37, 5, 1}, - {83, 5, 1}, - {85, 5, 1}, - {94, 5, 1}, - {103, 5, 1}, - {109, 5, 1}, - {113, 5, 1}, - {121, 5, 1}, - {82, 6, 1}, - {31, 7, 1}, - {55, 7, 1}, - {84, 7, 1}, - {83, 8, 1}, - {76, 9, 1}, - {127, 9, 1}, - {33, 4, 2}, - {75, 4, 2}, - {119, 4, 2}, - {121, 4, 2}, - {91, 5, 2}, - {118, 5, 2}, - {83, 6, 2}, - {109, 6, 2}, - {90, 7, 2}, - {93, 2, 3}, - {53, 3, 3}, - {73, 4, 3}, - {89, 4, 3}, - {105, 4, 3}, - {117, 4, 3}, - {101, 5, 3}, - {121, 5, 3}, - {127, 5, 3}, - {99, 7, 3} +static struct pll_limit cle266_pll_limits[] = { + {19, 19, 4, 0}, + {26, 102, 5, 0}, + {53, 112, 6, 0}, + {41, 100, 7, 0}, + {83, 108, 8, 0}, + {87, 118, 9, 0}, + {95, 115, 12, 0}, + {108, 108, 13, 0}, + {83, 83, 17, 0}, + {67, 98, 20, 0}, + {121, 121, 24, 0}, + {99, 99, 29, 0}, + {33, 33, 3, 1}, + {15, 23, 4, 1}, + {37, 121, 5, 1}, + {82, 82, 6, 1}, + {31, 84, 7, 1}, + {83, 83, 8, 1}, + {76, 127, 9, 1}, + {33, 121, 4, 2}, + {91, 118, 5, 2}, + {83, 109, 6, 2}, + {90, 90, 7, 2}, + {93, 93, 2, 3}, + {53, 53, 3, 3}, + {73, 117, 4, 3}, + {101, 127, 5, 3}, + {99, 99, 7, 3} }; -static struct pll_config k800_pll_config[] = { - {22, 2, 0}, - {28, 3, 0}, - {81, 3, 1}, - {85, 3, 1}, - {98, 3, 1}, - {112, 3, 1}, - {86, 4, 1}, - {166, 4, 1}, - {109, 5, 1}, - {113, 5, 1}, - {121, 5, 1}, - {131, 5, 1}, - {143, 5, 1}, - {153, 5, 1}, - {66, 3, 2}, - {68, 3, 2}, - {95, 3, 2}, - {106, 3, 2}, - {116, 3, 2}, - {93, 4, 2}, - {119, 4, 2}, - {121, 4, 2}, - {133, 4, 2}, - {137, 4, 2}, - {117, 5, 2}, - {118, 5, 2}, - {120, 5, 2}, - {124, 5, 2}, - {132, 5, 2}, - {137, 5, 2}, - {141, 5, 2}, - {166, 5, 2}, - {170, 5, 2}, - {191, 5, 2}, - {206, 5, 2}, - {208, 5, 2}, - {30, 2, 3}, - {69, 3, 3}, - {82, 3, 3}, - {83, 3, 3}, - {109, 3, 3}, - {114, 3, 3}, - {125, 3, 3}, - {89, 4, 3}, - {103, 4, 3}, - {117, 4, 3}, - {126, 4, 3}, - {150, 4, 3}, - {161, 4, 3}, - {121, 5, 3}, - {127, 5, 3}, - {131, 5, 3}, - {134, 5, 3}, - {148, 5, 3}, - {169, 5, 3}, - {172, 5, 3}, - {182, 5, 3}, - {195, 5, 3}, - {196, 5, 3}, - {208, 5, 3}, - {66, 2, 4}, - {85, 3, 4}, - {141, 4, 4}, - {146, 4, 4}, - {161, 4, 4}, - {177, 5, 4} +static struct pll_limit k800_pll_limits[] = { + {22, 22, 2, 0}, + {28, 28, 3, 0}, + {81, 112, 3, 1}, + {86, 166, 4, 1}, + {109, 153, 5, 1}, + {66, 116, 3, 2}, + {93, 137, 4, 2}, + {117, 208, 5, 2}, + {30, 30, 2, 3}, + {69, 125, 3, 3}, + {89, 161, 4, 3}, + {121, 208, 5, 3}, + {66, 66, 2, 4}, + {85, 85, 3, 4}, + {141, 161, 4, 4}, + {177, 177, 5, 4} }; -static struct pll_config cx700_pll_config[] = { - {98, 3, 1}, - {86, 4, 1}, - {109, 5, 1}, - {110, 5, 1}, - {113, 5, 1}, - {121, 5, 1}, - {131, 5, 1}, - {135, 5, 1}, - {142, 5, 1}, - {143, 5, 1}, - {153, 5, 1}, - {187, 5, 1}, - {208, 5, 1}, - {68, 2, 2}, - {95, 3, 2}, - {116, 3, 2}, - {93, 4, 2}, - {119, 4, 2}, - {133, 4, 2}, - {137, 4, 2}, - {151, 4, 2}, - {166, 4, 2}, - {110, 5, 2}, - {112, 5, 2}, - {117, 5, 2}, - {118, 5, 2}, - {120, 5, 2}, - {132, 5, 2}, - {137, 5, 2}, - {141, 5, 2}, - {151, 5, 2}, - {166, 5, 2}, - {175, 5, 2}, - {191, 5, 2}, - {206, 5, 2}, - {174, 7, 2}, - {82, 3, 3}, - {109, 3, 3}, - {117, 4, 3}, - {150, 4, 3}, - {161, 4, 3}, - {112, 5, 3}, - {115, 5, 3}, - {121, 5, 3}, - {127, 5, 3}, - {129, 5, 3}, - {131, 5, 3}, - {134, 5, 3}, - {138, 5, 3}, - {148, 5, 3}, - {157, 5, 3}, - {169, 5, 3}, - {172, 5, 3}, - {190, 5, 3}, - {195, 5, 3}, - {196, 5, 3}, - {208, 5, 3}, - {141, 5, 4}, - {150, 5, 4}, - {166, 5, 4}, - {176, 5, 4}, - {177, 5, 4}, - {183, 5, 4}, - {202, 5, 4} +static struct pll_limit cx700_pll_limits[] = { + {98, 98, 3, 1}, + {86, 86, 4, 1}, + {109, 208, 5, 1}, + {68, 68, 2, 2}, + {95, 116, 3, 2}, + {93, 166, 4, 2}, + {110, 206, 5, 2}, + {174, 174, 7, 2}, + {82, 109, 3, 3}, + {117, 161, 4, 3}, + {112, 208, 5, 3}, + {141, 202, 5, 4} }; -static struct pll_config vx855_pll_config[] = { - {86, 4, 1}, - {108, 5, 1}, - {110, 5, 1}, - {113, 5, 1}, - {121, 5, 1}, - {131, 5, 1}, - {135, 5, 1}, - {142, 5, 1}, - {143, 5, 1}, - {153, 5, 1}, - {164, 5, 1}, - {187, 5, 1}, - {208, 5, 1}, - {110, 5, 2}, - {112, 5, 2}, - {117, 5, 2}, - {118, 5, 2}, - {124, 5, 2}, - {132, 5, 2}, - {137, 5, 2}, - {141, 5, 2}, - {149, 5, 2}, - {151, 5, 2}, - {159, 5, 2}, - {166, 5, 2}, - {167, 5, 2}, - {172, 5, 2}, - {189, 5, 2}, - {191, 5, 2}, - {194, 5, 2}, - {206, 5, 2}, - {208, 5, 2}, - {83, 3, 3}, - {88, 3, 3}, - {109, 3, 3}, - {112, 3, 3}, - {103, 4, 3}, - {105, 4, 3}, - {161, 4, 3}, - {112, 5, 3}, - {115, 5, 3}, - {121, 5, 3}, - {127, 5, 3}, - {134, 5, 3}, - {137, 5, 3}, - {148, 5, 3}, - {157, 5, 3}, - {169, 5, 3}, - {172, 5, 3}, - {182, 5, 3}, - {191, 5, 3}, - {195, 5, 3}, - {209, 5, 3}, - {142, 4, 4}, - {146, 4, 4}, - {161, 4, 4}, - {141, 5, 4}, - {150, 5, 4}, - {165, 5, 4}, - {176, 5, 4} +static struct pll_limit vx855_pll_limits[] = { + {86, 86, 4, 1}, + {108, 208, 5, 1}, + {110, 208, 5, 2}, + {83, 112, 3, 3}, + {103, 161, 4, 3}, + {112, 209, 5, 3}, + {142, 161, 4, 4}, + {141, 176, 5, 4} }; /* according to VIA Technologies these values are based on experiment */ @@ -309,42 +116,6 @@ static struct io_reg scaling_parameters[] = { {VIACR, CR87, 0xFF, 0x1F}, /* LCD Scaling Parameter 14 */ }; -static struct io_reg common_vga[] = { - {VIACR, CR07, 0x10, 0x10}, /* [0] vertical total (bit 8) - [1] vertical display end (bit 8) - [2] vertical retrace start (bit 8) - [3] start vertical blanking (bit 8) - [4] line compare (bit 8) - [5] vertical total (bit 9) - [6] vertical display end (bit 9) - [7] vertical retrace start (bit 9) */ - {VIACR, CR08, 0xFF, 0x00}, /* [0-4] preset row scan - [5-6] byte panning */ - {VIACR, CR09, 0xDF, 0x40}, /* [0-4] max scan line - [5] start vertical blanking (bit 9) - [6] line compare (bit 9) - [7] scan doubling */ - {VIACR, CR0A, 0xFF, 0x1E}, /* [0-4] cursor start - [5] cursor disable */ - {VIACR, CR0B, 0xFF, 0x00}, /* [0-4] cursor end - [5-6] cursor skew */ - {VIACR, CR0E, 0xFF, 0x00}, /* [0-7] cursor location (high) */ - {VIACR, CR0F, 0xFF, 0x00}, /* [0-7] cursor location (low) */ - {VIACR, CR11, 0xF0, 0x80}, /* [0-3] vertical retrace end - [6] memory refresh bandwidth - [7] CRTC register protect enable */ - {VIACR, CR14, 0xFF, 0x00}, /* [0-4] underline location - [5] divide memory address clock by 4 - [6] double word addressing */ - {VIACR, CR17, 0xFF, 0x63}, /* [0-1] mapping of display address 13-14 - [2] divide scan line clock by 2 - [3] divide memory address clock by 2 - [5] address wrap - [6] byte mode select - [7] sync enable */ - {VIACR, CR18, 0xFF, 0xFF}, /* [0-7] line compare */ -}; - static struct fifo_depth_select display_fifo_depth_reg = { /* IGA1 FIFO Depth_Select */ {IGA1_FIFO_DEPTH_SELECT_REG_NUM, {{SR17, 0, 7} } }, @@ -807,14 +578,13 @@ static u32 get_lcd_devices(int output_interface) /*Set IGA path for each device*/ void viafb_set_iga_path(void) { - int crt_iga_path = 0; if (viafb_SAMM_ON == 1) { if (viafb_CRT_ON) { if (viafb_primary_dev == CRT_Device) - crt_iga_path = IGA1; + viaparinfo->crt_setting_info->iga_path = IGA1; else - crt_iga_path = IGA2; + viaparinfo->crt_setting_info->iga_path = IGA2; } if (viafb_DVI_ON) { @@ -831,7 +601,8 @@ void viafb_set_iga_path(void) UNICHROME_CLE266)) { viaparinfo-> lvds_setting_info->iga_path = IGA2; - crt_iga_path = IGA1; + viaparinfo-> + crt_setting_info->iga_path = IGA1; viaparinfo-> tmds_setting_info->iga_path = IGA1; } else @@ -851,10 +622,10 @@ void viafb_set_iga_path(void) viafb_SAMM_ON = 0; if (viafb_CRT_ON && viafb_LCD_ON) { - crt_iga_path = IGA1; + viaparinfo->crt_setting_info->iga_path = IGA1; viaparinfo->lvds_setting_info->iga_path = IGA2; } else if (viafb_CRT_ON && viafb_DVI_ON) { - crt_iga_path = IGA1; + viaparinfo->crt_setting_info->iga_path = IGA1; viaparinfo->tmds_setting_info->iga_path = IGA2; } else if (viafb_LCD_ON && viafb_DVI_ON) { viaparinfo->tmds_setting_info->iga_path = IGA1; @@ -863,7 +634,7 @@ void viafb_set_iga_path(void) viaparinfo->lvds_setting_info->iga_path = IGA2; viaparinfo->lvds_setting_info2->iga_path = IGA2; } else if (viafb_CRT_ON) { - crt_iga_path = IGA1; + viaparinfo->crt_setting_info->iga_path = IGA1; } else if (viafb_LCD_ON) { viaparinfo->lvds_setting_info->iga_path = IGA2; } else if (viafb_DVI_ON) { @@ -874,7 +645,7 @@ void viafb_set_iga_path(void) viaparinfo->shared->iga1_devices = 0; viaparinfo->shared->iga2_devices = 0; if (viafb_CRT_ON) { - if (crt_iga_path == IGA1) + if (viaparinfo->crt_setting_info->iga_path == IGA1) viaparinfo->shared->iga1_devices |= VIA_CRT; else viaparinfo->shared->iga2_devices |= VIA_CRT; @@ -912,10 +683,6 @@ void viafb_set_iga_path(void) viaparinfo->chip_info-> lvds_chip_info2.output_interface); } - - /* looks like the OLPC has its display wired to DVP1 and LVDS2 */ - if (machine_is_olpc()) - viaparinfo->shared->iga2_devices = VIA_DVP1 | VIA_LVDS2; } static void set_color_register(u8 index, u8 red, u8 green, u8 blue) @@ -1203,17 +970,25 @@ void via_odev_to_seq(struct seq_file *m, u32 odev) static void load_fix_bit_crtc_reg(void) { - viafb_unlock_crt(); - /* always set to 1 */ viafb_write_reg_mask(CR03, VIACR, 0x80, BIT7); /* line compare should set all bits = 1 (extend modes) */ + viafb_write_reg(CR18, VIACR, 0xff); + /* line compare should set all bits = 1 (extend modes) */ + viafb_write_reg_mask(CR07, VIACR, 0x10, BIT4); + /* line compare should set all bits = 1 (extend modes) */ + viafb_write_reg_mask(CR09, VIACR, 0x40, BIT6); + /* line compare should set all bits = 1 (extend modes) */ viafb_write_reg_mask(CR35, VIACR, 0x10, BIT4); /* line compare should set all bits = 1 (extend modes) */ viafb_write_reg_mask(CR33, VIACR, 0x06, BIT0 + BIT1 + BIT2); /*viafb_write_reg_mask(CR32, VIACR, 0x01, BIT0); */ - - viafb_lock_crt(); + /* extend mode always set to e3h */ + viafb_write_reg(CR17, VIACR, 0xe3); + /* extend mode always set to 0h */ + viafb_write_reg(CR08, VIACR, 0x00); + /* extend mode always set to 0h */ + viafb_write_reg(CR14, VIACR, 0x00); /* If K8M800, enable Prefetch Mode. */ if ((viaparinfo->chip_info->gfx_chip_name == UNICHROME_K800) @@ -1666,17 +1441,34 @@ static inline u32 get_pll_output_frequency(u32 ref_freq, struct pll_config pll) return get_pll_internal_frequency(ref_freq, pll)>>pll.rshift; } -static struct pll_config get_pll_config(struct pll_config *config, int size, +static struct pll_config get_pll_config(struct pll_limit *limits, int size, int clk) { - struct pll_config best = config[0]; + struct pll_config cur, up, down, best = {0, 1, 0}; const u32 f0 = 14318180; /* X1 frequency */ - int i; - - for (i = 1; i < size; i++) { - if (abs(get_pll_output_frequency(f0, config[i]) - clk) - < abs(get_pll_output_frequency(f0, best) - clk)) - best = config[i]; + int i, f; + + for (i = 0; i < size; i++) { + cur.rshift = limits[i].rshift; + cur.divisor = limits[i].divisor; + cur.multiplier = clk / ((f0 / cur.divisor)>>cur.rshift); + f = abs(get_pll_output_frequency(f0, cur) - clk); + up = down = cur; + up.multiplier++; + down.multiplier--; + if (abs(get_pll_output_frequency(f0, up) - clk) < f) + cur = up; + else if (abs(get_pll_output_frequency(f0, down) - clk) < f) + cur = down; + + if (cur.multiplier < limits[i].multiplier_min) + cur.multiplier = limits[i].multiplier_min; + else if (cur.multiplier > limits[i].multiplier_max) + cur.multiplier = limits[i].multiplier_max; + + f = abs(get_pll_output_frequency(f0, cur) - clk); + if (f < abs(get_pll_output_frequency(f0, best) - clk)) + best = cur; } return best; @@ -1689,14 +1481,14 @@ u32 viafb_get_clk_value(int clk) switch (viaparinfo->chip_info->gfx_chip_name) { case UNICHROME_CLE266: case UNICHROME_K400: - value = cle266_encode_pll(get_pll_config(cle266_pll_config, - ARRAY_SIZE(cle266_pll_config), clk)); + value = cle266_encode_pll(get_pll_config(cle266_pll_limits, + ARRAY_SIZE(cle266_pll_limits), clk)); break; case UNICHROME_K800: case UNICHROME_PM800: case UNICHROME_CN700: - value = k800_encode_pll(get_pll_config(k800_pll_config, - ARRAY_SIZE(k800_pll_config), clk)); + value = k800_encode_pll(get_pll_config(k800_pll_limits, + ARRAY_SIZE(k800_pll_limits), clk)); break; case UNICHROME_CX700: case UNICHROME_CN750: @@ -1704,13 +1496,13 @@ u32 viafb_get_clk_value(int clk) case UNICHROME_P4M890: case UNICHROME_P4M900: case UNICHROME_VX800: - value = k800_encode_pll(get_pll_config(cx700_pll_config, - ARRAY_SIZE(cx700_pll_config), clk)); + value = k800_encode_pll(get_pll_config(cx700_pll_limits, + ARRAY_SIZE(cx700_pll_limits), clk)); break; case UNICHROME_VX855: case UNICHROME_VX900: - value = vx855_encode_pll(get_pll_config(vx855_pll_config, - ARRAY_SIZE(vx855_pll_config), clk)); + value = vx855_encode_pll(get_pll_config(vx855_pll_limits, + ARRAY_SIZE(vx855_pll_limits), clk)); break; } @@ -2066,6 +1858,8 @@ void viafb_fill_crtc_timing(struct crt_mode_table *crt_table, v_addr = crt_reg.ver_addr; if (set_iga == IGA1) { viafb_unlock_crt(); + viafb_write_reg(CR09, VIACR, 0x00); /*initial CR09=0 */ + viafb_write_reg_mask(CR11, VIACR, 0x00, BIT4 + BIT5 + BIT6); viafb_write_reg_mask(CR17, VIACR, 0x00, BIT7); } @@ -2078,6 +1872,7 @@ void viafb_fill_crtc_timing(struct crt_mode_table *crt_table, break; } + load_fix_bit_crtc_reg(); viafb_lock_crt(); viafb_write_reg_mask(CR17, VIACR, 0x80, BIT7); viafb_load_fetch_count_reg(h_addr, bpp_byte, set_iga); @@ -2101,6 +1896,8 @@ void __devinit viafb_init_chip_info(int chip_type) init_tmds_chip_info(); init_lvds_chip_info(); + viaparinfo->crt_setting_info->iga_path = IGA1; + /*Set IGA path for each device */ viafb_set_iga_path(); @@ -2382,7 +2179,6 @@ int viafb_setmode(struct VideoModeTable *vmode_tbl, int video_bpp, outb(0x00, VIAAR); /* Write Common Setting for Video Mode */ - viafb_write_regx(common_vga, ARRAY_SIZE(common_vga)); switch (viaparinfo->chip_info->gfx_chip_name) { case UNICHROME_CLE266: viafb_write_regx(CLE266_ModeXregs, NUM_TOTAL_CLE266_ModeXregs); @@ -2429,6 +2225,9 @@ int viafb_setmode(struct VideoModeTable *vmode_tbl, int video_bpp, viafb_write_reg_mask(0x15, VIASR, 0xA2, 0xA2); + /* Write CRTC */ + viafb_fill_crtc_timing(crt_timing, vmode_tbl, video_bpp / 8, IGA1); + /* Write Graphic Controller */ for (i = 0; i < StdGR; i++) via_write_reg(VIAGR, i, VPIT.GR[i]); @@ -2458,7 +2257,6 @@ int viafb_setmode(struct VideoModeTable *vmode_tbl, int video_bpp, } } - load_fix_bit_crtc_reg(); via_set_primary_pitch(viafbinfo->fix.line_length); via_set_secondary_pitch(viafb_dual_fb ? viafbinfo1->fix.line_length : viafbinfo->fix.line_length); @@ -2478,15 +2276,15 @@ int viafb_setmode(struct VideoModeTable *vmode_tbl, int video_bpp, /* CRT set mode */ if (viafb_CRT_ON) { - if (viafb_SAMM_ON && - viaparinfo->shared->iga2_devices & VIA_CRT) { + if (viafb_SAMM_ON && (viaparinfo->crt_setting_info->iga_path == + IGA2)) { viafb_fill_crtc_timing(crt_timing1, vmode_tbl1, - video_bpp1 / 8, IGA2); + video_bpp1 / 8, + viaparinfo->crt_setting_info->iga_path); } else { viafb_fill_crtc_timing(crt_timing, vmode_tbl, video_bpp / 8, - (viaparinfo->shared->iga1_devices & VIA_CRT) - ? IGA1 : IGA2); + viaparinfo->crt_setting_info->iga_path); } /* Patch if set_hres is not 8 alignment (1366) to viafb_setmode @@ -2625,12 +2423,8 @@ int viafb_get_refresh(int hres, int vres, u32 long_refresh) best = &vmode->crtc[i]; } - if (abs(best->refresh_rate - long_refresh) > 3) { - if (hres == 1200 && vres == 900) - return 49; /* OLPC DCON only supports 50 Hz */ - else - return 60; - } + if (abs(best->refresh_rate - long_refresh) > 3) + return 60; return best->refresh_rate; } diff --git a/trunk/drivers/video/via/hw.h b/trunk/drivers/video/via/hw.h index 090d167863a4..63d8d37e157c 100644 --- a/trunk/drivers/video/via/hw.h +++ b/trunk/drivers/video/via/hw.h @@ -738,12 +738,11 @@ struct pll_config { u8 rshift; }; -struct pll_map { - u32 clk; - struct pll_config cle266_pll; - struct pll_config k800_pll; - struct pll_config cx700_pll; - struct pll_config vx855_pll; +struct pll_limit { + u16 multiplier_min; + u16 multiplier_max; + u8 divisor; + u8 rshift; }; struct rgbLUT { @@ -910,6 +909,7 @@ struct via_device_mapping { const char *name; }; +extern unsigned int viafb_second_virtual_xres; extern int viafb_SAMM_ON; extern int viafb_dual_fb; extern int viafb_LCD2_ON; diff --git a/trunk/drivers/video/via/lcd.c b/trunk/drivers/video/via/lcd.c index 6984046c6eed..64bc7e763103 100644 --- a/trunk/drivers/video/via/lcd.c +++ b/trunk/drivers/video/via/lcd.c @@ -48,6 +48,7 @@ static struct _lcd_scaling_factor lcd_scaling_factor_CLE = { {LCD_VER_SCALING_FACTOR_REG_NUM_CLE, {{CR78, 0, 7}, {CR79, 6, 7} } } }; +static int check_lvds_chip(int device_id_subaddr, int device_id); static bool lvds_identify_integratedlvds(void); static void __devinit fp_id_to_vindex(int panel_id); static int lvds_register_read(int index); @@ -83,9 +84,12 @@ static struct display_timing lcd_centering_timging(struct display_timing mode_crt_reg, struct display_timing panel_crt_reg); -static inline bool check_lvds_chip(int device_id_subaddr, int device_id) +static int check_lvds_chip(int device_id_subaddr, int device_id) { - return lvds_register_read(device_id_subaddr) == device_id; + if (lvds_register_read(device_id_subaddr) == device_id) + return OK; + else + return FAIL; } void __devinit viafb_init_lcd_size(void) @@ -146,7 +150,7 @@ static bool lvds_identify_integratedlvds(void) return true; } -bool __devinit viafb_lvds_trasmitter_identify(void) +int __devinit viafb_lvds_trasmitter_identify(void) { if (viafb_lvds_identify_vt1636(VIA_PORT_31)) { viaparinfo->chip_info->lvds_chip_info.i2c_port = VIA_PORT_31; @@ -171,20 +175,20 @@ bool __devinit viafb_lvds_trasmitter_identify(void) viaparinfo->chip_info->lvds_chip_info.lvds_chip_slave_addr = VT1631_LVDS_I2C_ADDR; - if (check_lvds_chip(VT1631_DEVICE_ID_REG, VT1631_DEVICE_ID)) { + if (check_lvds_chip(VT1631_DEVICE_ID_REG, VT1631_DEVICE_ID) != FAIL) { DEBUG_MSG(KERN_INFO "\n VT1631 LVDS ! \n"); DEBUG_MSG(KERN_INFO "\n %2d", viaparinfo->chip_info->lvds_chip_info.lvds_chip_name); DEBUG_MSG(KERN_INFO "\n %2d", viaparinfo->chip_info->lvds_chip_info.lvds_chip_name); - return true; + return OK; } viaparinfo->chip_info->lvds_chip_info.lvds_chip_name = NON_LVDS_TRANSMITTER; viaparinfo->chip_info->lvds_chip_info.lvds_chip_slave_addr = VT1631_LVDS_I2C_ADDR; - return false; + return FAIL; } static void __devinit fp_id_to_vindex(int panel_id) diff --git a/trunk/drivers/video/via/lcd.h b/trunk/drivers/video/via/lcd.h index 75f60a655b0e..c7909fe29550 100644 --- a/trunk/drivers/video/via/lcd.h +++ b/trunk/drivers/video/via/lcd.h @@ -79,7 +79,7 @@ void __devinit viafb_init_lvds_output_interface(struct lvds_chip_information void viafb_lcd_set_mode(struct crt_mode_table *mode_crt_table, struct lvds_setting_information *plvds_setting_info, struct lvds_chip_information *plvds_chip_info); -bool __devinit viafb_lvds_trasmitter_identify(void); +int __devinit viafb_lvds_trasmitter_identify(void); void viafb_init_lvds_output_interface(struct lvds_chip_information *plvds_chip_info, struct lvds_setting_information diff --git a/trunk/drivers/video/via/share.h b/trunk/drivers/video/via/share.h index 8b93e2f6fea2..4b7831f0d012 100644 --- a/trunk/drivers/video/via/share.h +++ b/trunk/drivers/video/via/share.h @@ -22,6 +22,14 @@ #ifndef __SHARE_H__ #define __SHARE_H__ +/* Define Return Value */ +#define FAIL -1 +#define OK 1 + +#ifndef NULL +#define NULL 0 +#endif + /* Define Bit Field */ #define BIT0 0x01 #define BIT1 0x02 @@ -282,7 +290,6 @@ #define HW_LAYOUT_LCD_EXTERNAL_LCD2 0x10 /* Definition Refresh Rate */ -#define REFRESH_49 49 #define REFRESH_50 50 #define REFRESH_60 60 #define REFRESH_75 75 diff --git a/trunk/drivers/video/via/viafbdev.c b/trunk/drivers/video/via/viafbdev.c index eace9a4257f4..9d9bb9b4ed3f 100644 --- a/trunk/drivers/video/via/viafbdev.c +++ b/trunk/drivers/video/via/viafbdev.c @@ -37,8 +37,6 @@ static char *viafb_mode1; static int viafb_bpp = 32; static int viafb_bpp1 = 32; -static unsigned int viafb_second_xres = 640; -static unsigned int viafb_second_yres = 480; static unsigned int viafb_second_offset; static int viafb_second_size; @@ -442,8 +440,8 @@ static int viafb_ioctl(struct fb_info *info, u_int cmd, u_long arg) if (viafb_SAMM_ON == 1) { u.viamode.xres_sec = viafb_second_xres; u.viamode.yres_sec = viafb_second_yres; - u.viamode.virtual_xres_sec = viafb_dual_fb ? viafbinfo1->var.xres_virtual : viafbinfo->var.xres_virtual; - u.viamode.virtual_yres_sec = viafb_dual_fb ? viafbinfo1->var.yres_virtual : viafbinfo->var.yres_virtual; + u.viamode.virtual_xres_sec = viafb_second_virtual_xres; + u.viamode.virtual_yres_sec = viafb_second_virtual_yres; u.viamode.refresh_sec = viafb_refresh1; u.viamode.bpp_sec = viafb_bpp1; } else { @@ -932,8 +930,10 @@ static int get_primary_device(void) /* Rule: device on iga1 path are the primary device. */ if (viafb_SAMM_ON) { if (viafb_CRT_ON) { - if (viaparinfo->shared->iga1_devices & VIA_CRT) { - DEBUG_MSG(KERN_INFO "CRT IGA Path:%d\n", IGA1); + if (viaparinfo->crt_setting_info->iga_path == IGA1) { + DEBUG_MSG(KERN_INFO "CRT IGA Path:%d\n", + viaparinfo-> + crt_setting_info->iga_path); primary_device = CRT_Device; } } @@ -1746,6 +1746,7 @@ int __devinit via_fb_pci_probe(struct viafb_dev *vdev) viaparinfo->lvds_setting_info = &viaparinfo->shared->lvds_setting_info; viaparinfo->lvds_setting_info2 = &viaparinfo->shared->lvds_setting_info2; + viaparinfo->crt_setting_info = &viaparinfo->shared->crt_setting_info; viaparinfo->chip_info = &viaparinfo->shared->chip_info; if (viafb_dual_fb) @@ -1792,10 +1793,14 @@ int __devinit via_fb_pci_probe(struct viafb_dev *vdev) parse_mode(viafb_mode, &default_xres, &default_yres); vmode_entry = viafb_get_mode(default_xres, default_yres); - if (viafb_SAMM_ON == 1) + if (viafb_SAMM_ON == 1) { parse_mode(viafb_mode1, &viafb_second_xres, &viafb_second_yres); + viafb_second_virtual_xres = viafb_second_xres; + viafb_second_virtual_yres = viafb_second_yres; + } + default_var.xres = default_xres; default_var.yres = default_yres; default_var.xres_virtual = default_xres; @@ -1839,8 +1844,8 @@ int __devinit via_fb_pci_probe(struct viafb_dev *vdev) default_var.xres = viafb_second_xres; default_var.yres = viafb_second_yres; - default_var.xres_virtual = viafb_second_xres; - default_var.yres_virtual = viafb_second_yres; + default_var.xres_virtual = viafb_second_virtual_xres; + default_var.yres_virtual = viafb_second_virtual_yres; default_var.bits_per_pixel = viafb_bpp1; viafb_fill_var_timing_info(&default_var, viafb_get_refresh( default_var.xres, default_var.yres, viafb_refresh1), diff --git a/trunk/drivers/video/via/viafbdev.h b/trunk/drivers/video/via/viafbdev.h index 59e40d1bd614..d66f963e930e 100644 --- a/trunk/drivers/video/via/viafbdev.h +++ b/trunk/drivers/video/via/viafbdev.h @@ -50,6 +50,7 @@ struct viafb_shared { /* All the information will be needed to set engine */ struct tmds_setting_information tmds_setting_info; + struct crt_setting_information crt_setting_info; struct lvds_setting_information lvds_setting_info; struct lvds_setting_information lvds_setting_info2; struct chip_information chip_info; @@ -78,11 +79,14 @@ struct viafb_par { /* All the information will be needed to set engine */ /* depreciated, use the ones in shared directly */ struct tmds_setting_information *tmds_setting_info; + struct crt_setting_information *crt_setting_info; struct lvds_setting_information *lvds_setting_info; struct lvds_setting_information *lvds_setting_info2; struct chip_information *chip_info; }; +extern unsigned int viafb_second_virtual_yres; +extern unsigned int viafb_second_virtual_xres; extern int viafb_SAMM_ON; extern int viafb_dual_fb; extern int viafb_LCD2_ON; diff --git a/trunk/drivers/video/via/viamode.c b/trunk/drivers/video/via/viamode.c index f84c9b03b6bb..8c5bc41ff6a4 100644 --- a/trunk/drivers/video/via/viamode.c +++ b/trunk/drivers/video/via/viamode.c @@ -30,6 +30,10 @@ struct io_reg CN400_ModeXregs[] = { {VIASR, SR10, 0xFF, 0x01}, {VIASR, SR1A, 0xFB, 0x08}, {VIASR, SR1E, 0x0F, 0x01}, {VIASR, SR2A, 0xFF, 0x00}, +{VIACR, CR0A, 0xFF, 0x1E}, /* Cursor Start */ +{VIACR, CR0B, 0xFF, 0x00}, /* Cursor End */ +{VIACR, CR0E, 0xFF, 0x00}, /* Cursor Location High */ +{VIACR, CR0F, 0xFF, 0x00}, /* Cursor Localtion Low */ {VIACR, CR32, 0xFF, 0x00}, {VIACR, CR33, 0xFF, 0x00}, {VIACR, CR35, 0xFF, 0x00}, @@ -121,6 +125,10 @@ struct io_reg KM400_ModeXregs[] = { {VIASR, SR2A, 0xFF, 0x00}, /* Power Management Control 5 */ {VIASR, SR2D, 0xFF, 0xFF}, /* Power Management Control 1 */ {VIASR, SR2E, 0xFF, 0xFF}, /* Power Management Control 2 */ + {VIACR, CR0A, 0xFF, 0x1E}, /* Cursor Start */ + {VIACR, CR0B, 0xFF, 0x00}, /* Cursor End */ + {VIACR, CR0E, 0xFF, 0x00}, /* Cursor Location High */ + {VIACR, CR0F, 0xFF, 0x00}, /* Cursor Localtion Low */ {VIACR, CR33, 0xFF, 0x00}, {VIACR, CR55, 0x80, 0x00}, {VIACR, CR5D, 0x80, 0x00}, @@ -154,6 +162,10 @@ struct io_reg CX700_ModeXregs[] = { {VIASR, SR10, 0xFF, 0x01}, {VIASR, SR1E, 0xFF, 0x01}, {VIASR, SR2A, 0xFF, 0x00}, {VIASR, SR2D, 0xFF, 0xFF}, /* VCK and LCK PLL power on. */ +{VIACR, CR0A, 0xFF, 0x1E}, /* Cursor Start */ +{VIACR, CR0B, 0xFF, 0x00}, /* Cursor End */ +{VIACR, CR0E, 0xFF, 0x00}, /* Cursor Location High */ +{VIACR, CR0F, 0xFF, 0x00}, /* Cursor Localtion Low */ {VIACR, CR32, 0xFF, 0x00}, {VIACR, CR33, 0xFF, 0x00}, {VIACR, CR35, 0xFF, 0x00}, @@ -193,6 +205,13 @@ struct io_reg VX855_ModeXregs[] = { {VIASR, SR58, 0xFF, 0x00}, {VIASR, SR59, 0xFF, 0x00}, {VIASR, SR2D, 0xFF, 0xFF}, /* VCK and LCK PLL power on. */ +{VIACR, CR09, 0xFF, 0x00}, /* Initial CR09=0*/ +{VIACR, CR11, 0x8F, 0x00}, /* IGA1 initial Vertical end */ +{VIACR, CR17, 0x7F, 0x00}, /* IGA1 CRT Mode control init */ +{VIACR, CR0A, 0xFF, 0x1E}, /* Cursor Start */ +{VIACR, CR0B, 0xFF, 0x00}, /* Cursor End */ +{VIACR, CR0E, 0xFF, 0x00}, /* Cursor Location High */ +{VIACR, CR0F, 0xFF, 0x00}, /* Cursor Localtion Low */ {VIACR, CR32, 0xFF, 0x00}, {VIACR, CR33, 0x7F, 0x00}, {VIACR, CR35, 0xFF, 0x00}, @@ -587,7 +606,7 @@ static struct crt_mode_table CRTM1200x720[] = { /* 1200x900 (DCON) */ static struct crt_mode_table DCON1200x900[] = { /* r_rate, hsp, vsp */ - {REFRESH_49, M1200X900_R60_HSP, M1200X900_R60_VSP, + {REFRESH_60, M1200X900_R60_HSP, M1200X900_R60_VSP, /* The correct htotal is 1240, but this doesn't raster on VX855. */ /* Via suggested changing to a multiple of 16, hence 1264. */ /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */