From fc1152b1e9b961c03999be1d6b81f894e884f812 Mon Sep 17 00:00:00 2001 From: Will Deacon Date: Fri, 24 Aug 2012 15:23:06 +0100 Subject: [PATCH] --- yaml --- r: 322629 b: refs/heads/master c: df547e08e800275a431e560a7f0a6b6f24ab2904 h: refs/heads/master i: 322627: 68312e73345201be34779d8c239e8e3a2908ca3a v: v3 --- [refs] | 2 +- trunk/arch/arm/include/asm/tlb.h | 4 ++++ 2 files changed, 5 insertions(+), 1 deletion(-) diff --git a/[refs] b/[refs] index 28a1b6c38201..d485ad5e0e40 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: ae3790b8a916429be5fa61da95992929e6b34d64 +refs/heads/master: df547e08e800275a431e560a7f0a6b6f24ab2904 diff --git a/trunk/arch/arm/include/asm/tlb.h b/trunk/arch/arm/include/asm/tlb.h index 314d4664eae7..99a19512ee26 100644 --- a/trunk/arch/arm/include/asm/tlb.h +++ b/trunk/arch/arm/include/asm/tlb.h @@ -199,6 +199,9 @@ static inline void __pte_free_tlb(struct mmu_gather *tlb, pgtable_t pte, { pgtable_page_dtor(pte); +#ifdef CONFIG_ARM_LPAE + tlb_add_flush(tlb, addr); +#else /* * With the classic ARM MMU, a pte page has two corresponding pmd * entries, each covering 1MB. @@ -206,6 +209,7 @@ static inline void __pte_free_tlb(struct mmu_gather *tlb, pgtable_t pte, addr &= PMD_MASK; tlb_add_flush(tlb, addr + SZ_1M - PAGE_SIZE); tlb_add_flush(tlb, addr + SZ_1M); +#endif tlb_remove_page(tlb, pte); }