From fd6a8508f90c1e1f7a989efd3f0c8be9c322867e Mon Sep 17 00:00:00 2001 From: Mike Frysinger Date: Wed, 20 Oct 2010 18:48:47 +0000 Subject: [PATCH] --- yaml --- r: 213730 b: refs/heads/master c: 5d868212c411b0e3d11006f58688b31ee2180d8c h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/arch/blackfin/mach-bf538/include/mach/defBF539.h | 1 + 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/[refs] b/[refs] index ccf6d598bdb7..ceaa11ab5457 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 39c999697bf43a97b877fa43cbc9c2a4d1a3a461 +refs/heads/master: 5d868212c411b0e3d11006f58688b31ee2180d8c diff --git a/trunk/arch/blackfin/mach-bf538/include/mach/defBF539.h b/trunk/arch/blackfin/mach-bf538/include/mach/defBF539.h index 72e17ec147ca..7a8ac5f44204 100644 --- a/trunk/arch/blackfin/mach-bf538/include/mach/defBF539.h +++ b/trunk/arch/blackfin/mach-bf538/include/mach/defBF539.h @@ -32,6 +32,7 @@ /* System Interrupt Controller (0xFFC00100 - 0xFFC001FF) */ #define SWRST 0xFFC00100 /* Software Reset Register (16-bit) */ #define SYSCR 0xFFC00104 /* System Configuration registe */ +#define SIC_RVECT 0xFFC00108 #define SIC_IMASK0 0xFFC0010C /* Interrupt Mask Register */ #define SIC_IAR0 0xFFC00110 /* Interrupt Assignment Register 0 */ #define SIC_IAR1 0xFFC00114 /* Interrupt Assignment Register 1 */