From fdca399d49089fe9249f22407fff6f50a348d801 Mon Sep 17 00:00:00 2001
From: Vojtech Pavlik <vojtech@suse.cz>
Date: Mon, 26 Jun 2006 13:58:23 +0200
Subject: [PATCH] --- yaml --- r: 30494 b: refs/heads/master c:
 f8bf3c65a962530821fa9a9b4bad43d8c7e13574 h: refs/heads/master v: v3

---
 [refs]                          | 2 +-
 trunk/arch/x86_64/kernel/apic.c | 7 +++----
 trunk/arch/x86_64/kernel/time.c | 4 ++--
 trunk/include/asm-x86_64/hpet.h | 2 +-
 4 files changed, 7 insertions(+), 8 deletions(-)

diff --git a/[refs] b/[refs]
index 20175f693214..122cb71bb72b 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 05ebb76109f302b949e745724bbf0f0634dba43f
+refs/heads/master: f8bf3c65a962530821fa9a9b4bad43d8c7e13574
diff --git a/trunk/arch/x86_64/kernel/apic.c b/trunk/arch/x86_64/kernel/apic.c
index 29ef99001e05..53fc17d894e8 100644
--- a/trunk/arch/x86_64/kernel/apic.c
+++ b/trunk/arch/x86_64/kernel/apic.c
@@ -983,7 +983,7 @@ void smp_apic_timer_interrupt(struct pt_regs *regs)
 }
 
 /*
- * oem_force_hpet_timer -- force HPET mode for some boxes.
+ * apic_is_clustered_box() -- Check if we can expect good TSC
  *
  * Thus far, the major user of this is IBM's Summit2 series:
  *
@@ -991,7 +991,7 @@ void smp_apic_timer_interrupt(struct pt_regs *regs)
  * multi-chassis. Use available data to take a good guess.
  * If in doubt, go HPET.
  */
-__cpuinit int oem_force_hpet_timer(void)
+__cpuinit int apic_is_clustered_box(void)
 {
 	int i, clusters, zeros;
 	unsigned id;
@@ -1022,8 +1022,7 @@ __cpuinit int oem_force_hpet_timer(void)
 	}
 
 	/*
-	 * If clusters > 2, then should be multi-chassis.  Return 1 for HPET.
-	 * Else return 0 to use TSC.
+	 * If clusters > 2, then should be multi-chassis.
 	 * May have to revisit this when multi-core + hyperthreaded CPUs come
 	 * out, but AFAIK this will work even for them.
 	 */
diff --git a/trunk/arch/x86_64/kernel/time.c b/trunk/arch/x86_64/kernel/time.c
index 7392570f975d..54b14e3ef66f 100644
--- a/trunk/arch/x86_64/kernel/time.c
+++ b/trunk/arch/x86_64/kernel/time.c
@@ -956,10 +956,10 @@ void __init time_init(void)
 __cpuinit int unsynchronized_tsc(void)
 {
 #ifdef CONFIG_SMP
-	if (oem_force_hpet_timer())
+	if (apic_is_clustered_box())
 		return 1;
  	/* Intel systems are normally all synchronized. Exceptions
- 	   are handled in the OEM check above. */
+ 	   are handled in the check above. */
  	if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL)
  		return 0;
 #endif
diff --git a/trunk/include/asm-x86_64/hpet.h b/trunk/include/asm-x86_64/hpet.h
index 18ff7ee9e774..b39098408b69 100644
--- a/trunk/include/asm-x86_64/hpet.h
+++ b/trunk/include/asm-x86_64/hpet.h
@@ -55,7 +55,7 @@
 
 extern int is_hpet_enabled(void);
 extern int hpet_rtc_timer_init(void);
-extern int oem_force_hpet_timer(void);
+extern int apic_is_clustered_box(void);
 
 extern int hpet_use_timer;