From fedffcfd4ee937c2cb80e15e22003049110576e8 Mon Sep 17 00:00:00 2001 From: Ben Skeggs Date: Mon, 31 May 2010 09:04:03 +1000 Subject: [PATCH] --- yaml --- r: 199690 b: refs/heads/master c: 8b281db596744a15b2abbfdbf655796c64e172ca h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/drivers/gpu/drm/nouveau/nouveau_mem.c | 3 ++- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/[refs] b/[refs] index 4f96a6f66719..d3afe102a261 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: becd214277ed41dc6f745f5f8db39d84c6c7ffc8 +refs/heads/master: 8b281db596744a15b2abbfdbf655796c64e172ca diff --git a/trunk/drivers/gpu/drm/nouveau/nouveau_mem.c b/trunk/drivers/gpu/drm/nouveau/nouveau_mem.c index 775a7017af64..c1fd42b0dad1 100644 --- a/trunk/drivers/gpu/drm/nouveau/nouveau_mem.c +++ b/trunk/drivers/gpu/drm/nouveau/nouveau_mem.c @@ -540,7 +540,8 @@ nouveau_mem_detect(struct drm_device *dev) dev_priv->vram_size = nv_rd32(dev, NV04_FIFO_DATA); dev_priv->vram_size &= NV10_FIFO_DATA_RAM_AMOUNT_MB_MASK; if (dev_priv->chipset == 0xaa || dev_priv->chipset == 0xac) - dev_priv->vram_sys_base = nv_rd32(dev, 0x100e10) << 12; + dev_priv->vram_sys_base = nv_rd32(dev, 0x100e10); + dev_priv->vram_sys_base <<= 12; } NV_INFO(dev, "Detected %dMiB VRAM\n", (int)(dev_priv->vram_size >> 20));