From ffac8b59dfbb52655a3a79037e06caa3dc8f26aa Mon Sep 17 00:00:00 2001 From: Olof Johansson Date: Thu, 8 Sep 2011 18:07:35 -0700 Subject: [PATCH] --- yaml --- r: 272642 b: refs/heads/master c: cf28cba0ab02ce3e41a7b2606423eb21f1841b7a h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/arch/arm/mach-tegra/dma.c | 14 +++++++++----- 2 files changed, 10 insertions(+), 6 deletions(-) diff --git a/[refs] b/[refs] index 27fd2f868e13..ab06e07dabb4 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 87c6e46a2c96ce2081070701237c58ed7eec94e7 +refs/heads/master: cf28cba0ab02ce3e41a7b2606423eb21f1841b7a diff --git a/trunk/arch/arm/mach-tegra/dma.c b/trunk/arch/arm/mach-tegra/dma.c index f4ef5eb317bd..c0cf967e47d3 100644 --- a/trunk/arch/arm/mach-tegra/dma.c +++ b/trunk/arch/arm/mach-tegra/dma.c @@ -105,13 +105,17 @@ #define NV_DMA_MAX_TRASFER_SIZE 0x10000 -const unsigned int ahb_addr_wrap_table[8] = { +static const unsigned int ahb_addr_wrap_table[8] = { 0, 32, 64, 128, 256, 512, 1024, 2048 }; -const unsigned int apb_addr_wrap_table[8] = {0, 1, 2, 4, 8, 16, 32, 64}; +static const unsigned int apb_addr_wrap_table[8] = { + 0, 1, 2, 4, 8, 16, 32, 64 +}; -const unsigned int bus_width_table[5] = {8, 16, 32, 64, 128}; +static const unsigned int bus_width_table[5] = { + 8, 16, 32, 64, 128 +}; #define TEGRA_DMA_NAME_SIZE 16 struct tegra_dma_channel { @@ -157,7 +161,7 @@ void tegra_dma_dequeue(struct tegra_dma_channel *ch) return; } -void tegra_dma_stop(struct tegra_dma_channel *ch) +static void tegra_dma_stop(struct tegra_dma_channel *ch) { u32 csr; u32 status; @@ -174,7 +178,7 @@ void tegra_dma_stop(struct tegra_dma_channel *ch) writel(status, ch->addr + APB_DMA_CHAN_STA); } -int tegra_dma_cancel(struct tegra_dma_channel *ch) +static int tegra_dma_cancel(struct tegra_dma_channel *ch) { u32 csr; unsigned long irq_flags;