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drm/i915/display/adlp: Optimize PSR2 power-savings in corner cases
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The Wa_14014971508 is required to fix scanout when a feature that i915
do not support is enabled and this feature is not planned to be enabled
for adlp.

Keeping this workaround enabled can badly hurt power-savings when
a full frame fetch is required(see psr2_sel_fetch_plane_state_supported()
and psr2_sel_fetch_pipe_state_supported()).

Here a example that could badly hurt power-savings, userspace does
a page flip to a rotated plane, so CONTINUOS_FULL_FRAME set.
But then for a whole 30 seconds nothing in the screen requires updates
but because CONTINUOS_FULL_FRAME is set, it will not go into DC5/DC6.

Reverting Wa_14014971508 fixes that, as only a single frame will be
sent and then display can go to DC5/DC6 for those 30 seconds of
idleness.

BSpec: 54369
Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210930001409.254817-6-jose.souza@intel.com
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José Roberto de Souza committed Sep 30, 2021
1 parent ef39826 commit 1163649
Showing 1 changed file with 3 additions and 8 deletions.
11 changes: 3 additions & 8 deletions drivers/gpu/drm/i915/display/intel_psr.c
Original file line number Diff line number Diff line change
Expand Up @@ -1503,15 +1503,10 @@ static void psr2_man_trk_ctl_calc(struct intel_crtc_state *crtc_state,

if (full_update) {
/*
* Wa_14014971508:adlp
* SINGLE_FULL_FRAME bit is not hold in register so can not be
* restored by DMC, so using CONTINUOS_FULL_FRAME to mimic that
* Not applying Wa_14014971508:adlp as we do not support the
* feature that requires this workaround.
*/
if (IS_ALDERLAKE_P(dev_priv))
val |= ADLP_PSR2_MAN_TRK_CTL_SF_CONTINUOS_FULL_FRAME;
else
val |= PSR2_MAN_TRK_CTL_SF_SINGLE_FULL_FRAME;

val |= man_trk_ctl_single_full_frame_bit_get(dev_priv);
goto exit;
}

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