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dt-bindings: display: bridge: Add binding for R-Car MIPI DSI/CSI-2 TX
The R-Car MIPI DSI/CSI-2 TX is embedded in the Renesas R-Car V3U SoC. It can operate in either DSI or CSI-2 mode, with up to four data lanes. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Reviewed-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> Acked-by: Sam Ravnborg <sam@ravnborg.org> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Laurent Pinchart
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Documentation/devicetree/bindings/display/bridge/renesas,dsi-csi2-tx.yaml
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) | ||
%YAML 1.2 | ||
--- | ||
$id: http://devicetree.org/schemas/display/bridge/renesas,dsi-csi2-tx.yaml# | ||
$schema: http://devicetree.org/meta-schemas/core.yaml# | ||
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title: Renesas R-Car MIPI DSI/CSI-2 Encoder | ||
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maintainers: | ||
- Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> | ||
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description: | | ||
This binding describes the MIPI DSI/CSI-2 encoder embedded in the Renesas | ||
R-Car V3U SoC. The encoder can operate in either DSI or CSI-2 mode, with up | ||
to four data lanes. | ||
properties: | ||
compatible: | ||
enum: | ||
- renesas,r8a779a0-dsi-csi2-tx # for V3U | ||
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reg: | ||
maxItems: 1 | ||
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clocks: | ||
items: | ||
- description: Functional clock | ||
- description: DSI (and CSI-2) functional clock | ||
- description: PLL reference clock | ||
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clock-names: | ||
items: | ||
- const: fck | ||
- const: dsi | ||
- const: pll | ||
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power-domains: | ||
maxItems: 1 | ||
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resets: | ||
maxItems: 1 | ||
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ports: | ||
$ref: /schemas/graph.yaml#/properties/ports | ||
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properties: | ||
port@0: | ||
$ref: /schemas/graph.yaml#/properties/port | ||
description: Parallel input port | ||
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port@1: | ||
$ref: /schemas/graph.yaml#/$defs/port-base | ||
unevaluatedProperties: false | ||
description: DSI/CSI-2 output port | ||
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properties: | ||
endpoint: | ||
$ref: /schemas/media/video-interfaces.yaml# | ||
unevaluatedProperties: false | ||
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properties: | ||
data-lanes: | ||
minItems: 1 | ||
maxItems: 4 | ||
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required: | ||
- data-lanes | ||
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required: | ||
- port@0 | ||
- port@1 | ||
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required: | ||
- compatible | ||
- reg | ||
- clocks | ||
- power-domains | ||
- resets | ||
- ports | ||
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additionalProperties: false | ||
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examples: | ||
- | | ||
#include <dt-bindings/clock/r8a779a0-cpg-mssr.h> | ||
#include <dt-bindings/power/r8a779a0-sysc.h> | ||
dsi0: dsi-encoder@fed80000 { | ||
compatible = "renesas,r8a779a0-dsi-csi2-tx"; | ||
reg = <0xfed80000 0x10000>; | ||
power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; | ||
clocks = <&cpg CPG_MOD 415>, | ||
<&cpg CPG_CORE R8A779A0_CLK_DSI>, | ||
<&cpg CPG_CORE R8A779A0_CLK_CP>; | ||
clock-names = "fck", "dsi", "pll"; | ||
resets = <&cpg 415>; | ||
ports { | ||
#address-cells = <1>; | ||
#size-cells = <0>; | ||
port@0 { | ||
reg = <0>; | ||
dsi0_in: endpoint { | ||
remote-endpoint = <&du_out_dsi0>; | ||
}; | ||
}; | ||
port@1 { | ||
reg = <1>; | ||
dsi0_out: endpoint { | ||
data-lanes = <1 2>; | ||
remote-endpoint = <&sn65dsi86_in>; | ||
}; | ||
}; | ||
}; | ||
}; | ||
... |
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