From 1fe6c70fec8fd8c823afee66467f85f028b0d22c Mon Sep 17 00:00:00 2001 From: Luo Jie Date: Fri, 3 Jan 2025 15:31:36 +0800 Subject: [PATCH] arm64: defconfig: Enable Qualcomm IPQ CMN PLL clock controller The CMN PLL hardware block is available in the Qualcomm IPQ SoC such as IPQ9574 and IPQ5332. It provides fixed rate output clocks to Ethernet related hardware blocks such as external Ethernet PHY or switch. This driver is initially being enabled for IPQ9574. All boards based on IPQ9574 SoC will require to include this driver in the build. This CMN PLL hardware block does not provide any other specific function on the IPQ SoC other than enabling output clocks to Ethernet related devices. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Luo Jie Link: https://lore.kernel.org/r/20250103-qcom_ipq_cmnpll-v8-3-c89fb4d4849d@quicinc.com Signed-off-by: Bjorn Andersson --- arch/arm64/configs/defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index b8883a22e219..74d174d47edb 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -1313,6 +1313,7 @@ CONFIG_QCOM_CLK_SMD_RPM=y CONFIG_QCOM_CLK_RPMH=y CONFIG_IPQ_APSS_6018=y CONFIG_IPQ_APSS_5018=y +CONFIG_IPQ_CMN_PLL=m CONFIG_IPQ_GCC_5018=y CONFIG_IPQ_GCC_5332=y CONFIG_IPQ_GCC_6018=y