From 1ffe6ddc5c64f88b1ec2e250327defb5446a7904 Mon Sep 17 00:00:00 2001 From: Conor Dooley Date: Thu, 15 Jun 2023 23:50:15 +0100 Subject: [PATCH] dt-bindings: riscv: cpus: switch to unevaluatedProperties: false To permit validation of cpu nodes, swap "additionalProperties: true" out for "unevaluatedProperties: false". Signed-off-by: Conor Dooley Reviewed-by: Rob Herring Acked-by: Palmer Dabbelt Link: https://lore.kernel.org/r/20230615-viper-stoic-1ff8efd7d51d@spud Signed-off-by: Palmer Dabbelt --- Documentation/devicetree/bindings/riscv/cpus.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/riscv/cpus.yaml b/Documentation/devicetree/bindings/riscv/cpus.yaml index e89a10d9c06bf..144da86718c1f 100644 --- a/Documentation/devicetree/bindings/riscv/cpus.yaml +++ b/Documentation/devicetree/bindings/riscv/cpus.yaml @@ -143,7 +143,7 @@ required: - riscv,isa - interrupt-controller -additionalProperties: true +unevaluatedProperties: false examples: - |