From 269a2257b4933b7eb012069d8344c6cf36a0563f Mon Sep 17 00:00:00 2001 From: Ankit Nautiyal Date: Wed, 7 Jul 2021 07:10:00 +0000 Subject: [PATCH] drm/i915: Fix HAS_LSPCON macro for platforms between GEN9 and GEN10 BugLink: https://bugs.launchpad.net/bugs/1934864 Legacy LSPCON chip from MCA and Parade is only used for platforms between GEN9 and GEN10. Fixing the HAS_LSPCON macro to reflect the same. Signed-off-by: Ankit Nautiyal Signed-off-by: Jani Nikula Link: https://patchwork.freedesktop.org/patch/msgid/20210208055554.24357-1-ankit.k.nautiyal@intel.com (cherry picked from commit 81637a6ede89b95b6ea7b2f8c594676881110890) Signed-off-by: Aaron Ma Acked-by: Krzysztof Kozlowski Acked-by: Tim Gardner Signed-off-by: Chia-Lin Kao (AceLan) --- drivers/gpu/drm/i915/i915_drv.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 7d76778e648b8..95ca6def12971 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -1741,7 +1741,7 @@ tgl_revids_get(struct drm_i915_private *dev_priv) #define HAS_GMCH(dev_priv) (INTEL_INFO(dev_priv)->display.has_gmch) -#define HAS_LSPCON(dev_priv) (INTEL_GEN(dev_priv) >= 9) +#define HAS_LSPCON(dev_priv) (IS_GEN_RANGE(dev_priv, 9, 10)) /* DPF == dynamic parity feature */ #define HAS_L3_DPF(dev_priv) (INTEL_INFO(dev_priv)->has_l3_dpf)