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ARM: dts: DRA7: Add common IPU and DSP nodes
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The DRA7xx family of SOCs have two IPUs and upto two DSP
processor subsystems in general. The IPU processor subsystem
contains dual-core ARM Cortex-M4 processors, while the DSP
processor subsystem is based on the TI's standard TMS320C66x
DSP CorePac core. The IPUs are very similar to those on OMAP5.

Two IPUs and one DSP processor subsystems is the most common
configuration. The processor device DT nodes have been added
for these processor subsystems, with the internal memories
added through 'reg' and 'reg-names' properties. The IPUs only
have an L2 RAM, whereas the DSPs have L1P, L1D and L2 RAM
memories.

NOTE:
1. The nodes do not have any mailboxes, timers or CMA regions
   assigned, they should be added in the respective board dts
   files.
2. The nodes haven been disabled by default and the enabling
   of these nodes is also left to the respective board dts
   files.

Signed-off-by: Suman Anna <s-anna@ti.com>
[t-kristo@ti.com: convert to ti-sysc support from legacy hwmod]
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Suman Anna authored and Tony Lindgren committed May 5, 2020
1 parent 5390130 commit 46ab823
Showing 1 changed file with 36 additions and 0 deletions.
36 changes: 36 additions & 0 deletions arch/arm/boot/dts/dra7.dtsi
Original file line number Diff line number Diff line change
Expand Up @@ -410,6 +410,42 @@
ti,hwmods = "dmm";
};

ipu1: ipu@58820000 {
compatible = "ti,dra7-ipu";
reg = <0x58820000 0x10000>;
reg-names = "l2ram";
iommus = <&mmu_ipu1>;
status = "disabled";
resets = <&prm_ipu 0>, <&prm_ipu 1>;
clocks = <&ipu1_clkctrl DRA7_IPU1_MMU_IPU1_CLKCTRL 0>;
firmware-name = "dra7-ipu1-fw.xem4";
};

ipu2: ipu@55020000 {
compatible = "ti,dra7-ipu";
reg = <0x55020000 0x10000>;
reg-names = "l2ram";
iommus = <&mmu_ipu2>;
status = "disabled";
resets = <&prm_core 0>, <&prm_core 1>;
clocks = <&ipu2_clkctrl DRA7_IPU2_MMU_IPU2_CLKCTRL 0>;
firmware-name = "dra7-ipu2-fw.xem4";
};

dsp1: dsp@40800000 {
compatible = "ti,dra7-dsp";
reg = <0x40800000 0x48000>,
<0x40e00000 0x8000>,
<0x40f00000 0x8000>;
reg-names = "l2ram", "l1pram", "l1dram";
ti,bootreg = <&scm_conf 0x55c 10>;
iommus = <&mmu0_dsp1>, <&mmu1_dsp1>;
status = "disabled";
resets = <&prm_dsp1 0>;
clocks = <&dsp1_clkctrl DRA7_DSP1_MMU0_DSP1_CLKCTRL 0>;
firmware-name = "dra7-dsp1-fw.xe66";
};

target-module@40d01000 {
compatible = "ti,sysc-omap2", "ti,sysc";
reg = <0x40d01000 0x4>,
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