From 4cab5dfd15b77cde2b965bbf71a86876a42684da Mon Sep 17 00:00:00 2001 From: Giovanni Cabiddu Date: Fri, 24 Dec 2021 11:05:32 +0000 Subject: [PATCH] crypto: qat - fix definition of ring reset results The ring reset result values are defined starting from 0x1 instead of 0. This causes out-of-tree drivers that support this message to understand that a ring reset failed even if the operation was successful. Fix by starting the definition of ring reset result values from 0. Fixes: 0bba03ce9739 ("crypto: qat - add PFVF support to enable the reset of ring pairs") Signed-off-by: Giovanni Cabiddu Reported-by: Adam Guerin Reviewed-by: Marco Chiappero Signed-off-by: Herbert Xu --- drivers/crypto/qat/qat_common/adf_pfvf_msg.h | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/crypto/qat/qat_common/adf_pfvf_msg.h b/drivers/crypto/qat/qat_common/adf_pfvf_msg.h index 86b0e7baa4d3e..9c37a26613920 100644 --- a/drivers/crypto/qat/qat_common/adf_pfvf_msg.h +++ b/drivers/crypto/qat/qat_common/adf_pfvf_msg.h @@ -139,10 +139,10 @@ enum pf2vf_compat_response { }; enum ring_reset_result { - RPRESET_SUCCESS = 0x01, - RPRESET_NOT_SUPPORTED = 0x02, - RPRESET_INVAL_BANK = 0x03, - RPRESET_TIMEOUT = 0x04, + RPRESET_SUCCESS = 0x00, + RPRESET_NOT_SUPPORTED = 0x01, + RPRESET_INVAL_BANK = 0x02, + RPRESET_TIMEOUT = 0x03, }; #define ADF_VF2PF_RNG_RESET_RP_MASK GENMASK(1, 0)