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thermal/drivers/mediatek: Add support for MT8365 SoC
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MT8365 is similar to the other SoCs supported by the driver. It has only
one bank and 3 actual sensors that can be multiplexed. There is another
one sensor that does not have usable data.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
Signed-off-by: Amjad Ouled-Ameur <aouledameur@baylibre.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20221018-up-i350-thermal-bringup-v9-3-55a1ae14af74@baylibre.com
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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Fabien Parent authored and Daniel Lezcano committed Mar 13, 2023
1 parent 33140e6 commit 56edffd
Showing 1 changed file with 68 additions and 0 deletions.
68 changes: 68 additions & 0 deletions drivers/thermal/mediatek/auxadc_thermal.c
Original file line number Diff line number Diff line change
@@ -31,6 +31,7 @@
#define AUXADC_CON2_V 0x010
#define AUXADC_DATA(channel) (0x14 + (channel) * 4)

#define APMIXED_SYS_TS_CON0 0x600
#define APMIXED_SYS_TS_CON1 0x604

/* Thermal Controller Registers */
@@ -281,6 +282,17 @@ enum mtk_thermal_version {
/* The calibration coefficient of sensor */
#define MT7986_CALIBRATION 165

/* MT8365 */
#define MT8365_TEMP_AUXADC_CHANNEL 11
#define MT8365_CALIBRATION 164
#define MT8365_NUM_CONTROLLER 1
#define MT8365_NUM_BANKS 1
#define MT8365_NUM_SENSORS 3
#define MT8365_NUM_SENSORS_PER_ZONE 3
#define MT8365_TS1 0
#define MT8365_TS2 1
#define MT8365_TS3 2

struct mtk_thermal;

struct thermal_bank_cfg {
@@ -435,6 +447,24 @@ static const int mt7986_mux_values[MT7986_NUM_SENSORS] = { 0, };
static const int mt7986_vts_index[MT7986_NUM_SENSORS] = { VTS1 };
static const int mt7986_tc_offset[MT7986_NUM_CONTROLLER] = { 0x0, };

/* MT8365 thermal sensor data */
static const int mt8365_bank_data[MT8365_NUM_SENSORS] = {
MT8365_TS1, MT8365_TS2, MT8365_TS3
};

static const int mt8365_msr[MT8365_NUM_SENSORS_PER_ZONE] = {
TEMP_MSR0, TEMP_MSR1, TEMP_MSR2
};

static const int mt8365_adcpnp[MT8365_NUM_SENSORS_PER_ZONE] = {
TEMP_ADCPNP0, TEMP_ADCPNP1, TEMP_ADCPNP2
};

static const int mt8365_mux_values[MT8365_NUM_SENSORS] = { 0, 1, 2 };
static const int mt8365_tc_offset[MT8365_NUM_CONTROLLER] = { 0 };

static const int mt8365_vts_index[MT8365_NUM_SENSORS] = { VTS1, VTS2, VTS3 };

/*
* The MT8173 thermal controller has four banks. Each bank can read up to
* four temperature sensors simultaneously. The MT8173 has a total of 5
@@ -509,6 +539,40 @@ static const struct mtk_thermal_data mt2701_thermal_data = {
.version = MTK_THERMAL_V1,
};

/*
* The MT8365 thermal controller has one bank, which can read up to
* four temperature sensors simultaneously. The MT8365 has a total of 3
* temperature sensors.
*
* The thermal core only gets the maximum temperature of this one bank,
* so the bank concept wouldn't be necessary here. However, the SVS (Smart
* Voltage Scaling) unit makes its decisions based on the same bank
* data.
*/
static const struct mtk_thermal_data mt8365_thermal_data = {
.auxadc_channel = MT8365_TEMP_AUXADC_CHANNEL,
.num_banks = MT8365_NUM_BANKS,
.num_sensors = MT8365_NUM_SENSORS,
.vts_index = mt8365_vts_index,
.cali_val = MT8365_CALIBRATION,
.num_controller = MT8365_NUM_CONTROLLER,
.controller_offset = mt8365_tc_offset,
.need_switch_bank = false,
.bank_data = {
{
.num_sensors = MT8365_NUM_SENSORS,
.sensors = mt8365_bank_data
},
},
.msr = mt8365_msr,
.adcpnp = mt8365_adcpnp,
.sensor_mux_values = mt8365_mux_values,
.version = MTK_THERMAL_V1,
.apmixed_buffer_ctl_reg = APMIXED_SYS_TS_CON0,
.apmixed_buffer_ctl_mask = (u32) ~GENMASK(29, 28),
.apmixed_buffer_ctl_set = 0,
};

/*
* The MT2712 thermal controller has one bank, which can read up to
* four temperature sensors simultaneously. The MT2712 has a total of 4
@@ -1080,6 +1144,10 @@ static const struct of_device_id mtk_thermal_of_match[] = {
{
.compatible = "mediatek,mt8183-thermal",
.data = (void *)&mt8183_thermal_data,
},
{
.compatible = "mediatek,mt8365-thermal",
.data = (void *)&mt8365_thermal_data,
}, {
},
};

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