From 86e39b94cd71a4987f9b98dd2a7d6c826e1c5c98 Mon Sep 17 00:00:00 2001 From: Breno Leitao Date: Fri, 13 Sep 2024 05:27:53 -0700 Subject: [PATCH 1/2] x86/bugs: Correct RSB terminology in Kconfig RSB stands for "Return Stack Buffer" in industry literature[1]. Update the kernel Kconfig to use this standard term instead of the current "Return-Speculation-Buffer". This change aligns kernel documentation with widely accepted terminology. The line length reduction triggers text reformatting, but no functional text is altered. [1] https://www.intel.com/content/www/us/en/developer/articles/technical/software-security-guidance/advisory-guidance/return-stack-buffer-underflow.html Signed-off-by: Breno Leitao Signed-off-by: Dave Hansen Acked-by: Dave Hansen Link: https://lore.kernel.org/all/20240913122754.249306-1-leitao%40debian.org --- arch/x86/Kconfig | 17 ++++++++--------- 1 file changed, 8 insertions(+), 9 deletions(-) diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index 2852fcd82cbd8..2cea5f275602b 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -2551,15 +2551,14 @@ config MITIGATION_CALL_DEPTH_TRACKING default y help Compile the kernel with call depth tracking to mitigate the Intel - SKL Return-Speculation-Buffer (RSB) underflow issue. The - mitigation is off by default and needs to be enabled on the - kernel command line via the retbleed=stuff option. For - non-affected systems the overhead of this option is marginal as - the call depth tracking is using run-time generated call thunks - in a compiler generated padding area and call patching. This - increases text size by ~5%. For non affected systems this space - is unused. On affected SKL systems this results in a significant - performance gain over the IBRS mitigation. + SKL Return-Stack-Buffer (RSB) underflow issue. The mitigation is off + by default and needs to be enabled on the kernel command line via the + retbleed=stuff option. For non-affected systems the overhead of this + option is marginal as the call depth tracking is using run-time + generated call thunks in a compiler generated padding area and call + patching. This increases text size by ~5%. For non affected systems + this space is unused. On affected SKL systems this results in a + significant performance gain over the IBRS mitigation. config CALL_THUNKS_DEBUG bool "Enable call thunks and call depth tracking debugging" From 62e724494db7954c47b4417769f1225cf98f4d77 Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Fri, 8 Nov 2024 17:30:10 +0200 Subject: [PATCH 2/2] x86/cpu: Make sure flag_is_changeable_p() is always being used When flag_is_changeable_p() is unused, it prevents kernel builds with clang, `make W=1` and CONFIG_WERROR=y: arch/x86/kernel/cpu/common.c:351:19: error: unused function 'flag_is_changeable_p' [-Werror,-Wunused-function] 351 | static inline int flag_is_changeable_p(u32 flag) | ^~~~~~~~~~~~~~~~~~~~ Fix this by moving core around to make sure flag_is_changeable_p() is always being used. See also commit 6863f5643dd7 ("kbuild: allow Clang to find unused static inline functions for W=1 build"). While at it, fix the argument type to be unsigned long along with the local variables, although it currently only runs in 32-bit cases. Besides that, makes it return boolean instead of int. This induces the change of the returning type of have_cpuid_p() to be boolean as well. Suggested-by: Dave Hansen Signed-off-by: Andy Shevchenko Signed-off-by: Dave Hansen Reviewed-by: H. Peter Anvin (Intel) Link: https://lore.kernel.org/all/20241108153105.1578186-1-andriy.shevchenko%40linux.intel.com --- arch/x86/include/asm/cpuid.h | 8 +++++--- arch/x86/kernel/cpu/common.c | 39 +++++++++++++++++------------------- 2 files changed, 23 insertions(+), 24 deletions(-) diff --git a/arch/x86/include/asm/cpuid.h b/arch/x86/include/asm/cpuid.h index ca4243318aadc..239b9ba5c398a 100644 --- a/arch/x86/include/asm/cpuid.h +++ b/arch/x86/include/asm/cpuid.h @@ -6,6 +6,8 @@ #ifndef _ASM_X86_CPUID_H #define _ASM_X86_CPUID_H +#include + #include struct cpuid_regs { @@ -20,11 +22,11 @@ enum cpuid_regs_idx { }; #ifdef CONFIG_X86_32 -extern int have_cpuid_p(void); +bool have_cpuid_p(void); #else -static inline int have_cpuid_p(void) +static inline bool have_cpuid_p(void) { - return 1; + return true; } #endif static inline void native_cpuid(unsigned int *eax, unsigned int *ebx, diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c index 07a34d7235057..e09ffdec8dc9d 100644 --- a/arch/x86/kernel/cpu/common.c +++ b/arch/x86/kernel/cpu/common.c @@ -275,21 +275,13 @@ static int __init x86_noinvpcid_setup(char *s) } early_param("noinvpcid", x86_noinvpcid_setup); -#ifdef CONFIG_X86_32 -static int cachesize_override = -1; -static int disable_x86_serial_nr = 1; - -static int __init cachesize_setup(char *str) -{ - get_option(&str, &cachesize_override); - return 1; -} -__setup("cachesize=", cachesize_setup); - /* Standard macro to see if a specific flag is changeable */ -static inline int flag_is_changeable_p(u32 flag) +static inline bool flag_is_changeable_p(unsigned long flag) { - u32 f1, f2; + unsigned long f1, f2; + + if (!IS_ENABLED(CONFIG_X86_32)) + return true; /* * Cyrix and IDT cpus allow disabling of CPUID @@ -312,11 +304,22 @@ static inline int flag_is_changeable_p(u32 flag) : "=&r" (f1), "=&r" (f2) : "ir" (flag)); - return ((f1^f2) & flag) != 0; + return (f1 ^ f2) & flag; } +#ifdef CONFIG_X86_32 +static int cachesize_override = -1; +static int disable_x86_serial_nr = 1; + +static int __init cachesize_setup(char *str) +{ + get_option(&str, &cachesize_override); + return 1; +} +__setup("cachesize=", cachesize_setup); + /* Probe for the CPUID instruction */ -int have_cpuid_p(void) +bool have_cpuid_p(void) { return flag_is_changeable_p(X86_EFLAGS_ID); } @@ -348,10 +351,6 @@ static int __init x86_serial_nr_setup(char *s) } __setup("serialnumber", x86_serial_nr_setup); #else -static inline int flag_is_changeable_p(u32 flag) -{ - return 1; -} static inline void squash_the_stupid_serial_number(struct cpuinfo_x86 *c) { } @@ -1087,7 +1086,6 @@ void get_cpu_address_sizes(struct cpuinfo_x86 *c) static void identify_cpu_without_cpuid(struct cpuinfo_x86 *c) { -#ifdef CONFIG_X86_32 int i; /* @@ -1108,7 +1106,6 @@ static void identify_cpu_without_cpuid(struct cpuinfo_x86 *c) break; } } -#endif } #define NO_SPECULATION BIT(0)