From 689f05586e7ea620c8fc1066c067809e52ffc2f3 Mon Sep 17 00:00:00 2001 From: Amelie Delaunay Date: Wed, 16 Oct 2024 14:39:53 +0200 Subject: [PATCH] dt-bindings: dma: stm32-dma3: prevent packing/unpacking mode When source data width/burst and destination data width/burst are different, data are packed or unpacked in DMA3 channel FIFO. Data are pushed out from DMA3 channel FIFO when the destination burst length (= data width * burst) is reached. If the channel is stopped before the transfer end, and if some bytes are packed/unpacked in the DMA3 channel FIFO, these bytes are lost. Indeed, DMA3 channel FIFO has no flush capability, only reset. To avoid potential bytes lost, pack/unpack must be prevented by setting memory data width/burst equal to peripheral data width/burst. Memory accesses will be penalized. But it is the only way to avoid bytes lost. Some devices (e.g. cyclic RX like UART) need this, so add the possibility to prevent pack/unpack feature, by setting bit 16 of the 'DMA transfer requirements' bit mask. Acked-by: Rob Herring (Arm) Signed-off-by: Amelie Delaunay Link: https://lore.kernel.org/r/20241016-dma3-mp25-updates-v3-1-8311fe6f228d@foss.st.com Signed-off-by: Vinod Koul --- Documentation/devicetree/bindings/dma/stm32/st,stm32-dma3.yaml | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/dma/stm32/st,stm32-dma3.yaml b/Documentation/devicetree/bindings/dma/stm32/st,stm32-dma3.yaml index 7fdc44b2e6467..5484848735f8a 100644 --- a/Documentation/devicetree/bindings/dma/stm32/st,stm32-dma3.yaml +++ b/Documentation/devicetree/bindings/dma/stm32/st,stm32-dma3.yaml @@ -96,6 +96,9 @@ properties: including the update of the LLI if any 0x3: at channel level, the transfer complete event is generated at the end of the last LLI + -bit 16: Prevent packing/unpacking mode + 0x0: pack/unpack enabled when source data width/burst != destination data width/burst + 0x1: memory data width/burst forced to peripheral data width/burst to prevent pack/unpack required: - compatible