From 6df2d9553e168fe32dd49873dd254a63ca913307 Mon Sep 17 00:00:00 2001 From: Bastien Curutchet Date: Fri, 3 Jan 2025 09:13:49 +0100 Subject: [PATCH] mtd: rawnand: davinci: Reduce polling interval in NAND_OP_WAITRDY_INSTR For each NAND_OP_WAITRDY_INSTR operation, the NANDFSR register is polled only once every 100 us to check for the EMA_WAIT pin. This isn't frequent enough and causes delays in NAND accesses. Set the polling interval to 5 us. It increases the page read speed reported by flash_speed by ~30% (~10% on page writes). Signed-off-by: Bastien Curutchet Signed-off-by: Miquel Raynal --- drivers/mtd/nand/raw/davinci_nand.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mtd/nand/raw/davinci_nand.c b/drivers/mtd/nand/raw/davinci_nand.c index 94fdc658ed14..ee87ca669c92 100644 --- a/drivers/mtd/nand/raw/davinci_nand.c +++ b/drivers/mtd/nand/raw/davinci_nand.c @@ -736,7 +736,7 @@ static int davinci_nand_exec_instr(struct davinci_nand_info *info, case NAND_OP_WAITRDY_INSTR: timeout_us = instr->ctx.waitrdy.timeout_ms * 1000; ret = readl_relaxed_poll_timeout(info->base + NANDFSR_OFFSET, - status, status & BIT(0), 100, + status, status & BIT(0), 5, timeout_us); if (ret) return ret;