From 9eec6ce36b5dc981327e9f58025d012e524687b4 Mon Sep 17 00:00:00 2001 From: Lijuan Gao Date: Mon, 4 Nov 2024 17:10:12 +0800 Subject: [PATCH 1/6] arm64: defconfig: enable clock controller, interconnect and pinctrl for QCS615 Enable clock controller, interconnect and pinctrl for Qualcomm QCS615 platform to boot to UART console. The serial engine depends on GCC, interconnect, and pinctrl. It is necessary to build them as built-in modules because the debug console must be registered before userspace is launched. The primary reason for this is that, for example, systemd opens /dev/console at launch (i.e., when the init process starts). Therefore, if we register the console after this, we will not receive console output from systemd. Signed-off-by: Lijuan Gao Reviewed-by: Dmitry Baryshkov Link: https://lore.kernel.org/r/20241104-add_initial_support_for_qcs615-v5-5-9dde8d7b80b0@quicinc.com Signed-off-by: Bjorn Andersson --- arch/arm64/configs/defconfig | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index c62831e615863..374cd8a6f4f6a 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -607,6 +607,7 @@ CONFIG_PINCTRL_MSM8996=y CONFIG_PINCTRL_MSM8998=y CONFIG_PINCTRL_QCM2290=y CONFIG_PINCTRL_QCS404=y +CONFIG_PINCTRL_QCS615=y CONFIG_PINCTRL_QDF2XXX=y CONFIG_PINCTRL_QDU1000=y CONFIG_PINCTRL_SA8775P=y @@ -1325,6 +1326,7 @@ CONFIG_MSM_MMCC_8998=m CONFIG_QCM_GCC_2290=y CONFIG_QCM_DISPCC_2290=m CONFIG_QCS_GCC_404=y +CONFIG_QCS_GCC_615=y CONFIG_SC_CAMCC_7280=m CONFIG_QDU_GCC_1000=y CONFIG_SC_CAMCC_8280XP=m @@ -1632,6 +1634,7 @@ CONFIG_INTERCONNECT_QCOM_MSM8996=y CONFIG_INTERCONNECT_QCOM_OSM_L3=m CONFIG_INTERCONNECT_QCOM_QCM2290=y CONFIG_INTERCONNECT_QCOM_QCS404=m +CONFIG_INTERCONNECT_QCOM_QCS615=y CONFIG_INTERCONNECT_QCOM_QDU1000=y CONFIG_INTERCONNECT_QCOM_SA8775P=y CONFIG_INTERCONNECT_QCOM_SC7180=y From 8592294dfc7b46c7b964f453d64e90e6c1137090 Mon Sep 17 00:00:00 2001 From: Taniya Das Date: Thu, 24 Oct 2024 23:22:55 +0530 Subject: [PATCH 2/6] arm64: defconfig: Enable sa8775p clock controllers Enable the SA8775P video, camera and display clock controllers to enable the video, camera and display functionalities on Qualcomm QCS9100 ride and ride rev3 boards. Signed-off-by: Taniya Das Reviewed-by: Dmitry Baryshkov Link: https://lore.kernel.org/r/20241024-defconfig_sa8775p_clock_controllers-v2-1-a9e1cdaed785@quicinc.com Signed-off-by: Bjorn Andersson --- arch/arm64/configs/defconfig | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index 374cd8a6f4f6a..e7b5cf399cdd2 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -1328,10 +1328,12 @@ CONFIG_QCM_DISPCC_2290=m CONFIG_QCS_GCC_404=y CONFIG_QCS_GCC_615=y CONFIG_SC_CAMCC_7280=m +CONFIG_SA_CAMCC_8775P=m CONFIG_QDU_GCC_1000=y CONFIG_SC_CAMCC_8280XP=m CONFIG_SC_DISPCC_7280=m CONFIG_SC_DISPCC_8280XP=m +CONFIG_SA_DISPCC_8775P=m CONFIG_SA_GCC_8775P=y CONFIG_SA_GPUCC_8775P=m CONFIG_SC_GCC_7180=y @@ -1370,6 +1372,7 @@ CONFIG_SM_GPUCC_8550=m CONFIG_SM_GPUCC_8650=m CONFIG_SM_TCSRCC_8550=y CONFIG_SM_TCSRCC_8650=y +CONFIG_SA_VIDEOCC_8775P=m CONFIG_SM_VIDEOCC_8250=y CONFIG_QCOM_HFPLL=y CONFIG_CLK_GFM_LPASS_SM8250=m From 57039a27658a1e7ca1c60fe7e381092c609e4bc7 Mon Sep 17 00:00:00 2001 From: Jingyi Wang Date: Tue, 3 Dec 2024 17:27:13 +0800 Subject: [PATCH 3/6] arm64: defconfig: enable clock controller, interconnect and pinctrl for QCS8300 Enable clock controller, interconnect and pinctrl for Qualcomm QCS8300 platform to boot QCS8300 RIDE board to UART console. The serial engine depends on gcc, interconnect and pinctrl. Since the serial console driver is only available as built-in, so these configs needs be built-in for the UART device to probe and register the console. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Jingyi Wang Link: https://lore.kernel.org/r/20241203-qcs8300_initial_dtsi-v4-2-d7c953484024@quicinc.com Signed-off-by: Bjorn Andersson --- arch/arm64/configs/defconfig | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index e7b5cf399cdd2..2554f5ec1fb3f 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -608,6 +608,7 @@ CONFIG_PINCTRL_MSM8998=y CONFIG_PINCTRL_QCM2290=y CONFIG_PINCTRL_QCS404=y CONFIG_PINCTRL_QCS615=y +CONFIG_PINCTRL_QCS8300=y CONFIG_PINCTRL_QDF2XXX=y CONFIG_PINCTRL_QDU1000=y CONFIG_PINCTRL_SA8775P=y @@ -1327,6 +1328,7 @@ CONFIG_QCM_GCC_2290=y CONFIG_QCM_DISPCC_2290=m CONFIG_QCS_GCC_404=y CONFIG_QCS_GCC_615=y +CONFIG_QCS_GCC_8300=y CONFIG_SC_CAMCC_7280=m CONFIG_SA_CAMCC_8775P=m CONFIG_QDU_GCC_1000=y @@ -1638,6 +1640,7 @@ CONFIG_INTERCONNECT_QCOM_OSM_L3=m CONFIG_INTERCONNECT_QCOM_QCM2290=y CONFIG_INTERCONNECT_QCOM_QCS404=m CONFIG_INTERCONNECT_QCOM_QCS615=y +CONFIG_INTERCONNECT_QCOM_QCS8300=y CONFIG_INTERCONNECT_QCOM_QDU1000=y CONFIG_INTERCONNECT_QCOM_SA8775P=y CONFIG_INTERCONNECT_QCOM_SC7180=y From 9be2923ff9641d6491b8ea43791382966505435f Mon Sep 17 00:00:00 2001 From: Ross Burton Date: Fri, 13 Dec 2024 16:12:58 +0000 Subject: [PATCH 4/6] arm64: defconfig: remove obsolete CONFIG_SM_DISPCC_8650 This option was removed from the Kconfig in commit 802b83205519 ("clk: qcom: fold dispcc-sm8650 info dispcc-sm8550") but it was not removed from the defconfig. Fixes: 802b83205519 ("clk: qcom: fold dispcc-sm8650 info dispcc-sm8550") Signed-off-by: Ross Burton Reviewed-by: Krzysztof Kozlowski Reviewed-by: Neil Armstrong Link: https://lore.kernel.org/r/20241213-clkmaster-v1-1-dcbf7fad37b1@arm.com Signed-off-by: Bjorn Andersson --- arch/arm64/configs/defconfig | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index 2554f5ec1fb3f..ac90b8fa1f8f2 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -1358,7 +1358,6 @@ CONFIG_SM_DISPCC_6115=m CONFIG_SM_DISPCC_8250=y CONFIG_SM_DISPCC_8450=m CONFIG_SM_DISPCC_8550=m -CONFIG_SM_DISPCC_8650=m CONFIG_SM_GCC_4450=y CONFIG_SM_GCC_6115=y CONFIG_SM_GCC_8350=y From 87be7b32e4847dfddbe44f6ea281afbabafd08d5 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Tue, 7 Jan 2025 16:54:52 +0100 Subject: [PATCH 5/6] arm64: defconfig: Enable basic Qualcomm SM8750 SoC drivers Enable necessary drivers for booting Qualcomm SM8750 based boards like MTP8750 and QRD8750. The clock controller (GCC), interconnect and pinctrl drivers are considered necessary for early boot debugging, e.g. via serial console, thus make them built-in. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Dmitry Baryshkov Link: https://lore.kernel.org/r/20250107155452.389154-1-krzysztof.kozlowski@linaro.org Signed-off-by: Bjorn Andersson --- arch/arm64/configs/defconfig | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index ac90b8fa1f8f2..b8883a22e219e 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -631,6 +631,7 @@ CONFIG_PINCTRL_SM8350=y CONFIG_PINCTRL_SM8450=y CONFIG_PINCTRL_SM8550=y CONFIG_PINCTRL_SM8650=y +CONFIG_PINCTRL_SM8750=y CONFIG_PINCTRL_X1E80100=y CONFIG_PINCTRL_QCOM_SPMI_PMIC=y CONFIG_PINCTRL_LPASS_LPI=m @@ -1358,12 +1359,14 @@ CONFIG_SM_DISPCC_6115=m CONFIG_SM_DISPCC_8250=y CONFIG_SM_DISPCC_8450=m CONFIG_SM_DISPCC_8550=m +CONFIG_SM_DISPCC_8750=m CONFIG_SM_GCC_4450=y CONFIG_SM_GCC_6115=y CONFIG_SM_GCC_8350=y CONFIG_SM_GCC_8450=y CONFIG_SM_GCC_8550=y CONFIG_SM_GCC_8650=y +CONFIG_SM_GCC_8750=y CONFIG_SM_GPUCC_6115=m CONFIG_SM_GPUCC_8150=y CONFIG_SM_GPUCC_8250=y @@ -1373,6 +1376,7 @@ CONFIG_SM_GPUCC_8550=m CONFIG_SM_GPUCC_8650=m CONFIG_SM_TCSRCC_8550=y CONFIG_SM_TCSRCC_8650=y +CONFIG_SM_TCSRCC_8750=m CONFIG_SA_VIDEOCC_8775P=m CONFIG_SM_VIDEOCC_8250=y CONFIG_QCOM_HFPLL=y @@ -1655,6 +1659,7 @@ CONFIG_INTERCONNECT_QCOM_SM8350=y CONFIG_INTERCONNECT_QCOM_SM8450=y CONFIG_INTERCONNECT_QCOM_SM8550=y CONFIG_INTERCONNECT_QCOM_SM8650=y +CONFIG_INTERCONNECT_QCOM_SM8750=y CONFIG_INTERCONNECT_QCOM_X1E80100=y CONFIG_COUNTER=m CONFIG_RZ_MTU3_CNT=m From 1fe6c70fec8fd8c823afee66467f85f028b0d22c Mon Sep 17 00:00:00 2001 From: Luo Jie Date: Fri, 3 Jan 2025 15:31:36 +0800 Subject: [PATCH 6/6] arm64: defconfig: Enable Qualcomm IPQ CMN PLL clock controller The CMN PLL hardware block is available in the Qualcomm IPQ SoC such as IPQ9574 and IPQ5332. It provides fixed rate output clocks to Ethernet related hardware blocks such as external Ethernet PHY or switch. This driver is initially being enabled for IPQ9574. All boards based on IPQ9574 SoC will require to include this driver in the build. This CMN PLL hardware block does not provide any other specific function on the IPQ SoC other than enabling output clocks to Ethernet related devices. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Luo Jie Link: https://lore.kernel.org/r/20250103-qcom_ipq_cmnpll-v8-3-c89fb4d4849d@quicinc.com Signed-off-by: Bjorn Andersson --- arch/arm64/configs/defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index b8883a22e219e..74d174d47edb6 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -1313,6 +1313,7 @@ CONFIG_QCOM_CLK_SMD_RPM=y CONFIG_QCOM_CLK_RPMH=y CONFIG_IPQ_APSS_6018=y CONFIG_IPQ_APSS_5018=y +CONFIG_IPQ_CMN_PLL=m CONFIG_IPQ_GCC_5018=y CONFIG_IPQ_GCC_5332=y CONFIG_IPQ_GCC_6018=y