From 8592294dfc7b46c7b964f453d64e90e6c1137090 Mon Sep 17 00:00:00 2001 From: Taniya Das Date: Thu, 24 Oct 2024 23:22:55 +0530 Subject: [PATCH] arm64: defconfig: Enable sa8775p clock controllers Enable the SA8775P video, camera and display clock controllers to enable the video, camera and display functionalities on Qualcomm QCS9100 ride and ride rev3 boards. Signed-off-by: Taniya Das Reviewed-by: Dmitry Baryshkov Link: https://lore.kernel.org/r/20241024-defconfig_sa8775p_clock_controllers-v2-1-a9e1cdaed785@quicinc.com Signed-off-by: Bjorn Andersson --- arch/arm64/configs/defconfig | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index 374cd8a6f4f6..e7b5cf399cdd 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -1328,10 +1328,12 @@ CONFIG_QCM_DISPCC_2290=m CONFIG_QCS_GCC_404=y CONFIG_QCS_GCC_615=y CONFIG_SC_CAMCC_7280=m +CONFIG_SA_CAMCC_8775P=m CONFIG_QDU_GCC_1000=y CONFIG_SC_CAMCC_8280XP=m CONFIG_SC_DISPCC_7280=m CONFIG_SC_DISPCC_8280XP=m +CONFIG_SA_DISPCC_8775P=m CONFIG_SA_GCC_8775P=y CONFIG_SA_GPUCC_8775P=m CONFIG_SC_GCC_7180=y @@ -1370,6 +1372,7 @@ CONFIG_SM_GPUCC_8550=m CONFIG_SM_GPUCC_8650=m CONFIG_SM_TCSRCC_8550=y CONFIG_SM_TCSRCC_8650=y +CONFIG_SA_VIDEOCC_8775P=m CONFIG_SM_VIDEOCC_8250=y CONFIG_QCOM_HFPLL=y CONFIG_CLK_GFM_LPASS_SM8250=m