From b75439c945b94dd8a2b645355bdb56f948052601 Mon Sep 17 00:00:00 2001 From: Pei Xiao Date: Wed, 27 Nov 2024 18:35:11 +0800 Subject: [PATCH 01/11] i3c: dw: Fix use-after-free in dw_i3c_master driver due to race condition In dw_i3c_common_probe, &master->hj_work is bound with dw_i3c_hj_work. And dw_i3c_master_irq_handler can call dw_i3c_master_irq_handle_ibis function to start the work. If we remove the module which will call dw_i3c_common_remove to make cleanup, it will free master->base through i3c_master_unregister while the work mentioned above will be used. The sequence of operations that may lead to a UAF bug is as follows: CPU0 CPU1 | dw_i3c_hj_work dw_i3c_common_remove | i3c_master_unregister(&master->base) | device_unregister(&master->dev) | device_release | //free master->base | | i3c_master_do_daa(&master->base) | //use master->base Fix it by ensuring that the work is canceled before proceeding with the cleanup in dw_i3c_common_remove. Fixes: 1dd728f5d4d4 ("i3c: master: Add driver for Synopsys DesignWare IP") Signed-off-by: Pei Xiao Acked-by: Mukesh Kumar Savaliya Link: https://lore.kernel.org/r/bfc49c9527be5b513e7ceafeba314ca40a5be4bc.1732703537.git.xiaopei01@kylinos.cn Signed-off-by: Alexandre Belloni --- drivers/i3c/master/dw-i3c-master.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/i3c/master/dw-i3c-master.c b/drivers/i3c/master/dw-i3c-master.c index 5b5c2e4bdc516..f1c564b4801ed 100644 --- a/drivers/i3c/master/dw-i3c-master.c +++ b/drivers/i3c/master/dw-i3c-master.c @@ -1647,6 +1647,7 @@ EXPORT_SYMBOL_GPL(dw_i3c_common_probe); void dw_i3c_common_remove(struct dw_i3c_master *master) { + cancel_work_sync(&master->hj_work); i3c_master_unregister(&master->base); pm_runtime_disable(master->dev); From 0d2c022ffa7ccbd5bed5b18eefbda7ef2df4f81f Mon Sep 17 00:00:00 2001 From: Wolfram Sang Date: Thu, 19 Dec 2024 23:03:37 +0100 Subject: [PATCH 02/11] i3c: fix kdoc parameter description for module_i3c_i2c_driver() A typo mentioned I3C when it should have been I2C. Signed-off-by: Wolfram Sang Reviewed-by: Geert Uytterhoeven Link: https://lore.kernel.org/r/20241219220338.10315-1-wsa+renesas@sang-engineering.com Signed-off-by: Alexandre Belloni --- include/linux/i3c/device.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/linux/i3c/device.h b/include/linux/i3c/device.h index 0a8a44ac2f027..b674f64d0822e 100644 --- a/include/linux/i3c/device.h +++ b/include/linux/i3c/device.h @@ -283,7 +283,7 @@ static inline void i3c_i2c_driver_unregister(struct i3c_driver *i3cdrv, * module_i3c_i2c_driver() - Register a module providing an I3C and an I2C * driver * @__i3cdrv: the I3C driver to register - * @__i2cdrv: the I3C driver to register + * @__i2cdrv: the I2C driver to register * * Provide generic init/exit functions that simply register/unregister an I3C * and an I2C driver. From ccdb2e0e3b00d13df90ac7a0524dd855173f1171 Mon Sep 17 00:00:00 2001 From: Jarkko Nikula Date: Tue, 31 Dec 2024 13:59:03 +0200 Subject: [PATCH 03/11] i3c: mipi-i3c-hci: Add Intel specific quirk to ring resuming MIPI I3C HCI on Intel hardware requires a quirk where ring needs to stop and set to run again after resuming the halted controller. This is not expected from the MIPI I3C HCI specification and is Intel specific. Add this quirk to generic aborted transfer handling and execute it only when ring is not in running state after a transfer error and attempted controller resume. This is the case on Intel hardware. It is not fully clear to me what is the ring running state in generic hardware in such case. I would expect if ring is not running, then stop request is a no-op and run request is either required or does the same what controller resume would do. Signed-off-by: Jarkko Nikula Link: https://lore.kernel.org/r/20241231115904.620052-1-jarkko.nikula@linux.intel.com Signed-off-by: Alexandre Belloni --- drivers/i3c/master/mipi-i3c-hci/dma.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/drivers/i3c/master/mipi-i3c-hci/dma.c b/drivers/i3c/master/mipi-i3c-hci/dma.c index e8e56a8d20573..491dfe70b6600 100644 --- a/drivers/i3c/master/mipi-i3c-hci/dma.c +++ b/drivers/i3c/master/mipi-i3c-hci/dma.c @@ -758,9 +758,26 @@ static bool hci_dma_irq_handler(struct i3c_hci *hci) complete(&rh->op_done); if (status & INTR_TRANSFER_ABORT) { + u32 ring_status; + dev_notice_ratelimited(&hci->master.dev, "ring %d: Transfer Aborted\n", i); mipi_i3c_hci_resume(hci); + ring_status = rh_reg_read(RING_STATUS); + if (!(ring_status & RING_STATUS_RUNNING) && + status & INTR_TRANSFER_COMPLETION && + status & INTR_TRANSFER_ERR) { + /* + * Ring stop followed by run is an Intel + * specific required quirk after resuming the + * halted controller. Do it only when the ring + * is not in running state after a transfer + * error. + */ + rh_reg_write(RING_CONTROL, RING_CTRL_ENABLE); + rh_reg_write(RING_CONTROL, RING_CTRL_ENABLE | + RING_CTRL_RUN_STOP); + } } if (status & INTR_WARN_INS_STOP_MODE) dev_warn_ratelimited(&hci->master.dev, From 30bb1ce71215645fa6a92f4fa8cbb8f58db68f12 Mon Sep 17 00:00:00 2001 From: Jarkko Nikula Date: Tue, 31 Dec 2024 13:59:04 +0200 Subject: [PATCH 04/11] i3c: mipi-i3c-hci: Add support for MIPI I3C HCI on PCI bus Add a glue code for the MIPI I3C HCI on PCI bus with Intel Panther Lake I3C controller PCI IDs. MIPI I3C HCI on Intel platforms has additional logic around the MIPI I3C HCI core logic. Those together create so called I3C slice on PCI bus. Intel specific initialization code does a reset cycle to the I3C slice before probing the MIPI I3C HCI part. Signed-off-by: Jarkko Nikula Link: https://lore.kernel.org/r/20241231115904.620052-2-jarkko.nikula@linux.intel.com Signed-off-by: Alexandre Belloni --- drivers/i3c/master/Kconfig | 11 ++ drivers/i3c/master/mipi-i3c-hci/Makefile | 1 + .../master/mipi-i3c-hci/mipi-i3c-hci-pci.c | 148 ++++++++++++++++++ 3 files changed, 160 insertions(+) create mode 100644 drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c diff --git a/drivers/i3c/master/Kconfig b/drivers/i3c/master/Kconfig index 90dee3ec55209..77da199c7413e 100644 --- a/drivers/i3c/master/Kconfig +++ b/drivers/i3c/master/Kconfig @@ -57,3 +57,14 @@ config MIPI_I3C_HCI This driver can also be built as a module. If so, the module will be called mipi-i3c-hci. + +config MIPI_I3C_HCI_PCI + tristate "MIPI I3C Host Controller Interface PCI support" + depends on MIPI_I3C_HCI + depends on PCI + help + Support for MIPI I3C Host Controller Interface compatible hardware + on the PCI bus. + + This driver can also be built as a module. If so, the module will be + called mipi-i3c-hci-pci. diff --git a/drivers/i3c/master/mipi-i3c-hci/Makefile b/drivers/i3c/master/mipi-i3c-hci/Makefile index 1f8cd5c48fdef..e3d3ef757035f 100644 --- a/drivers/i3c/master/mipi-i3c-hci/Makefile +++ b/drivers/i3c/master/mipi-i3c-hci/Makefile @@ -5,3 +5,4 @@ mipi-i3c-hci-y := core.o ext_caps.o pio.o dma.o \ cmd_v1.o cmd_v2.o \ dat_v1.o dct_v1.o \ hci_quirks.o +obj-$(CONFIG_MIPI_I3C_HCI_PCI) += mipi-i3c-hci-pci.o diff --git a/drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c b/drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c new file mode 100644 index 0000000000000..c6c3a3ec11eae --- /dev/null +++ b/drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c @@ -0,0 +1,148 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * PCI glue code for MIPI I3C HCI driver + * + * Copyright (C) 2024 Intel Corporation + * + * Author: Jarkko Nikula + */ +#include +#include +#include +#include +#include +#include + +struct mipi_i3c_hci_pci_info { + int (*init)(struct pci_dev *pci); +}; + +#define INTEL_PRIV_OFFSET 0x2b0 +#define INTEL_PRIV_SIZE 0x28 +#define INTEL_PRIV_RESETS 0x04 +#define INTEL_PRIV_RESETS_RESET BIT(0) +#define INTEL_PRIV_RESETS_RESET_DONE BIT(1) + +static DEFINE_IDA(mipi_i3c_hci_pci_ida); + +static int mipi_i3c_hci_pci_intel_init(struct pci_dev *pci) +{ + unsigned long timeout; + void __iomem *priv; + + priv = devm_ioremap(&pci->dev, + pci_resource_start(pci, 0) + INTEL_PRIV_OFFSET, + INTEL_PRIV_SIZE); + if (!priv) + return -ENOMEM; + + /* Assert reset, wait for completion and release reset */ + writel(0, priv + INTEL_PRIV_RESETS); + timeout = jiffies + msecs_to_jiffies(10); + while (!(readl(priv + INTEL_PRIV_RESETS) & + INTEL_PRIV_RESETS_RESET_DONE)) { + if (time_after(jiffies, timeout)) + break; + cpu_relax(); + } + writel(INTEL_PRIV_RESETS_RESET, priv + INTEL_PRIV_RESETS); + + return 0; +} + +static struct mipi_i3c_hci_pci_info intel_info = { + .init = mipi_i3c_hci_pci_intel_init, +}; + +static int mipi_i3c_hci_pci_probe(struct pci_dev *pci, + const struct pci_device_id *id) +{ + struct mipi_i3c_hci_pci_info *info; + struct platform_device *pdev; + struct resource res[2]; + int dev_id, ret; + + ret = pcim_enable_device(pci); + if (ret) + return ret; + + pci_set_master(pci); + + memset(&res, 0, sizeof(res)); + + res[0].flags = IORESOURCE_MEM; + res[0].start = pci_resource_start(pci, 0); + res[0].end = pci_resource_end(pci, 0); + + res[1].flags = IORESOURCE_IRQ; + res[1].start = pci->irq; + res[1].end = pci->irq; + + dev_id = ida_alloc(&mipi_i3c_hci_pci_ida, GFP_KERNEL); + if (dev_id < 0) + return dev_id; + + pdev = platform_device_alloc("mipi-i3c-hci", dev_id); + if (!pdev) + return -ENOMEM; + + pdev->dev.parent = &pci->dev; + device_set_node(&pdev->dev, dev_fwnode(&pci->dev)); + + ret = platform_device_add_resources(pdev, res, ARRAY_SIZE(res)); + if (ret) + goto err; + + info = (struct mipi_i3c_hci_pci_info *)id->driver_data; + if (info && info->init) { + ret = info->init(pci); + if (ret) + goto err; + } + + ret = platform_device_add(pdev); + if (ret) + goto err; + + pci_set_drvdata(pci, pdev); + + return 0; + +err: + platform_device_put(pdev); + ida_free(&mipi_i3c_hci_pci_ida, dev_id); + return ret; +} + +static void mipi_i3c_hci_pci_remove(struct pci_dev *pci) +{ + struct platform_device *pdev = pci_get_drvdata(pci); + int dev_id = pdev->id; + + platform_device_unregister(pdev); + ida_free(&mipi_i3c_hci_pci_ida, dev_id); +} + +static const struct pci_device_id mipi_i3c_hci_pci_devices[] = { + /* Panther Lake-H */ + { PCI_VDEVICE(INTEL, 0xe37c), (kernel_ulong_t)&intel_info}, + { PCI_VDEVICE(INTEL, 0xe36f), (kernel_ulong_t)&intel_info}, + /* Panther Lake-P */ + { PCI_VDEVICE(INTEL, 0xe47c), (kernel_ulong_t)&intel_info}, + { PCI_VDEVICE(INTEL, 0xe46f), (kernel_ulong_t)&intel_info}, + { }, +}; +MODULE_DEVICE_TABLE(pci, mipi_i3c_hci_pci_devices); + +static struct pci_driver mipi_i3c_hci_pci_driver = { + .name = "mipi_i3c_hci_pci", + .id_table = mipi_i3c_hci_pci_devices, + .probe = mipi_i3c_hci_pci_probe, + .remove = mipi_i3c_hci_pci_remove, +}; + +module_pci_driver(mipi_i3c_hci_pci_driver); + +MODULE_AUTHOR("Jarkko Nikula "); +MODULE_LICENSE("GPL"); +MODULE_DESCRIPTION("MIPI I3C HCI driver on PCI bus"); From c320592f3f2a1e6a4e69e5db8e76fc66934a0a78 Mon Sep 17 00:00:00 2001 From: Wolfram Sang Date: Tue, 7 Jan 2025 10:01:59 +0100 Subject: [PATCH 05/11] bitops: add generic parity calculation for u8 There are multiple open coded implementations for getting the parity of a byte in the kernel, even using different approaches. Take the pretty efficient version from SPD5118 driver and make it generally available by putting it into the bitops header. As long as there is just one parity calculation helper, the creation of a distinct 'parity.h' header was discarded. Also, the usage of hweight8() for architectures having a popcnt instruction is postponed until a use case within hot paths is desired. The motivation for this patch is the frequent use of odd parity in the I3C specification and to simplify drivers there. Changes compared to the original SPD5118 version are the addition of kernel documentation, switching the return type from bool to int, and renaming the argument of the function. Signed-off-by: Wolfram Sang Tested-by: Guenter Roeck Reviewed-by: Geert Uytterhoeven Acked-by: Yury Norov Reviewed-by: Kuan-Wei Chiu Tested-by: Kuan-Wei Chiu Link: https://lore.kernel.org/r/20250107090204.6593-2-wsa+renesas@sang-engineering.com Signed-off-by: Alexandre Belloni --- include/linux/bitops.h | 31 +++++++++++++++++++++++++++++++ 1 file changed, 31 insertions(+) diff --git a/include/linux/bitops.h b/include/linux/bitops.h index ba35bbf07798b..c1cb53cf2f0f8 100644 --- a/include/linux/bitops.h +++ b/include/linux/bitops.h @@ -229,6 +229,37 @@ static inline int get_count_order_long(unsigned long l) return (int)fls_long(--l); } +/** + * parity8 - get the parity of an u8 value + * @value: the value to be examined + * + * Determine the parity of the u8 argument. + * + * Returns: + * 0 for even parity, 1 for odd parity + * + * Note: This function informs you about the current parity. Example to bail + * out when parity is odd: + * + * if (parity8(val) == 1) + * return -EBADMSG; + * + * If you need to calculate a parity bit, you need to draw the conclusion from + * this result yourself. Example to enforce odd parity, parity bit is bit 7: + * + * if (parity8(val) == 0) + * val ^= BIT(7); + */ +static inline int parity8(u8 val) +{ + /* + * One explanation of this algorithm: + * https://funloop.org/codex/problem/parity/README.html + */ + val ^= val >> 4; + return (0x6996 >> (val & 0xf)) & 1; +} + /** * __ffs64 - find first set bit in a 64 bit word * @word: The 64 bit word From 32a8d362b51577e2b44d21410ff4eae7643b7448 Mon Sep 17 00:00:00 2001 From: Wolfram Sang Date: Tue, 7 Jan 2025 10:02:00 +0100 Subject: [PATCH 06/11] hwmon: (spd5118) Use generic parity calculation Make use of the new generic helper for calculating the parity. Signed-off-by: Wolfram Sang Tested-by: Guenter Roeck Acked-by: Guenter Roeck Reviewed-by: Geert Uytterhoeven Reviewed-by: Kuan-Wei Chiu Link: https://lore.kernel.org/r/20250107090204.6593-3-wsa+renesas@sang-engineering.com Signed-off-by: Alexandre Belloni --- drivers/hwmon/spd5118.c | 8 +------- 1 file changed, 1 insertion(+), 7 deletions(-) diff --git a/drivers/hwmon/spd5118.c b/drivers/hwmon/spd5118.c index 6cee48a3e5c33..358152868d961 100644 --- a/drivers/hwmon/spd5118.c +++ b/drivers/hwmon/spd5118.c @@ -291,12 +291,6 @@ static umode_t spd5118_is_visible(const void *_data, enum hwmon_sensor_types typ } } -static inline bool spd5118_parity8(u8 w) -{ - w ^= w >> 4; - return (0x6996 >> (w & 0xf)) & 1; -} - /* * Bank and vendor id are 8-bit fields with seven data bits and odd parity. * Vendor IDs 0 and 0x7f are invalid. @@ -304,7 +298,7 @@ static inline bool spd5118_parity8(u8 w) */ static bool spd5118_vendor_valid(u8 bank, u8 id) { - if (!spd5118_parity8(bank) || !spd5118_parity8(id)) + if (parity8(bank) == 0 || parity8(id) == 0) return false; id &= 0x7f; From e89cc14e96a99c93516c97dd10211313d3a7c4ff Mon Sep 17 00:00:00 2001 From: Wolfram Sang Date: Tue, 7 Jan 2025 10:02:01 +0100 Subject: [PATCH 07/11] i3c: dw: use parity8 helper instead of open coding it The kernel has now a generic helper for getting parity with easier to understand semantics. Make use of it. Signed-off-by: Wolfram Sang Link: https://lore.kernel.org/r/20250107090204.6593-4-wsa+renesas@sang-engineering.com Signed-off-by: Alexandre Belloni --- drivers/i3c/master/dw-i3c-master.c | 14 +++----------- 1 file changed, 3 insertions(+), 11 deletions(-) diff --git a/drivers/i3c/master/dw-i3c-master.c b/drivers/i3c/master/dw-i3c-master.c index f1c564b4801ed..d09ea5b6467ce 100644 --- a/drivers/i3c/master/dw-i3c-master.c +++ b/drivers/i3c/master/dw-i3c-master.c @@ -251,14 +251,6 @@ struct dw_i3c_i2c_dev_data { struct i3c_generic_ibi_pool *ibi_pool; }; -static u8 even_parity(u8 p) -{ - p ^= p >> 4; - p &= 0xf; - - return (0x9669 >> p) & 1; -} - static bool dw_i3c_master_supports_ccc_cmd(struct i3c_master_controller *m, const struct i3c_ccc_cmd *cmd) { @@ -848,7 +840,7 @@ static int dw_i3c_master_daa(struct i3c_master_controller *m) struct dw_i3c_xfer *xfer; struct dw_i3c_cmd *cmd; u32 olddevs, newdevs; - u8 p, last_addr = 0; + u8 last_addr = 0; int ret, pos; ret = pm_runtime_resume_and_get(master->dev); @@ -873,9 +865,9 @@ static int dw_i3c_master_daa(struct i3c_master_controller *m) } master->devs[pos].addr = ret; - p = even_parity(ret); last_addr = ret; - ret |= (p << 7); + + ret |= parity8(ret) ? 0 : BIT(7); writel(DEV_ADDR_TABLE_DYNAMIC_ADDR(ret), master->regs + From e55905a3f33c5a87166ec5a1b1cb5cb0abc273ee Mon Sep 17 00:00:00 2001 From: Wolfram Sang Date: Tue, 7 Jan 2025 10:02:02 +0100 Subject: [PATCH 08/11] i3c: mipi-i3c-hci: use parity8 helper instead of open coding it The kernel has now a generic helper for getting parity with easier to understand semantics. Make use of it. Here, it also fixes a bug because the correct algorithm is using XOR ('^=') instead of ADD ('+='). Signed-off-by: Wolfram Sang Tested-by: Jarkko Nikula Link: https://lore.kernel.org/r/20250107090204.6593-5-wsa+renesas@sang-engineering.com Signed-off-by: Alexandre Belloni --- drivers/i3c/master/mipi-i3c-hci/dat_v1.c | 11 +---------- 1 file changed, 1 insertion(+), 10 deletions(-) diff --git a/drivers/i3c/master/mipi-i3c-hci/dat_v1.c b/drivers/i3c/master/mipi-i3c-hci/dat_v1.c index 47b9b4d4ed3fc..85c4916972e44 100644 --- a/drivers/i3c/master/mipi-i3c-hci/dat_v1.c +++ b/drivers/i3c/master/mipi-i3c-hci/dat_v1.c @@ -40,15 +40,6 @@ #define dat_w0_write(i, v) writel(v, hci->DAT_regs + (i) * 8) #define dat_w1_write(i, v) writel(v, hci->DAT_regs + (i) * 8 + 4) -static inline bool dynaddr_parity(unsigned int addr) -{ - addr |= 1 << 7; - addr += addr >> 4; - addr += addr >> 2; - addr += addr >> 1; - return (addr & 1); -} - static int hci_dat_v1_init(struct i3c_hci *hci) { unsigned int dat_idx; @@ -123,7 +114,7 @@ static void hci_dat_v1_set_dynamic_addr(struct i3c_hci *hci, dat_w0 = dat_w0_read(dat_idx); dat_w0 &= ~(DAT_0_DYNAMIC_ADDRESS | DAT_0_DYNADDR_PARITY); dat_w0 |= FIELD_PREP(DAT_0_DYNAMIC_ADDRESS, address) | - (dynaddr_parity(address) ? DAT_0_DYNADDR_PARITY : 0); + (parity8(address) ? 0 : DAT_0_DYNADDR_PARITY); dat_w0_write(dat_idx, dat_w0); } From 5e8c732357ce0abe6251120d65f1ddbe5bc939fd Mon Sep 17 00:00:00 2001 From: Wolfram Sang Date: Tue, 7 Jan 2025 10:02:03 +0100 Subject: [PATCH 09/11] i3c: cdns: use parity8 helper instead of open coding it The kernel has now a generic helper for getting parity with easier to understand semantics. Make use of it. Signed-off-by: Wolfram Sang Link: https://lore.kernel.org/r/20250107090204.6593-6-wsa+renesas@sang-engineering.com Signed-off-by: Alexandre Belloni --- drivers/i3c/master/i3c-master-cdns.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/i3c/master/i3c-master-cdns.c b/drivers/i3c/master/i3c-master-cdns.c index fe4d59833ad5f..8d69a34986d96 100644 --- a/drivers/i3c/master/i3c-master-cdns.c +++ b/drivers/i3c/master/i3c-master-cdns.c @@ -889,8 +889,7 @@ static u32 prepare_rr0_dev_address(u32 addr) ret |= (addr & GENMASK(9, 7)) << 6; /* RR0[0] = ~XOR(addr[6:0]) */ - if (!(hweight8(addr & 0x7f) & 1)) - ret |= 1; + ret |= parity8(addr & 0x7f) ? 0 : BIT(0); return ret; } From b266e0d4dac00eecdfaf50ec3f708fd0c3b39637 Mon Sep 17 00:00:00 2001 From: Frank Li Date: Wed, 8 Jan 2025 17:55:33 -0500 Subject: [PATCH 10/11] i3c: master: Fix missing 'ret' assignment in set_speed() Fix a probe failure in the i3c master driver that occurs when no i3c devices are connected to the bus. The issue arises in `i3c_master_bus_init()` where the `ret` value is not updated after calling `master->ops->set_speed()`. If no devices are present, `ret` remains set to `I3C_ERROR_M2`, causing the code to incorrectly proceed to `err_bus_cleanup`. Cc: stable@vger.kernel.org Fixes: aef79e189ba2 ("i3c: master: support to adjust first broadcast address speed") Signed-off-by: Frank Li Reviewed-by: Wolfram Sang Tested-by: Wolfram Sang Acked-by: Mukesh Kumar Savaliya Reviewed-by: Miquel Raynal Link: https://lore.kernel.org/r/20250108225533.915334-1-Frank.Li@nxp.com Signed-off-by: Alexandre Belloni --- drivers/i3c/master.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/i3c/master.c b/drivers/i3c/master.c index 42310c9a00c2d..53ab814b676ff 100644 --- a/drivers/i3c/master.c +++ b/drivers/i3c/master.c @@ -1919,7 +1919,7 @@ static int i3c_master_bus_init(struct i3c_master_controller *master) goto err_bus_cleanup; if (master->ops->set_speed) { - master->ops->set_speed(master, I3C_OPEN_DRAIN_NORMAL_SPEED); + ret = master->ops->set_speed(master, I3C_OPEN_DRAIN_NORMAL_SPEED); if (ret) goto err_bus_cleanup; } From 5eb6d3561f6cb6d59887be6da764417e437f6afa Mon Sep 17 00:00:00 2001 From: Defa Li Date: Thu, 12 Dec 2024 17:17:53 +0800 Subject: [PATCH 11/11] i3c: master: Improve initialization of numbered I2C adapters Add logic to initialize I2C adapters with a specific ID if available, improving device identification and configuration. For mixed buses, in addition to the i3c alias, an i2c alias can be added to assign a fixed bus number to the i2c adapter. This allows an alias node such as: aliases { i2c2 = &mixed_bus_a, i3c2 = &mixed_bus_a, i3c4 = &mixed_bus_b, }; /* assigned "i3c-2" and "i2c-2" */ mixed_bus_a: i3c-master { }; If there is no i2c alias for a mixed bus, the i2c adapter numbers will remain as is and will be assigned starting after the highest fixed bus number. /* assigned "i3c-4" and likely assigned "i2c-3" */ mixed_bus_b: i3c-master { }; Signed-off-by: Defa Li Reviewed-by: Frank Li Link: https://lore.kernel.org/r/20241212091818.8591-1-defa.li@mediatek.com Signed-off-by: Alexandre Belloni --- drivers/i3c/master.c | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/drivers/i3c/master.c b/drivers/i3c/master.c index 53ab814b676ff..d5dc4180afbcf 100644 --- a/drivers/i3c/master.c +++ b/drivers/i3c/master.c @@ -2486,7 +2486,7 @@ static int i3c_master_i2c_adapter_init(struct i3c_master_controller *master) struct i2c_adapter *adap = i3c_master_to_i2c_adapter(master); struct i2c_dev_desc *i2cdev; struct i2c_dev_boardinfo *i2cboardinfo; - int ret; + int ret, id = -ENODEV; adap->dev.parent = master->dev.parent; adap->owner = master->dev.parent->driver->owner; @@ -2497,7 +2497,15 @@ static int i3c_master_i2c_adapter_init(struct i3c_master_controller *master) adap->timeout = 1000; adap->retries = 3; - ret = i2c_add_adapter(adap); + if (master->dev.of_node) + id = of_alias_get_id(master->dev.of_node, "i2c"); + + if (id >= 0) { + adap->nr = id; + ret = i2c_add_numbered_adapter(adap); + } else { + ret = i2c_add_adapter(adap); + } if (ret) return ret;