From 9eec6ce36b5dc981327e9f58025d012e524687b4 Mon Sep 17 00:00:00 2001 From: Lijuan Gao Date: Mon, 4 Nov 2024 17:10:12 +0800 Subject: [PATCH] arm64: defconfig: enable clock controller, interconnect and pinctrl for QCS615 Enable clock controller, interconnect and pinctrl for Qualcomm QCS615 platform to boot to UART console. The serial engine depends on GCC, interconnect, and pinctrl. It is necessary to build them as built-in modules because the debug console must be registered before userspace is launched. The primary reason for this is that, for example, systemd opens /dev/console at launch (i.e., when the init process starts). Therefore, if we register the console after this, we will not receive console output from systemd. Signed-off-by: Lijuan Gao Reviewed-by: Dmitry Baryshkov Link: https://lore.kernel.org/r/20241104-add_initial_support_for_qcs615-v5-5-9dde8d7b80b0@quicinc.com Signed-off-by: Bjorn Andersson --- arch/arm64/configs/defconfig | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index c62831e615863..374cd8a6f4f6a 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -607,6 +607,7 @@ CONFIG_PINCTRL_MSM8996=y CONFIG_PINCTRL_MSM8998=y CONFIG_PINCTRL_QCM2290=y CONFIG_PINCTRL_QCS404=y +CONFIG_PINCTRL_QCS615=y CONFIG_PINCTRL_QDF2XXX=y CONFIG_PINCTRL_QDU1000=y CONFIG_PINCTRL_SA8775P=y @@ -1325,6 +1326,7 @@ CONFIG_MSM_MMCC_8998=m CONFIG_QCM_GCC_2290=y CONFIG_QCM_DISPCC_2290=m CONFIG_QCS_GCC_404=y +CONFIG_QCS_GCC_615=y CONFIG_SC_CAMCC_7280=m CONFIG_QDU_GCC_1000=y CONFIG_SC_CAMCC_8280XP=m @@ -1632,6 +1634,7 @@ CONFIG_INTERCONNECT_QCOM_MSM8996=y CONFIG_INTERCONNECT_QCOM_OSM_L3=m CONFIG_INTERCONNECT_QCOM_QCM2290=y CONFIG_INTERCONNECT_QCOM_QCS404=m +CONFIG_INTERCONNECT_QCOM_QCS615=y CONFIG_INTERCONNECT_QCOM_QDU1000=y CONFIG_INTERCONNECT_QCOM_SA8775P=y CONFIG_INTERCONNECT_QCOM_SC7180=y