From ce7c5382758b13dd4dfa2eb2f4989f9a27c58ffe Mon Sep 17 00:00:00 2001 From: Biju Das Date: Thu, 27 Oct 2022 09:21:53 +0100 Subject: [PATCH 1/5] can: rcar_canfd: rcar_canfd_probe: Add struct rcar_canfd_hw_info to driver data The CAN FD IP found on RZ/G2L SoC has some HW features different to that of R-Car. For example, it has multiple resets and multiple IRQs for global and channel interrupts. Also, it does not have ECC error flag registers and clk post divider present on R-Car. Similarly, R-Car V3U has 8 channels whereas other SoCs has only 2 channels. This patch adds the struct rcar_canfd_hw_info to take care of the HW feature differences and driver data present on both IPs. It also replaces the driver data chip type with struct rcar_canfd_hw_info by moving chip type to it. Whilst started using driver data instead of chip_id for detecting R-Car V3U SoCs. Signed-off-by: Biju Das Reviewed-by: Geert Uytterhoeven Link: https://lore.kernel.org/all/20221027082158.95895-2-biju.das.jz@bp.renesas.com Signed-off-by: Marc Kleine-Budde --- drivers/net/can/rcar/rcar_canfd.c | 43 +++++++++++++++++++++---------- 1 file changed, 30 insertions(+), 13 deletions(-) diff --git a/drivers/net/can/rcar/rcar_canfd.c b/drivers/net/can/rcar/rcar_canfd.c index 0a59eab35da75..1a5a013ac5bcd 100644 --- a/drivers/net/can/rcar/rcar_canfd.c +++ b/drivers/net/can/rcar/rcar_canfd.c @@ -522,6 +522,10 @@ enum rcar_canfd_fcanclk { struct rcar_canfd_global; +struct rcar_canfd_hw_info { + enum rcanfd_chip_id chip_id; +}; + /* Channel priv data */ struct rcar_canfd_channel { struct can_priv can; /* Must be the first member */ @@ -547,7 +551,7 @@ struct rcar_canfd_global { bool fdmode; /* CAN FD or Classical CAN only mode */ struct reset_control *rstc1; struct reset_control *rstc2; - enum rcanfd_chip_id chip_id; + const struct rcar_canfd_hw_info *info; u32 max_channels; }; @@ -590,10 +594,22 @@ static const struct can_bittiming_const rcar_canfd_bittiming_const = { .brp_inc = 1, }; +static const struct rcar_canfd_hw_info rcar_gen3_hw_info = { + .chip_id = RENESAS_RCAR_GEN3, +}; + +static const struct rcar_canfd_hw_info rzg2l_hw_info = { + .chip_id = RENESAS_RZG2L, +}; + +static const struct rcar_canfd_hw_info r8a779a0_hw_info = { + .chip_id = RENESAS_R8A779A0, +}; + /* Helper functions */ static inline bool is_v3u(struct rcar_canfd_global *gpriv) { - return gpriv->chip_id == RENESAS_R8A779A0; + return gpriv->info == &r8a779a0_hw_info; } static inline u32 reg_v3u(struct rcar_canfd_global *gpriv, @@ -1696,6 +1712,7 @@ static const struct ethtool_ops rcar_canfd_ethtool_ops = { static int rcar_canfd_channel_probe(struct rcar_canfd_global *gpriv, u32 ch, u32 fcan_freq) { + const struct rcar_canfd_hw_info *info = gpriv->info; struct platform_device *pdev = gpriv->pdev; struct rcar_canfd_channel *priv; struct net_device *ndev; @@ -1718,7 +1735,7 @@ static int rcar_canfd_channel_probe(struct rcar_canfd_global *gpriv, u32 ch, priv->can.clock.freq = fcan_freq; dev_info(&pdev->dev, "can_clk rate is %u\n", priv->can.clock.freq); - if (gpriv->chip_id == RENESAS_RZG2L) { + if (info->chip_id == RENESAS_RZG2L) { char *irq_name; int err_irq; int tx_irq; @@ -1818,6 +1835,7 @@ static void rcar_canfd_channel_remove(struct rcar_canfd_global *gpriv, u32 ch) static int rcar_canfd_probe(struct platform_device *pdev) { + const struct rcar_canfd_hw_info *info; void __iomem *addr; u32 sts, ch, fcan_freq; struct rcar_canfd_global *gpriv; @@ -1826,13 +1844,12 @@ static int rcar_canfd_probe(struct platform_device *pdev) int err, ch_irq, g_irq; int g_err_irq, g_recc_irq; bool fdmode = true; /* CAN FD only mode - default */ - enum rcanfd_chip_id chip_id; int max_channels; char name[9] = "channelX"; int i; - chip_id = (uintptr_t)of_device_get_match_data(&pdev->dev); - max_channels = chip_id == RENESAS_R8A779A0 ? 8 : 2; + info = of_device_get_match_data(&pdev->dev); + max_channels = info->chip_id == RENESAS_R8A779A0 ? 8 : 2; if (of_property_read_bool(pdev->dev.of_node, "renesas,no-can-fd")) fdmode = false; /* Classical CAN only mode */ @@ -1845,7 +1862,7 @@ static int rcar_canfd_probe(struct platform_device *pdev) of_node_put(of_child); } - if (chip_id != RENESAS_RZG2L) { + if (info->chip_id != RENESAS_RZG2L) { ch_irq = platform_get_irq_byname_optional(pdev, "ch_int"); if (ch_irq < 0) { /* For backward compatibility get irq by index */ @@ -1879,7 +1896,7 @@ static int rcar_canfd_probe(struct platform_device *pdev) gpriv->pdev = pdev; gpriv->channels_mask = channels_mask; gpriv->fdmode = fdmode; - gpriv->chip_id = chip_id; + gpriv->info = info; gpriv->max_channels = max_channels; gpriv->rstc1 = devm_reset_control_get_optional_exclusive(&pdev->dev, @@ -1917,7 +1934,7 @@ static int rcar_canfd_probe(struct platform_device *pdev) } fcan_freq = clk_get_rate(gpriv->can_clk); - if (gpriv->fcan == RCANFD_CANFDCLK && gpriv->chip_id != RENESAS_RZG2L) + if (gpriv->fcan == RCANFD_CANFDCLK && info->chip_id != RENESAS_RZG2L) /* CANFD clock is further divided by (1/2) within the IP */ fcan_freq /= 2; @@ -1929,7 +1946,7 @@ static int rcar_canfd_probe(struct platform_device *pdev) gpriv->base = addr; /* Request IRQ that's common for both channels */ - if (gpriv->chip_id != RENESAS_RZG2L) { + if (info->chip_id != RENESAS_RZG2L) { err = devm_request_irq(&pdev->dev, ch_irq, rcar_canfd_channel_interrupt, 0, "canfd.ch_int", gpriv); @@ -2082,9 +2099,9 @@ static SIMPLE_DEV_PM_OPS(rcar_canfd_pm_ops, rcar_canfd_suspend, rcar_canfd_resume); static const __maybe_unused struct of_device_id rcar_canfd_of_table[] = { - { .compatible = "renesas,rcar-gen3-canfd", .data = (void *)RENESAS_RCAR_GEN3 }, - { .compatible = "renesas,rzg2l-canfd", .data = (void *)RENESAS_RZG2L }, - { .compatible = "renesas,r8a779a0-canfd", .data = (void *)RENESAS_R8A779A0 }, + { .compatible = "renesas,rcar-gen3-canfd", .data = &rcar_gen3_hw_info }, + { .compatible = "renesas,rzg2l-canfd", .data = &rzg2l_hw_info }, + { .compatible = "renesas,r8a779a0-canfd", .data = &r8a779a0_hw_info }, { } }; From 34f9e9852b90d7be6eef95874500d1fb1b768e7f Mon Sep 17 00:00:00 2001 From: Biju Das Date: Thu, 27 Oct 2022 09:21:54 +0100 Subject: [PATCH 2/5] can: rcar_canfd: Add max_channels to struct rcar_canfd_hw_info R-Car V3U supports a maximum of 8 channels whereas rest of the SoCs support 2 channels. Add max_channels variable to struct rcar_canfd_hw_info to handle this difference. Signed-off-by: Biju Das Reviewed-by: Geert Uytterhoeven Link: https://lore.kernel.org/all/20221027082158.95895-3-biju.das.jz@bp.renesas.com Signed-off-by: Marc Kleine-Budde --- drivers/net/can/rcar/rcar_canfd.c | 30 +++++++++++++++--------------- 1 file changed, 15 insertions(+), 15 deletions(-) diff --git a/drivers/net/can/rcar/rcar_canfd.c b/drivers/net/can/rcar/rcar_canfd.c index 1a5a013ac5bcd..6a9f750ac9c15 100644 --- a/drivers/net/can/rcar/rcar_canfd.c +++ b/drivers/net/can/rcar/rcar_canfd.c @@ -524,6 +524,7 @@ struct rcar_canfd_global; struct rcar_canfd_hw_info { enum rcanfd_chip_id chip_id; + u8 max_channels; }; /* Channel priv data */ @@ -552,7 +553,6 @@ struct rcar_canfd_global { struct reset_control *rstc1; struct reset_control *rstc2; const struct rcar_canfd_hw_info *info; - u32 max_channels; }; /* CAN FD mode nominal rate constants */ @@ -596,14 +596,17 @@ static const struct can_bittiming_const rcar_canfd_bittiming_const = { static const struct rcar_canfd_hw_info rcar_gen3_hw_info = { .chip_id = RENESAS_RCAR_GEN3, + .max_channels = 2, }; static const struct rcar_canfd_hw_info rzg2l_hw_info = { .chip_id = RENESAS_RZG2L, + .max_channels = 2, }; static const struct rcar_canfd_hw_info r8a779a0_hw_info = { .chip_id = RENESAS_R8A779A0, + .max_channels = 8, }; /* Helper functions */ @@ -737,7 +740,7 @@ static int rcar_canfd_reset_controller(struct rcar_canfd_global *gpriv) rcar_canfd_set_mode(gpriv); /* Transition all Channels to reset mode */ - for_each_set_bit(ch, &gpriv->channels_mask, gpriv->max_channels) { + for_each_set_bit(ch, &gpriv->channels_mask, gpriv->info->max_channels) { rcar_canfd_clear_bit(gpriv->base, RCANFD_CCTR(ch), RCANFD_CCTR_CSLPR); @@ -778,7 +781,7 @@ static void rcar_canfd_configure_controller(struct rcar_canfd_global *gpriv) rcar_canfd_set_bit(gpriv->base, RCANFD_GCFG, cfg); /* Channel configuration settings */ - for_each_set_bit(ch, &gpriv->channels_mask, gpriv->max_channels) { + for_each_set_bit(ch, &gpriv->channels_mask, gpriv->info->max_channels) { rcar_canfd_set_bit(gpriv->base, RCANFD_CCTR(ch), RCANFD_CCTR_ERRD); rcar_canfd_update_bit(gpriv->base, RCANFD_CCTR(ch), @@ -1158,7 +1161,7 @@ static irqreturn_t rcar_canfd_global_err_interrupt(int irq, void *dev_id) struct rcar_canfd_global *gpriv = dev_id; u32 ch; - for_each_set_bit(ch, &gpriv->channels_mask, gpriv->max_channels) + for_each_set_bit(ch, &gpriv->channels_mask, gpriv->info->max_channels) rcar_canfd_handle_global_err(gpriv, ch); return IRQ_HANDLED; @@ -1190,7 +1193,7 @@ static irqreturn_t rcar_canfd_global_receive_fifo_interrupt(int irq, void *dev_i struct rcar_canfd_global *gpriv = dev_id; u32 ch; - for_each_set_bit(ch, &gpriv->channels_mask, gpriv->max_channels) + for_each_set_bit(ch, &gpriv->channels_mask, gpriv->info->max_channels) rcar_canfd_handle_global_receive(gpriv, ch); return IRQ_HANDLED; @@ -1204,7 +1207,7 @@ static irqreturn_t rcar_canfd_global_interrupt(int irq, void *dev_id) /* Global error interrupts still indicate a condition specific * to a channel. RxFIFO interrupt is a global interrupt. */ - for_each_set_bit(ch, &gpriv->channels_mask, gpriv->max_channels) { + for_each_set_bit(ch, &gpriv->channels_mask, gpriv->info->max_channels) { rcar_canfd_handle_global_err(gpriv, ch); rcar_canfd_handle_global_receive(gpriv, ch); } @@ -1300,7 +1303,7 @@ static irqreturn_t rcar_canfd_channel_interrupt(int irq, void *dev_id) u32 ch; /* Common FIFO is a per channel resource */ - for_each_set_bit(ch, &gpriv->channels_mask, gpriv->max_channels) { + for_each_set_bit(ch, &gpriv->channels_mask, gpriv->info->max_channels) { rcar_canfd_handle_channel_err(gpriv, ch); rcar_canfd_handle_channel_tx(gpriv, ch); } @@ -1844,17 +1847,15 @@ static int rcar_canfd_probe(struct platform_device *pdev) int err, ch_irq, g_irq; int g_err_irq, g_recc_irq; bool fdmode = true; /* CAN FD only mode - default */ - int max_channels; char name[9] = "channelX"; int i; info = of_device_get_match_data(&pdev->dev); - max_channels = info->chip_id == RENESAS_R8A779A0 ? 8 : 2; if (of_property_read_bool(pdev->dev.of_node, "renesas,no-can-fd")) fdmode = false; /* Classical CAN only mode */ - for (i = 0; i < max_channels; ++i) { + for (i = 0; i < info->max_channels; ++i) { name[7] = '0' + i; of_child = of_get_child_by_name(pdev->dev.of_node, name); if (of_child && of_device_is_available(of_child)) @@ -1897,7 +1898,6 @@ static int rcar_canfd_probe(struct platform_device *pdev) gpriv->channels_mask = channels_mask; gpriv->fdmode = fdmode; gpriv->info = info; - gpriv->max_channels = max_channels; gpriv->rstc1 = devm_reset_control_get_optional_exclusive(&pdev->dev, "rstp_n"); @@ -2012,7 +2012,7 @@ static int rcar_canfd_probe(struct platform_device *pdev) rcar_canfd_configure_controller(gpriv); /* Configure per channel attributes */ - for_each_set_bit(ch, &gpriv->channels_mask, max_channels) { + for_each_set_bit(ch, &gpriv->channels_mask, info->max_channels) { /* Configure Channel's Rx fifo */ rcar_canfd_configure_rx(gpriv, ch); @@ -2038,7 +2038,7 @@ static int rcar_canfd_probe(struct platform_device *pdev) goto fail_mode; } - for_each_set_bit(ch, &gpriv->channels_mask, max_channels) { + for_each_set_bit(ch, &gpriv->channels_mask, info->max_channels) { err = rcar_canfd_channel_probe(gpriv, ch, fcan_freq); if (err) goto fail_channel; @@ -2050,7 +2050,7 @@ static int rcar_canfd_probe(struct platform_device *pdev) return 0; fail_channel: - for_each_set_bit(ch, &gpriv->channels_mask, max_channels) + for_each_set_bit(ch, &gpriv->channels_mask, info->max_channels) rcar_canfd_channel_remove(gpriv, ch); fail_mode: rcar_canfd_disable_global_interrupts(gpriv); @@ -2071,7 +2071,7 @@ static int rcar_canfd_remove(struct platform_device *pdev) rcar_canfd_reset_controller(gpriv); rcar_canfd_disable_global_interrupts(gpriv); - for_each_set_bit(ch, &gpriv->channels_mask, gpriv->max_channels) { + for_each_set_bit(ch, &gpriv->channels_mask, gpriv->info->max_channels) { rcar_canfd_disable_channel_interrupts(gpriv->ch[ch]); rcar_canfd_channel_remove(gpriv, ch); } From 841645cfc773cdd0a21c67357c53845f2e972f91 Mon Sep 17 00:00:00 2001 From: Biju Das Date: Thu, 27 Oct 2022 09:21:55 +0100 Subject: [PATCH 3/5] can: rcar_canfd: Add shared_global_irqs to struct rcar_canfd_hw_info RZ/G2L has separate IRQ lines for receive FIFO and global error interrupt whereas R-Car has shared IRQ line. Add shared_global_irqs to struct rcar_canfd_hw_info to select the driver to choose between shared and separate irq registration for global interrupts. Signed-off-by: Biju Das Reviewed-by: Geert Uytterhoeven Link: https://lore.kernel.org/all/20221027082158.95895-4-biju.das.jz@bp.renesas.com Signed-off-by: Marc Kleine-Budde --- drivers/net/can/rcar/rcar_canfd.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/drivers/net/can/rcar/rcar_canfd.c b/drivers/net/can/rcar/rcar_canfd.c index 6a9f750ac9c15..8a0d2c64dd3ef 100644 --- a/drivers/net/can/rcar/rcar_canfd.c +++ b/drivers/net/can/rcar/rcar_canfd.c @@ -525,6 +525,8 @@ struct rcar_canfd_global; struct rcar_canfd_hw_info { enum rcanfd_chip_id chip_id; u8 max_channels; + /* hardware features */ + unsigned shared_global_irqs:1; /* Has shared global irqs */ }; /* Channel priv data */ @@ -597,6 +599,7 @@ static const struct can_bittiming_const rcar_canfd_bittiming_const = { static const struct rcar_canfd_hw_info rcar_gen3_hw_info = { .chip_id = RENESAS_RCAR_GEN3, .max_channels = 2, + .shared_global_irqs = 1, }; static const struct rcar_canfd_hw_info rzg2l_hw_info = { @@ -607,6 +610,7 @@ static const struct rcar_canfd_hw_info rzg2l_hw_info = { static const struct rcar_canfd_hw_info r8a779a0_hw_info = { .chip_id = RENESAS_R8A779A0, .max_channels = 8, + .shared_global_irqs = 1, }; /* Helper functions */ @@ -1863,7 +1867,7 @@ static int rcar_canfd_probe(struct platform_device *pdev) of_node_put(of_child); } - if (info->chip_id != RENESAS_RZG2L) { + if (info->shared_global_irqs) { ch_irq = platform_get_irq_byname_optional(pdev, "ch_int"); if (ch_irq < 0) { /* For backward compatibility get irq by index */ @@ -1946,7 +1950,7 @@ static int rcar_canfd_probe(struct platform_device *pdev) gpriv->base = addr; /* Request IRQ that's common for both channels */ - if (info->chip_id != RENESAS_RZG2L) { + if (info->shared_global_irqs) { err = devm_request_irq(&pdev->dev, ch_irq, rcar_canfd_channel_interrupt, 0, "canfd.ch_int", gpriv); From a1dcfbdfd1d0f7843f381f7c58cc87a0f8c11f6c Mon Sep 17 00:00:00 2001 From: Biju Das Date: Thu, 27 Oct 2022 09:21:56 +0100 Subject: [PATCH 4/5] can: rcar_canfd: Add postdiv to struct rcar_canfd_hw_info R-Car has a clock divider for CAN FD clock within the IP, whereas it is not available on RZ/G2L. Add postdiv variable to struct rcar_canfd_hw_info to take care of this difference. Signed-off-by: Biju Das Reviewed-by: Geert Uytterhoeven Link: https://lore.kernel.org/all/20221027082158.95895-5-biju.das.jz@bp.renesas.com Signed-off-by: Marc Kleine-Budde --- drivers/net/can/rcar/rcar_canfd.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/drivers/net/can/rcar/rcar_canfd.c b/drivers/net/can/rcar/rcar_canfd.c index 8a0d2c64dd3ef..16294a78320e1 100644 --- a/drivers/net/can/rcar/rcar_canfd.c +++ b/drivers/net/can/rcar/rcar_canfd.c @@ -525,6 +525,7 @@ struct rcar_canfd_global; struct rcar_canfd_hw_info { enum rcanfd_chip_id chip_id; u8 max_channels; + u8 postdiv; /* hardware features */ unsigned shared_global_irqs:1; /* Has shared global irqs */ }; @@ -599,17 +600,20 @@ static const struct can_bittiming_const rcar_canfd_bittiming_const = { static const struct rcar_canfd_hw_info rcar_gen3_hw_info = { .chip_id = RENESAS_RCAR_GEN3, .max_channels = 2, + .postdiv = 2, .shared_global_irqs = 1, }; static const struct rcar_canfd_hw_info rzg2l_hw_info = { .chip_id = RENESAS_RZG2L, + .postdiv = 1, .max_channels = 2, }; static const struct rcar_canfd_hw_info r8a779a0_hw_info = { .chip_id = RENESAS_R8A779A0, .max_channels = 8, + .postdiv = 2, .shared_global_irqs = 1, }; @@ -1938,9 +1942,9 @@ static int rcar_canfd_probe(struct platform_device *pdev) } fcan_freq = clk_get_rate(gpriv->can_clk); - if (gpriv->fcan == RCANFD_CANFDCLK && info->chip_id != RENESAS_RZG2L) + if (gpriv->fcan == RCANFD_CANFDCLK) /* CANFD clock is further divided by (1/2) within the IP */ - fcan_freq /= 2; + fcan_freq /= info->postdiv; addr = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(addr)) { From ea6ff7792203ad6786bda75d1dabf33311c8bef4 Mon Sep 17 00:00:00 2001 From: Biju Das Date: Thu, 27 Oct 2022 09:21:57 +0100 Subject: [PATCH 5/5] can: rcar_canfd: Add multi_channel_irqs to struct rcar_canfd_hw_info RZ/G2L has separate IRQ lines for tx and error interrupt for each channel whereas R-Car has a combined IRQ line for all the channel specific tx and error interrupts. Add multi_channel_irqs to struct rcar_canfd_hw_info to select the driver to choose between combined and separate irq registration for channel interrupts. This patch also removes enum rcanfd_chip_id and chip_id from both struct rcar_canfd_hw_info, as it is unused. Signed-off-by: Biju Das Reviewed-by: Geert Uytterhoeven Link: https://lore.kernel.org/all/20221027082158.95895-6-biju.das.jz@bp.renesas.com Signed-off-by: Marc Kleine-Budde --- drivers/net/can/rcar/rcar_canfd.c | 16 ++++------------ 1 file changed, 4 insertions(+), 12 deletions(-) diff --git a/drivers/net/can/rcar/rcar_canfd.c b/drivers/net/can/rcar/rcar_canfd.c index 16294a78320e1..f6fa7157b99b0 100644 --- a/drivers/net/can/rcar/rcar_canfd.c +++ b/drivers/net/can/rcar/rcar_canfd.c @@ -41,12 +41,6 @@ #define RCANFD_DRV_NAME "rcar_canfd" -enum rcanfd_chip_id { - RENESAS_RCAR_GEN3 = 0, - RENESAS_RZG2L, - RENESAS_R8A779A0, -}; - /* Global register bits */ /* RSCFDnCFDGRMCFG */ @@ -523,11 +517,11 @@ enum rcar_canfd_fcanclk { struct rcar_canfd_global; struct rcar_canfd_hw_info { - enum rcanfd_chip_id chip_id; u8 max_channels; u8 postdiv; /* hardware features */ unsigned shared_global_irqs:1; /* Has shared global irqs */ + unsigned multi_channel_irqs:1; /* Has multiple channel irqs */ }; /* Channel priv data */ @@ -598,20 +592,18 @@ static const struct can_bittiming_const rcar_canfd_bittiming_const = { }; static const struct rcar_canfd_hw_info rcar_gen3_hw_info = { - .chip_id = RENESAS_RCAR_GEN3, .max_channels = 2, .postdiv = 2, .shared_global_irqs = 1, }; static const struct rcar_canfd_hw_info rzg2l_hw_info = { - .chip_id = RENESAS_RZG2L, - .postdiv = 1, .max_channels = 2, + .postdiv = 1, + .multi_channel_irqs = 1, }; static const struct rcar_canfd_hw_info r8a779a0_hw_info = { - .chip_id = RENESAS_R8A779A0, .max_channels = 8, .postdiv = 2, .shared_global_irqs = 1, @@ -1746,7 +1738,7 @@ static int rcar_canfd_channel_probe(struct rcar_canfd_global *gpriv, u32 ch, priv->can.clock.freq = fcan_freq; dev_info(&pdev->dev, "can_clk rate is %u\n", priv->can.clock.freq); - if (info->chip_id == RENESAS_RZG2L) { + if (info->multi_channel_irqs) { char *irq_name; int err_irq; int tx_irq;