From 60be800603ff81d43b2fbb3c067bbef49f7d8414 Mon Sep 17 00:00:00 2001 From: Heiner Kallweit Date: Fri, 1 Nov 2024 23:07:14 +0100 Subject: [PATCH 01/52] ALSA: ppc: Remove i2c client removal hack The i2c_driver.clients list is internal to I2C core and is going to be removed. No driver should access it. Unregister the i2c client explicitly before deleting the i2c driver. Reviewed-by: Takashi Iwai Signed-off-by: Heiner Kallweit Signed-off-by: Wolfram Sang --- sound/ppc/keywest.c | 7 +------ 1 file changed, 1 insertion(+), 6 deletions(-) diff --git a/sound/ppc/keywest.c b/sound/ppc/keywest.c index 3d3513d9def5c..4ce81ac7f7005 100644 --- a/sound/ppc/keywest.c +++ b/sound/ppc/keywest.c @@ -61,12 +61,6 @@ static int keywest_attach_adapter(struct i2c_adapter *adapter) return -ENODEV; } - /* - * Let i2c-core delete that device on driver removal. - * This is safe because i2c-core holds the core_lock mutex for us. - */ - list_add_tail(&keywest_ctx->client->detected, - &to_i2c_driver(keywest_ctx->client->dev.driver)->clients); return 0; } @@ -99,6 +93,7 @@ static struct i2c_driver keywest_driver = { void snd_pmac_keywest_cleanup(struct pmac_keywest *i2c) { if (keywest_ctx && keywest_ctx == i2c) { + i2c_unregister_device(keywest_ctx->client); i2c_del_driver(&keywest_driver); keywest_ctx = NULL; } From 56a50667cbcfaf95eea9128d5676af94e54b51a8 Mon Sep 17 00:00:00 2001 From: Heiner Kallweit Date: Fri, 1 Nov 2024 23:09:51 +0100 Subject: [PATCH 02/52] i2c: Replace list-based mechanism for handling auto-detected clients So far a list is used to track auto-detected clients per driver. The same functionality can be achieved much simpler by flagging auto-detected clients. Two notes regarding the usage of driver_for_each_device: In our case it can't fail, however the function is annotated __must_check. So a little workaround is needed to avoid a compiler warning. Then we may remove nodes from the list over which we iterate. This is safe, see the explanation at the beginning of lib/klist.c. Signed-off-by: Heiner Kallweit [wsa: fixed description of the new flag] Signed-off-by: Wolfram Sang --- drivers/i2c/i2c-core-base.c | 52 ++++++++++++------------------------- include/linux/i2c.h | 3 +-- 2 files changed, 17 insertions(+), 38 deletions(-) diff --git a/drivers/i2c/i2c-core-base.c b/drivers/i2c/i2c-core-base.c index 7c810893bfa33..42c62839de0ca 100644 --- a/drivers/i2c/i2c-core-base.c +++ b/drivers/i2c/i2c-core-base.c @@ -1696,23 +1696,6 @@ int i2c_add_numbered_adapter(struct i2c_adapter *adap) } EXPORT_SYMBOL_GPL(i2c_add_numbered_adapter); -static void i2c_do_del_adapter(struct i2c_driver *driver, - struct i2c_adapter *adapter) -{ - struct i2c_client *client, *_n; - - /* Remove the devices we created ourselves as the result of hardware - * probing (using a driver's detect method) */ - list_for_each_entry_safe(client, _n, &driver->clients, detected) { - if (client->adapter == adapter) { - dev_dbg(&adapter->dev, "Removing %s at 0x%x\n", - client->name, client->addr); - list_del(&client->detected); - i2c_unregister_device(client); - } - } -} - static int __unregister_client(struct device *dev, void *dummy) { struct i2c_client *client = i2c_verify_client(dev); @@ -1728,12 +1711,6 @@ static int __unregister_dummy(struct device *dev, void *dummy) return 0; } -static int __process_removed_adapter(struct device_driver *d, void *data) -{ - i2c_do_del_adapter(to_i2c_driver(d), data); - return 0; -} - /** * i2c_del_adapter - unregister I2C adapter * @adap: the adapter being unregistered @@ -1757,11 +1734,6 @@ void i2c_del_adapter(struct i2c_adapter *adap) } i2c_acpi_remove_space_handler(adap); - /* Tell drivers about this removal */ - mutex_lock(&core_lock); - bus_for_each_drv(&i2c_bus_type, NULL, adap, - __process_removed_adapter); - mutex_unlock(&core_lock); /* Remove devices instantiated from sysfs */ mutex_lock_nested(&adap->userspace_clients_lock, @@ -1780,8 +1752,10 @@ void i2c_del_adapter(struct i2c_adapter *adap) * we can't remove the dummy devices during the first pass: they * could have been instantiated by real devices wishing to clean * them up properly, so we give them a chance to do that first. */ + mutex_lock(&core_lock); device_for_each_child(&adap->dev, NULL, __unregister_client); device_for_each_child(&adap->dev, NULL, __unregister_dummy); + mutex_unlock(&core_lock); /* device name is gone after device_unregister */ dev_dbg(&adap->dev, "adapter [%s] unregistered\n", adap->name); @@ -2001,7 +1975,6 @@ int i2c_register_driver(struct module *owner, struct i2c_driver *driver) /* add the driver to the list of i2c drivers in the driver core */ driver->driver.owner = owner; driver->driver.bus = &i2c_bus_type; - INIT_LIST_HEAD(&driver->clients); /* When registration returns, the driver core * will have called probe() for all matching-but-unbound devices. @@ -2019,10 +1992,13 @@ int i2c_register_driver(struct module *owner, struct i2c_driver *driver) } EXPORT_SYMBOL(i2c_register_driver); -static int __process_removed_driver(struct device *dev, void *data) +static int __i2c_unregister_detected_client(struct device *dev, void *argp) { - if (dev->type == &i2c_adapter_type) - i2c_do_del_adapter(data, to_i2c_adapter(dev)); + struct i2c_client *client = i2c_verify_client(dev); + + if (client && client->flags & I2C_CLIENT_AUTO) + i2c_unregister_device(client); + return 0; } @@ -2033,7 +2009,12 @@ static int __process_removed_driver(struct device *dev, void *data) */ void i2c_del_driver(struct i2c_driver *driver) { - i2c_for_each_dev(driver, __process_removed_driver); + mutex_lock(&core_lock); + /* Satisfy __must_check, function can't fail */ + if (driver_for_each_device(&driver->driver, NULL, NULL, + __i2c_unregister_detected_client)) { + } + mutex_unlock(&core_lock); driver_unregister(&driver->driver); pr_debug("driver [%s] unregistered\n", driver->driver.name); @@ -2460,6 +2441,7 @@ static int i2c_detect_address(struct i2c_client *temp_client, /* Finally call the custom detection function */ memset(&info, 0, sizeof(struct i2c_board_info)); info.addr = addr; + info.flags = I2C_CLIENT_AUTO; err = driver->detect(temp_client, &info); if (err) { /* -ENODEV is returned if the detection fails. We catch it @@ -2486,9 +2468,7 @@ static int i2c_detect_address(struct i2c_client *temp_client, dev_dbg(&adapter->dev, "Creating %s at 0x%02x\n", info.type, info.addr); client = i2c_new_client_device(adapter, &info); - if (!IS_ERR(client)) - list_add_tail(&client->detected, &driver->clients); - else + if (IS_ERR(client)) dev_err(&adapter->dev, "Failed creating %s at 0x%02x\n", info.type, info.addr); } diff --git a/include/linux/i2c.h b/include/linux/i2c.h index 388ce71a29a97..072a62244e14a 100644 --- a/include/linux/i2c.h +++ b/include/linux/i2c.h @@ -244,7 +244,6 @@ enum i2c_driver_flags { * @id_table: List of I2C devices supported by this driver * @detect: Callback for device detection * @address_list: The I2C addresses to probe (for detect) - * @clients: List of detected clients we created (for i2c-core use only) * @flags: A bitmask of flags defined in &enum i2c_driver_flags * * The driver.owner field should be set to the module owner of this driver. @@ -299,7 +298,6 @@ struct i2c_driver { /* Device detection callback for automatic device creation */ int (*detect)(struct i2c_client *client, struct i2c_board_info *info); const unsigned short *address_list; - struct list_head clients; u32 flags; }; @@ -334,6 +332,7 @@ struct i2c_client { #define I2C_CLIENT_SLAVE 0x20 /* we are the slave */ #define I2C_CLIENT_HOST_NOTIFY 0x40 /* We want to use I2C host notify */ #define I2C_CLIENT_WAKE 0x80 /* for board_info; true iff can wake */ +#define I2C_CLIENT_AUTO 0x100 /* client was auto-detected */ #define I2C_CLIENT_SCCB 0x9000 /* Use Omnivision SCCB protocol */ /* Must match I2C_M_STOP|IGNORE_NAK */ From 3cfe39b3a845593a485ab1c716615979004ef9f6 Mon Sep 17 00:00:00 2001 From: Heiner Kallweit Date: Fri, 1 Nov 2024 23:11:39 +0100 Subject: [PATCH 03/52] i2c: Replace list-based mechanism for handling userspace-created clients Similar to the list of auto-detected clients, we can also replace the list of userspace-created clients with flagging such client devices. Signed-off-by: Heiner Kallweit [wsa: fixed description of the new flag; reordered new code in 'device_store' to have single exit point; fixed whitespace errors; folded cleanup patch into this one] Signed-off-by: Wolfram Sang --- drivers/i2c/i2c-core-base.c | 61 +++++++++++++------------------------ include/linux/i2c.h | 7 +---- 2 files changed, 23 insertions(+), 45 deletions(-) diff --git a/drivers/i2c/i2c-core-base.c b/drivers/i2c/i2c-core-base.c index 42c62839de0ca..bd90a6084fc0d 100644 --- a/drivers/i2c/i2c-core-base.c +++ b/drivers/i2c/i2c-core-base.c @@ -1293,14 +1293,12 @@ new_device_store(struct device *dev, struct device_attribute *attr, info.flags |= I2C_CLIENT_SLAVE; } + info.flags |= I2C_CLIENT_USER; + client = i2c_new_client_device(adap, &info); if (IS_ERR(client)) return PTR_ERR(client); - /* Keep track of the added device */ - mutex_lock(&adap->userspace_clients_lock); - list_add_tail(&client->detected, &adap->userspace_clients); - mutex_unlock(&adap->userspace_clients_lock); dev_info(dev, "%s: Instantiated device %s at 0x%02hx\n", "new_device", info.type, info.addr); @@ -1308,6 +1306,15 @@ new_device_store(struct device *dev, struct device_attribute *attr, } static DEVICE_ATTR_WO(new_device); +static int __i2c_find_user_addr(struct device *dev, void *addrp) +{ + struct i2c_client *client = i2c_verify_client(dev); + unsigned short addr = *(unsigned short *)addrp; + + return client && client->flags & I2C_CLIENT_USER && + i2c_encode_flags_to_addr(client) == addr; +} + /* * And of course let the users delete the devices they instantiated, if * they got it wrong. This interface can only be used to delete devices @@ -1322,7 +1329,7 @@ delete_device_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) { struct i2c_adapter *adap = to_i2c_adapter(dev); - struct i2c_client *client, *next; + struct device *child_dev; unsigned short addr; char end; int res; @@ -1338,28 +1345,19 @@ delete_device_store(struct device *dev, struct device_attribute *attr, return -EINVAL; } + mutex_lock(&core_lock); /* Make sure the device was added through sysfs */ - res = -ENOENT; - mutex_lock_nested(&adap->userspace_clients_lock, - i2c_adapter_depth(adap)); - list_for_each_entry_safe(client, next, &adap->userspace_clients, - detected) { - if (i2c_encode_flags_to_addr(client) == addr) { - dev_info(dev, "%s: Deleting device %s at 0x%02hx\n", - "delete_device", client->name, client->addr); - - list_del(&client->detected); - i2c_unregister_device(client); - res = count; - break; - } + child_dev = device_find_child(&adap->dev, &addr, __i2c_find_user_addr); + if (child_dev) { + i2c_unregister_device(i2c_verify_client(child_dev)); + put_device(child_dev); + } else { + dev_err(dev, "Can't find userspace-created device at %#x\n", addr); + count = -ENOENT; } - mutex_unlock(&adap->userspace_clients_lock); + mutex_unlock(&core_lock); - if (res < 0) - dev_err(dev, "%s: Can't find device in list\n", - "delete_device"); - return res; + return count; } static DEVICE_ATTR_IGNORE_LOCKDEP(delete_device, S_IWUSR, NULL, delete_device_store); @@ -1530,8 +1528,6 @@ static int i2c_register_adapter(struct i2c_adapter *adap) adap->locked_flags = 0; rt_mutex_init(&adap->bus_lock); rt_mutex_init(&adap->mux_lock); - mutex_init(&adap->userspace_clients_lock); - INIT_LIST_HEAD(&adap->userspace_clients); /* Set default timeout to 1 second if not already set */ if (adap->timeout == 0) @@ -1722,7 +1718,6 @@ static int __unregister_dummy(struct device *dev, void *dummy) void i2c_del_adapter(struct i2c_adapter *adap) { struct i2c_adapter *found; - struct i2c_client *client, *next; /* First make sure that this adapter was ever added */ mutex_lock(&core_lock); @@ -1735,18 +1730,6 @@ void i2c_del_adapter(struct i2c_adapter *adap) i2c_acpi_remove_space_handler(adap); - /* Remove devices instantiated from sysfs */ - mutex_lock_nested(&adap->userspace_clients_lock, - i2c_adapter_depth(adap)); - list_for_each_entry_safe(client, next, &adap->userspace_clients, - detected) { - dev_dbg(&adap->dev, "Removing %s at 0x%x\n", client->name, - client->addr); - list_del(&client->detected); - i2c_unregister_device(client); - } - mutex_unlock(&adap->userspace_clients_lock); - /* Detach any active clients. This can't fail, thus we do not * check the returned value. This is a two-pass process, because * we can't remove the dummy devices during the first pass: they diff --git a/include/linux/i2c.h b/include/linux/i2c.h index 072a62244e14a..66fb3d6cf686c 100644 --- a/include/linux/i2c.h +++ b/include/linux/i2c.h @@ -313,8 +313,6 @@ struct i2c_driver { * @dev: Driver model device node for the slave. * @init_irq: IRQ that was set at initialization * @irq: indicates the IRQ generated by this device (if any) - * @detected: member of an i2c_driver.clients list or i2c-core's - * userspace_devices list * @slave_cb: Callback when I2C slave mode of an adapter is used. The adapter * calls it to pass on slave events to the slave driver. * @devres_group_id: id of the devres group that will be created for resources @@ -333,6 +331,7 @@ struct i2c_client { #define I2C_CLIENT_HOST_NOTIFY 0x40 /* We want to use I2C host notify */ #define I2C_CLIENT_WAKE 0x80 /* for board_info; true iff can wake */ #define I2C_CLIENT_AUTO 0x100 /* client was auto-detected */ +#define I2C_CLIENT_USER 0x200 /* client was userspace-created */ #define I2C_CLIENT_SCCB 0x9000 /* Use Omnivision SCCB protocol */ /* Must match I2C_M_STOP|IGNORE_NAK */ @@ -344,7 +343,6 @@ struct i2c_client { struct device dev; /* the device structure */ int init_irq; /* irq set at initialization */ int irq; /* irq issued by device */ - struct list_head detected; #if IS_ENABLED(CONFIG_I2C_SLAVE) i2c_slave_cb_t slave_cb; /* callback for slave mode */ #endif @@ -750,9 +748,6 @@ struct i2c_adapter { char name[48]; struct completion dev_released; - struct mutex userspace_clients_lock; - struct list_head userspace_clients; - struct i2c_bus_recovery_info *bus_recovery_info; const struct i2c_adapter_quirks *quirks; From 56d4ef115cc51b1fe7de1e695923126923c9f9bf Mon Sep 17 00:00:00 2001 From: Luca Weiss Date: Fri, 3 Jan 2025 12:11:57 +0100 Subject: [PATCH 04/52] dt-bindings: eeprom: at24: Add compatible for Giantec GT24P128F Add the compatible for another 128Kb EEPROM from Giantec. Signed-off-by: Luca Weiss Acked-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250103-fp5-cam-eeprom-v1-1-88dee1b36f8e@fairphone.com Signed-off-by: Bartosz Golaszewski --- Documentation/devicetree/bindings/eeprom/at24.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/eeprom/at24.yaml b/Documentation/devicetree/bindings/eeprom/at24.yaml index 590ba0ef5fa26..a2970c7c8f276 100644 --- a/Documentation/devicetree/bindings/eeprom/at24.yaml +++ b/Documentation/devicetree/bindings/eeprom/at24.yaml @@ -134,6 +134,7 @@ properties: - const: atmel,24c64 - items: - enum: + - giantec,gt24p128f - renesas,r1ex24128 - samsung,s524ad0xd1 - const: atmel,24c128 From eace9d83c831c44b4f63beec18774fe4a46d12cc Mon Sep 17 00:00:00 2001 From: Luca Weiss Date: Fri, 3 Jan 2025 12:11:58 +0100 Subject: [PATCH 05/52] dt-bindings: vendor-prefixes: Add Puya Semiconductor (Shanghai) Co., Ltd. Add the vendor prefix for a manufacturer of EEPROM chips among others. Signed-off-by: Luca Weiss Acked-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250103-fp5-cam-eeprom-v1-2-88dee1b36f8e@fairphone.com Signed-off-by: Bartosz Golaszewski --- Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml index da01616802c76..7e743a9f638dc 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -1204,6 +1204,8 @@ patternProperties: description: PulsedLight, Inc "^purism,.*": description: Purism, SPC + "^puya,.*": + description: Puya Semiconductor (Shanghai) Co., Ltd. "^qca,.*": description: Qualcomm Atheros, Inc. "^qcom,.*": From 36036a164fac96727ed724a388dae38d2f5f21c1 Mon Sep 17 00:00:00 2001 From: Luca Weiss Date: Fri, 3 Jan 2025 12:11:59 +0100 Subject: [PATCH 06/52] dt-bindings: eeprom: at24: Add compatible for Puya P24C256C Add the compatible for an 256Kb EEPROM from Puya. Signed-off-by: Luca Weiss Acked-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250103-fp5-cam-eeprom-v1-3-88dee1b36f8e@fairphone.com Signed-off-by: Bartosz Golaszewski --- Documentation/devicetree/bindings/eeprom/at24.yaml | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/eeprom/at24.yaml b/Documentation/devicetree/bindings/eeprom/at24.yaml index a2970c7c8f276..c9e4afbdc4480 100644 --- a/Documentation/devicetree/bindings/eeprom/at24.yaml +++ b/Documentation/devicetree/bindings/eeprom/at24.yaml @@ -138,6 +138,10 @@ properties: - renesas,r1ex24128 - samsung,s524ad0xd1 - const: atmel,24c128 + - items: + - enum: + - puya,p24c256c + - const: atmel,24c256 - items: - const: microchip,24aa025e48 - items: From 440ae6f03098133014daa9dd1390afaa8ad530fa Mon Sep 17 00:00:00 2001 From: Wolfram Sang Date: Mon, 2 Dec 2024 09:26:58 +0100 Subject: [PATCH 07/52] i2c: keba: drop check because i2c_unregister_device() is NULL safe No need to check the argument of i2c_unregister_device() because the function itself does it. Signed-off-by: Wolfram Sang Signed-off-by: Andi Shyti --- drivers/i2c/busses/i2c-keba.c | 8 ++------ 1 file changed, 2 insertions(+), 6 deletions(-) diff --git a/drivers/i2c/busses/i2c-keba.c b/drivers/i2c/busses/i2c-keba.c index 759732a07ef08..7b9ed2592f5bc 100644 --- a/drivers/i2c/busses/i2c-keba.c +++ b/drivers/i2c/busses/i2c-keba.c @@ -464,12 +464,8 @@ static void ki2c_unregister_devices(struct ki2c *ki2c) { int i; - for (i = 0; i < ki2c->client_size; i++) { - struct i2c_client *client = ki2c->client[i]; - - if (client) - i2c_unregister_device(client); - } + for (i = 0; i < ki2c->client_size; i++) + i2c_unregister_device(ki2c->client[i]); } static int ki2c_register_devices(struct ki2c *ki2c) From cf30675e4d0631eac6634b2ae3f77b7b0eafe447 Mon Sep 17 00:00:00 2001 From: Carlos Song Date: Mon, 25 Nov 2024 22:15:21 +0800 Subject: [PATCH 08/52] i2c: imx: fix divide by zero warning Add "i2c_clk_rate / 2" check to avoid "divide by zero warning". i2c_clk_rate may be zero if i2c clock is disabled. Signed-off-by: Carlos Song Signed-off-by: Clark Wang Signed-off-by: Haibo Chen Reviewed-by: Frank Li Signed-off-by: Andi Shyti --- drivers/i2c/busses/i2c-imx.c | 23 +++++++++++++++++------ 1 file changed, 17 insertions(+), 6 deletions(-) diff --git a/drivers/i2c/busses/i2c-imx.c b/drivers/i2c/busses/i2c-imx.c index 5c9a8dfbc4a00..da77ba5ee5793 100644 --- a/drivers/i2c/busses/i2c-imx.c +++ b/drivers/i2c/busses/i2c-imx.c @@ -621,8 +621,8 @@ static int i2c_imx_acked(struct imx_i2c_struct *i2c_imx) return 0; } -static void i2c_imx_set_clk(struct imx_i2c_struct *i2c_imx, - unsigned int i2c_clk_rate) +static int i2c_imx_set_clk(struct imx_i2c_struct *i2c_imx, + unsigned int i2c_clk_rate) { struct imx_i2c_clk_pair *i2c_clk_div = i2c_imx->hwdata->clk_div; unsigned int div; @@ -637,7 +637,11 @@ static void i2c_imx_set_clk(struct imx_i2c_struct *i2c_imx, /* Divider value calculation */ if (i2c_imx->cur_clk == i2c_clk_rate) - return; + return 0; + + /* Keep the denominator of the following program always NOT equal to 0. */ + if (!(i2c_clk_rate / 2)) + return -EINVAL; i2c_imx->cur_clk = i2c_clk_rate; @@ -668,6 +672,8 @@ static void i2c_imx_set_clk(struct imx_i2c_struct *i2c_imx, dev_dbg(&i2c_imx->adapter.dev, "IFDR[IC]=0x%x, REAL DIV=%d\n", i2c_clk_div[i].val, i2c_clk_div[i].div); #endif + + return 0; } static int i2c_imx_clk_notifier_call(struct notifier_block *nb, @@ -677,11 +683,12 @@ static int i2c_imx_clk_notifier_call(struct notifier_block *nb, struct imx_i2c_struct *i2c_imx = container_of(nb, struct imx_i2c_struct, clk_change_nb); + int ret = 0; if (action & POST_RATE_CHANGE) - i2c_imx_set_clk(i2c_imx, ndata->new_rate); + ret = i2c_imx_set_clk(i2c_imx, ndata->new_rate); - return NOTIFY_OK; + return notifier_from_errno(ret); } static int i2c_imx_start(struct imx_i2c_struct *i2c_imx, bool atomic) @@ -1780,7 +1787,11 @@ static int i2c_imx_probe(struct platform_device *pdev) i2c_imx->bitrate = pdata->bitrate; i2c_imx->clk_change_nb.notifier_call = i2c_imx_clk_notifier_call; clk_notifier_register(i2c_imx->clk, &i2c_imx->clk_change_nb); - i2c_imx_set_clk(i2c_imx, clk_get_rate(i2c_imx->clk)); + ret = i2c_imx_set_clk(i2c_imx, clk_get_rate(i2c_imx->clk)); + if (ret < 0) { + dev_err(&pdev->dev, "can't get I2C clock\n"); + goto clk_notifier_unregister; + } i2c_imx_reset_regs(i2c_imx); From 358025ac091e5a54f9819b33ee9c7cb07c55ee5d Mon Sep 17 00:00:00 2001 From: Carlos Song Date: Mon, 25 Nov 2024 22:21:08 +0800 Subject: [PATCH 09/52] i2c: imx: make controller available until system suspend_noirq() and from resume_noirq() Put runtime PM to resume state between suspend() and suspend_noirq(), resume_noirq() and resume(), because some I2C devices need the controller on to perform communication during this period. The controller can't be woken up once runtime pm is disabled and in runtime autosuspended state. The problem can be easily reproduced on the I.MX8MQ platform: the PMIC needs to be used to enable regulator when the system resumes. When the PMIC uses the I2C controller, I2C runtime pm has not been enabled, so in i2c xfer(), pm_runtime_resume_and_get() will return an error, which causes data transfer to fail. Therefore, regulators cannot be enabled and system resume hangs. Here is resume error log: [ 53.888902] galcore 38000000.gpu3d: PM: calling genpd_resume_noirq @ 529, parent: platform [ 53.897203] i2c_imx_xfer, pm_runtime_resume_and_get is -13 [ 53.902713] imx-pgc imx-pgc-domain.5: failed to enable regulator: -EACCES [ 53.909518] galcore 38000000.gpu3d: PM: genpd_resume_noirq returned 0 after 12331 usecs [ 53.917545] mxc_hantro 38300000.vpu: PM: calling genpd_resume_noirq @ 529, parent: soc@0 [ 53.925659] i2c_imx_xfer, pm_runtime_resume_and_get is -13 [ 53.931157] imx-pgc imx-pgc-domain.6: failed to enable regulator: -EACCES I.MX8MQ system resume normally after applying the fix. Here is resume log: [ 71.068807] galcore 38000000.gpu3d: PM: calling genpd_resume_noirq @ 530, parent: platform [ 71.077103] i2c_imx_xfer, pm_runtime_resume_and_get is 0 [ 71.083578] galcore 38000000.gpu3d: PM: genpd_resume_noirq returned 0 after 6490 usecs [ 71.091526] mxc_hantro 38300000.vpu: PM: calling genpd_resume_noirq @ 530, parent: soc@0 [ 71.099638] i2c_imx_xfer, pm_runtime_resume_and_get is 0 [ 71.106091] mxc_hantro 38300000.vpu: PM: genpd_resume_noirq returned 0 after 6458 usecs Signed-off-by: Carlos Song Signed-off-by: Haibo Chen Reviewed-by: Frank Li Link: https://lore.kernel.org/r/20241125142108.1613016-1-carlos.song@nxp.com Signed-off-by: Andi Shyti --- drivers/i2c/busses/i2c-imx.c | 39 +++++++++++++++++++++++++++++++++++- 1 file changed, 38 insertions(+), 1 deletion(-) diff --git a/drivers/i2c/busses/i2c-imx.c b/drivers/i2c/busses/i2c-imx.c index da77ba5ee5793..167985f60d278 100644 --- a/drivers/i2c/busses/i2c-imx.c +++ b/drivers/i2c/busses/i2c-imx.c @@ -1767,7 +1767,8 @@ static int i2c_imx_probe(struct platform_device *pdev) goto rpm_disable; /* Request IRQ */ - ret = request_irq(irq, i2c_imx_isr, IRQF_SHARED, pdev->name, i2c_imx); + ret = request_irq(irq, i2c_imx_isr, IRQF_SHARED | IRQF_NO_SUSPEND, + pdev->name, i2c_imx); if (ret) { dev_err(&pdev->dev, "can't claim irq %d\n", irq); goto rpm_disable; @@ -1885,7 +1886,43 @@ static int i2c_imx_runtime_resume(struct device *dev) return ret; } +static int i2c_imx_suspend(struct device *dev) +{ + /* + * Some I2C devices may need the I2C controller to remain active + * during resume_noirq() or suspend_noirq(). If the controller is + * autosuspended, there is no way to wake it up once runtime PM is + * disabled (in suspend_late()). + * + * During system resume, the I2C controller will be available only + * after runtime PM is re-enabled (in resume_early()). However, this + * may be too late for some devices. + * + * Wake up the controller in the suspend() callback while runtime PM + * is still enabled. The I2C controller will remain available until + * the suspend_noirq() callback (pm_runtime_force_suspend()) is + * called. During resume, the I2C controller can be restored by the + * resume_noirq() callback (pm_runtime_force_resume()). + * + * Finally, the resume() callback re-enables autosuspend, ensuring + * the I2C controller remains available until the system enters + * suspend_noirq() and from resume_noirq(). + */ + return pm_runtime_resume_and_get(dev); +} + +static int i2c_imx_resume(struct device *dev) +{ + pm_runtime_mark_last_busy(dev); + pm_runtime_put_autosuspend(dev); + + return 0; +} + static const struct dev_pm_ops i2c_imx_pm_ops = { + NOIRQ_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, + pm_runtime_force_resume) + SYSTEM_SLEEP_PM_OPS(i2c_imx_suspend, i2c_imx_resume) RUNTIME_PM_OPS(i2c_imx_runtime_suspend, i2c_imx_runtime_resume, NULL) }; From 576eba03c99435380d155e5f71d5d7603b9178f6 Mon Sep 17 00:00:00 2001 From: Carlos Song Date: Mon, 23 Dec 2024 11:43:43 +0800 Subject: [PATCH 10/52] i2c: imx: switch different pinctrl state in different system power status Switch different pinctrl state in different system power status. Signed-off-by: Carlos Song Reviewed-by: Frank Li Acked-by: Oleksij Rempel Link: https://lore.kernel.org/r/20241223034343.544002-1-carlos.song@nxp.com Signed-off-by: Andi Shyti --- drivers/i2c/busses/i2c-imx.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/drivers/i2c/busses/i2c-imx.c b/drivers/i2c/busses/i2c-imx.c index 167985f60d278..1f441227bfdcb 100644 --- a/drivers/i2c/busses/i2c-imx.c +++ b/drivers/i2c/busses/i2c-imx.c @@ -1870,8 +1870,7 @@ static int i2c_imx_runtime_suspend(struct device *dev) struct imx_i2c_struct *i2c_imx = dev_get_drvdata(dev); clk_disable(i2c_imx->clk); - - return 0; + return pinctrl_pm_select_sleep_state(dev); } static int i2c_imx_runtime_resume(struct device *dev) @@ -1879,6 +1878,10 @@ static int i2c_imx_runtime_resume(struct device *dev) struct imx_i2c_struct *i2c_imx = dev_get_drvdata(dev); int ret; + ret = pinctrl_pm_select_default_state(dev); + if (ret) + return ret; + ret = clk_enable(i2c_imx->clk); if (ret) dev_err(dev, "can't enable I2C clock, ret=%d\n", ret); From 4a34b9bf5f6f3f3ed910863fd1b4741a62864d4b Mon Sep 17 00:00:00 2001 From: Tyrone Ting Date: Thu, 19 Dec 2024 17:08:56 +0800 Subject: [PATCH 11/52] i2c: npcm: Modify timeout evaluation mechanism The users want to connect a lot of masters on the same bus. This timeout is used to determine the time it takes to take bus ownership. The transactions are very long, so waiting 35ms is not enough. Increase the timeout and treat it as the total timeout, including retries. The total timeout is 2 seconds now. The i2c core layer will have chances to retry to call the i2c driver transfer function if the i2c driver reports that the bus is busy and returns -EAGAIN. Signed-off-by: Tyrone Ting Reviewed-by: Tali Perry Link: https://lore.kernel.org/r/20241219090859.18722-2-kfting@nuvoton.com Signed-off-by: Andi Shyti --- drivers/i2c/busses/i2c-npcm7xx.c | 24 +++++++++++++++--------- 1 file changed, 15 insertions(+), 9 deletions(-) diff --git a/drivers/i2c/busses/i2c-npcm7xx.c b/drivers/i2c/busses/i2c-npcm7xx.c index 482a0074d448c..c96a25d37c14c 100644 --- a/drivers/i2c/busses/i2c-npcm7xx.c +++ b/drivers/i2c/busses/i2c-npcm7xx.c @@ -2132,19 +2132,12 @@ static int npcm_i2c_master_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, } } - /* - * Adaptive TimeOut: estimated time in usec + 100% margin: - * 2: double the timeout for clock stretching case - * 9: bits per transaction (including the ack/nack) - */ - timeout_usec = (2 * 9 * USEC_PER_SEC / bus->bus_freq) * (2 + nread + nwrite); - timeout = max_t(unsigned long, bus->adap.timeout, usecs_to_jiffies(timeout_usec)); if (nwrite >= 32 * 1024 || nread >= 32 * 1024) { dev_err(bus->dev, "i2c%d buffer too big\n", bus->num); return -EINVAL; } - time_left = jiffies + timeout + 1; + time_left = jiffies + bus->adap.timeout / bus->adap.retries + 1; do { /* * we must clear slave address immediately when the bus is not @@ -2192,6 +2185,14 @@ static int npcm_i2c_master_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, if (npcm_i2c_master_start_xmit(bus, slave_addr, nwrite, nread, write_data, read_data, read_PEC, read_block)) { + /* + * Adaptive TimeOut: estimated time in usec + 100% margin: + * 2: double the timeout for clock stretching case + * 9: bits per transaction (including the ack/nack) + */ + timeout_usec = (2 * 9 * USEC_PER_SEC / bus->bus_freq) * (2 + nread + nwrite); + timeout = max_t(unsigned long, bus->adap.timeout / bus->adap.retries, + usecs_to_jiffies(timeout_usec)); time_left = wait_for_completion_timeout(&bus->cmd_complete, timeout); @@ -2317,7 +2318,12 @@ static int npcm_i2c_probe_bus(struct platform_device *pdev) adap = &bus->adap; adap->owner = THIS_MODULE; adap->retries = 3; - adap->timeout = msecs_to_jiffies(35); + /* + * The users want to connect a lot of masters on the same bus. + * This timeout is used to determine the time it takes to take bus ownership. + * The transactions are very long, so waiting 35ms is not enough. + */ + adap->timeout = 2 * HZ; adap->algo = &npcm_i2c_algo; adap->quirks = &npcm_i2c_quirks; adap->algo_data = bus; From 862dd4f7733a694b12ad9e023ce639e9c21d6abd Mon Sep 17 00:00:00 2001 From: Tyrone Ting Date: Thu, 19 Dec 2024 17:08:57 +0800 Subject: [PATCH 12/52] i2c: npcm: Assign client address earlier for `i2c_recover_bus()` Store the client address earlier since it might get called in the i2c_recover_bus() logic flow at the early stage of npcm_i2c_master_xfer(). Signed-off-by: Tyrone Ting Reviewed-by: Tali Perry Link: https://lore.kernel.org/r/20241219090859.18722-3-kfting@nuvoton.com Signed-off-by: Andi Shyti --- drivers/i2c/busses/i2c-npcm7xx.c | 23 +++++++++++++++++------ 1 file changed, 17 insertions(+), 6 deletions(-) diff --git a/drivers/i2c/busses/i2c-npcm7xx.c b/drivers/i2c/busses/i2c-npcm7xx.c index c96a25d37c14c..760608fdd075a 100644 --- a/drivers/i2c/busses/i2c-npcm7xx.c +++ b/drivers/i2c/busses/i2c-npcm7xx.c @@ -2035,7 +2035,7 @@ static irqreturn_t npcm_i2c_bus_irq(int irq, void *dev_id) } static bool npcm_i2c_master_start_xmit(struct npcm_i2c *bus, - u8 slave_addr, u16 nwrite, u16 nread, + u16 nwrite, u16 nread, u8 *write_data, u8 *read_data, bool use_PEC, bool use_read_block) { @@ -2043,7 +2043,6 @@ static bool npcm_i2c_master_start_xmit(struct npcm_i2c *bus, bus->cmd_err = -EBUSY; return false; } - bus->dest_addr = slave_addr << 1; bus->wr_buf = write_data; bus->wr_size = nwrite; bus->wr_ind = 0; @@ -2086,7 +2085,6 @@ static int npcm_i2c_master_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, unsigned long time_left, flags; u16 nwrite, nread; u8 *write_data, *read_data; - u8 slave_addr; unsigned long timeout; bool read_block = false; bool read_PEC = false; @@ -2099,7 +2097,6 @@ static int npcm_i2c_master_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, } msg0 = &msgs[0]; - slave_addr = msg0->addr; if (msg0->flags & I2C_M_RD) { /* read */ nwrite = 0; write_data = NULL; @@ -2155,6 +2152,21 @@ static int npcm_i2c_master_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, } while (time_is_after_jiffies(time_left) && bus_busy); + /* + * Store the address early in a global position to ensure it is + * accessible for a potential call to i2c_recover_bus(). + * + * Since the transfer might be a read operation, remove the I2C_M_RD flag + * from the bus->dest_addr for the i2c_recover_bus() call later. + * + * The i2c_recover_bus() uses the address in a write direction to recover + * the i2c bus if some error condition occurs. + * + * Remove the I2C_M_RD flag from the address since npcm_i2c_master_start_xmit() + * handles the read/write operation internally. + */ + bus->dest_addr = i2c_8bit_addr_from_msg(msg0) & ~I2C_M_RD; + /* * Check the BER (bus error) state, when ber_state is true, it means that the module * detects the bus error which is caused by some factor like that the electricity @@ -2172,7 +2184,6 @@ static int npcm_i2c_master_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, } npcm_i2c_init_params(bus); - bus->dest_addr = slave_addr; bus->msgs = msgs; bus->msgs_num = num; bus->cmd_err = 0; @@ -2182,7 +2193,7 @@ static int npcm_i2c_master_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, npcm_i2c_int_enable(bus, true); - if (npcm_i2c_master_start_xmit(bus, slave_addr, nwrite, nread, + if (npcm_i2c_master_start_xmit(bus, nwrite, nread, write_data, read_data, read_PEC, read_block)) { /* From 6ddc9132bc42a7dfcaca0cce4ff0f94e69bc5114 Mon Sep 17 00:00:00 2001 From: Tyrone Ting Date: Thu, 19 Dec 2024 17:08:58 +0800 Subject: [PATCH 13/52] i2c: npcm: use i2c frequency table Modify i2c frequency from table parameters for NPCM i2c modules. Supported frequencies are: 1. 100KHz 2. 400KHz 3. 1MHz The original equations were tested on a variety of chips and base clocks. Since we added devices that use higher frequencies of the module we saw that there is a mismatch between the equation and the actual results on the bus itself, measured on scope. Meanwhile, the equations were not accurate to begin with. They are an approximation of the ideal value. The ideal value is calculated per frequency of the core module. So instead of using the equations we did an optimization per module frequency, verified on a device. Most of the work was focused on the rise time of the SCL and SDA, which depends on external load of the bus and PU. Different PCB designs, or specifically to this case: the number and type of targets on the bus, impact the required values for the timing registers. Users can recalculate the numbers for each bus and get an even better optimization, but our users chose not to. We manually picked values per frequency that match the entire valid range of targets (from 1 to max number). Then we check against the AMR described in SMB spec and make sure that none of the values is exceeding. This process was led by the chip architect and included a lot of testing. Signed-off-by: Tyrone Ting Reviewed-by: Tali Perry Link: https://lore.kernel.org/r/20241219090859.18722-4-kfting@nuvoton.com Signed-off-by: Andi Shyti --- drivers/i2c/busses/i2c-npcm7xx.c | 374 ++++++++++++++++++++++++------- 1 file changed, 288 insertions(+), 86 deletions(-) diff --git a/drivers/i2c/busses/i2c-npcm7xx.c b/drivers/i2c/busses/i2c-npcm7xx.c index 760608fdd075a..1aae1a8a80558 100644 --- a/drivers/i2c/busses/i2c-npcm7xx.c +++ b/drivers/i2c/busses/i2c-npcm7xx.c @@ -263,6 +263,265 @@ static const int npcm_i2caddr[I2C_NUM_OWN_ADDR] = { #define I2C_FREQ_MIN_HZ 10000 #define I2C_FREQ_MAX_HZ I2C_MAX_FAST_MODE_PLUS_FREQ +struct smb_timing_t { + u32 core_clk; + u8 hldt; + u8 dbcnt; + u16 sclfrq; + u8 scllt; + u8 sclht; + bool fast_mode; +}; + +static struct smb_timing_t smb_timing_100khz[] = { + { + .core_clk = 100000000, .hldt = 0x2A, .dbcnt = 0x4, + .sclfrq = 0xFB, .scllt = 0x0, .sclht = 0x0, + .fast_mode = false, + }, + { + .core_clk = 62500000, .hldt = 0x2A, .dbcnt = 0x1, + .sclfrq = 0x9D, .scllt = 0x0, .sclht = 0x0, + .fast_mode = false, + }, + { + .core_clk = 50000000, .hldt = 0x2A, .dbcnt = 0x1, + .sclfrq = 0x7E, .scllt = 0x0, .sclht = 0x0, + .fast_mode = false, + }, + { + .core_clk = 48000000, .hldt = 0x2A, .dbcnt = 0x1, + .sclfrq = 0x79, .scllt = 0x0, .sclht = 0x0, + .fast_mode = false, + }, + { + .core_clk = 40000000, .hldt = 0x2A, .dbcnt = 0x1, + .sclfrq = 0x65, .scllt = 0x0, .sclht = 0x0, + .fast_mode = false, + }, + { + .core_clk = 30000000, .hldt = 0x2A, .dbcnt = 0x1, + .sclfrq = 0x4C, .scllt = 0x0, .sclht = 0x0, + .fast_mode = false, + }, + { + .core_clk = 29000000, .hldt = 0x2A, .dbcnt = 0x1, + .sclfrq = 0x49, .scllt = 0x0, .sclht = 0x0, + .fast_mode = false, + }, + { + .core_clk = 26000000, .hldt = 0x2A, .dbcnt = 0x1, + .sclfrq = 0x42, .scllt = 0x0, .sclht = 0x0, + .fast_mode = false, + }, + { + .core_clk = 25000000, .hldt = 0x2A, .dbcnt = 0x1, + .sclfrq = 0x3F, .scllt = 0x0, .sclht = 0x0, + .fast_mode = false, + }, + { + .core_clk = 24000000, .hldt = 0x2A, .dbcnt = 0x1, + .sclfrq = 0x3D, .scllt = 0x0, .sclht = 0x0, + .fast_mode = false, + }, + { + .core_clk = 20000000, .hldt = 0x2A, .dbcnt = 0x1, + .sclfrq = 0x33, .scllt = 0x0, .sclht = 0x0, + .fast_mode = false, + }, + { + .core_clk = 16180000, .hldt = 0x2A, .dbcnt = 0x1, + .sclfrq = 0x29, .scllt = 0x0, .sclht = 0x0, + .fast_mode = false, + }, + { + .core_clk = 15000000, .hldt = 0x23, .dbcnt = 0x1, + .sclfrq = 0x26, .scllt = 0x0, .sclht = 0x0, + .fast_mode = false, + }, + { + .core_clk = 13000000, .hldt = 0x1D, .dbcnt = 0x1, + .sclfrq = 0x21, .scllt = 0x0, .sclht = 0x0, + .fast_mode = false, + }, + { + .core_clk = 12000000, .hldt = 0x1B, .dbcnt = 0x1, + .sclfrq = 0x1F, .scllt = 0x0, .sclht = 0x0, + .fast_mode = false, + }, + { + .core_clk = 10000000, .hldt = 0x18, .dbcnt = 0x1, + .sclfrq = 0x1A, .scllt = 0x0, .sclht = 0x0, + .fast_mode = false, + }, + { + .core_clk = 9000000, .hldt = 0x16, .dbcnt = 0x1, + .sclfrq = 0x17, .scllt = 0x0, .sclht = 0x0, + .fast_mode = false, + }, + { + .core_clk = 8090000, .hldt = 0x14, .dbcnt = 0x1, + .sclfrq = 0x15, .scllt = 0x0, .sclht = 0x0, + .fast_mode = false, + }, + { + .core_clk = 7500000, .hldt = 0x7, .dbcnt = 0x1, + .sclfrq = 0x13, .scllt = 0x0, .sclht = 0x0, + .fast_mode = false, + }, + { + .core_clk = 6500000, .hldt = 0xE, .dbcnt = 0x1, + .sclfrq = 0x11, .scllt = 0x0, .sclht = 0x0, + .fast_mode = false, + }, + { + .core_clk = 4000000, .hldt = 0x9, .dbcnt = 0x1, + .sclfrq = 0xB, .scllt = 0x0, .sclht = 0x0, + .fast_mode = false, + }, +}; + +static struct smb_timing_t smb_timing_400khz[] = { + { + .core_clk = 100000000, .hldt = 0x2A, .dbcnt = 0x3, + .sclfrq = 0x0, .scllt = 0x47, .sclht = 0x35, + .fast_mode = true, + }, + { + .core_clk = 62500000, .hldt = 0x2A, .dbcnt = 0x2, + .sclfrq = 0x0, .scllt = 0x2C, .sclht = 0x22, + .fast_mode = true, + }, + { + .core_clk = 50000000, .hldt = 0x21, .dbcnt = 0x1, + .sclfrq = 0x0, .scllt = 0x24, .sclht = 0x1B, + .fast_mode = true, + }, + { + .core_clk = 48000000, .hldt = 0x1E, .dbcnt = 0x1, + .sclfrq = 0x0, .scllt = 0x24, .sclht = 0x19, + .fast_mode = true, + }, + { + .core_clk = 40000000, .hldt = 0x1B, .dbcnt = 0x1, + .sclfrq = 0x0, .scllt = 0x1E, .sclht = 0x14, + .fast_mode = true, + }, + { + .core_clk = 33000000, .hldt = 0x15, .dbcnt = 0x1, + .sclfrq = 0x0, .scllt = 0x19, .sclht = 0x11, + .fast_mode = true, + }, + { + .core_clk = 30000000, .hldt = 0x15, .dbcnt = 0x1, + .sclfrq = 0x0, .scllt = 0x19, .sclht = 0xD, + .fast_mode = true, + }, + { + .core_clk = 29000000, .hldt = 0x11, .dbcnt = 0x1, + .sclfrq = 0x0, .scllt = 0x15, .sclht = 0x10, + .fast_mode = true, + }, + { + .core_clk = 26000000, .hldt = 0x10, .dbcnt = 0x1, + .sclfrq = 0x0, .scllt = 0x13, .sclht = 0xE, + .fast_mode = true, + }, + { + .core_clk = 25000000, .hldt = 0xF, .dbcnt = 0x1, + .sclfrq = 0x0, .scllt = 0x13, .sclht = 0xD, + .fast_mode = true, + }, + { + .core_clk = 24000000, .hldt = 0xD, .dbcnt = 0x1, + .sclfrq = 0x0, .scllt = 0x12, .sclht = 0xD, + .fast_mode = true, + }, + { + .core_clk = 20000000, .hldt = 0xB, .dbcnt = 0x1, + .sclfrq = 0x0, .scllt = 0xF, .sclht = 0xA, + .fast_mode = true, + }, + { + .core_clk = 16180000, .hldt = 0xA, .dbcnt = 0x1, + .sclfrq = 0x0, .scllt = 0xC, .sclht = 0x9, + .fast_mode = true, + }, + { + .core_clk = 15000000, .hldt = 0x9, .dbcnt = 0x1, + .sclfrq = 0x0, .scllt = 0xB, .sclht = 0x8, + .fast_mode = true, + }, + { + .core_clk = 13000000, .hldt = 0x7, .dbcnt = 0x1, + .sclfrq = 0x0, .scllt = 0xA, .sclht = 0x7, + .fast_mode = true, + }, + { + .core_clk = 12000000, .hldt = 0x7, .dbcnt = 0x1, + .sclfrq = 0x0, .scllt = 0xA, .sclht = 0x6, + .fast_mode = true, + }, + { + .core_clk = 10000000, .hldt = 0x6, .dbcnt = 0x1, + .sclfrq = 0x0, .scllt = 0x8, .sclht = 0x5, + .fast_mode = true, + }, +}; + +static struct smb_timing_t smb_timing_1000khz[] = { + { + .core_clk = 100000000, .hldt = 0x15, .dbcnt = 0x4, + .sclfrq = 0x0, .scllt = 0x1C, .sclht = 0x15, + .fast_mode = true, + }, + { + .core_clk = 62500000, .hldt = 0xF, .dbcnt = 0x3, + .sclfrq = 0x0, .scllt = 0x11, .sclht = 0xE, + .fast_mode = true, + }, + { + .core_clk = 50000000, .hldt = 0xA, .dbcnt = 0x2, + .sclfrq = 0x0, .scllt = 0xE, .sclht = 0xB, + .fast_mode = true, + }, + { + .core_clk = 48000000, .hldt = 0x9, .dbcnt = 0x2, + .sclfrq = 0x0, .scllt = 0xD, .sclht = 0xB, + .fast_mode = true, + }, + { + .core_clk = 41000000, .hldt = 0x9, .dbcnt = 0x2, + .sclfrq = 0x0, .scllt = 0xC, .sclht = 0x9, + .fast_mode = true, + }, + { + .core_clk = 40000000, .hldt = 0x8, .dbcnt = 0x2, + .sclfrq = 0x0, .scllt = 0xB, .sclht = 0x9, + .fast_mode = true, + }, + { + .core_clk = 33000000, .hldt = 0x7, .dbcnt = 0x1, + .sclfrq = 0x0, .scllt = 0xA, .sclht = 0x7, + .fast_mode = true, + }, + { + .core_clk = 25000000, .hldt = 0x4, .dbcnt = 0x1, + .sclfrq = 0x0, .scllt = 0x7, .sclht = 0x6, + .fast_mode = true, + }, + { + .core_clk = 24000000, .hldt = 0x7, .dbcnt = 0x1, + .sclfrq = 0x0, .scllt = 0x8, .sclht = 0x5, + .fast_mode = true, + }, + { + .core_clk = 20000000, .hldt = 0x4, .dbcnt = 0x1, + .sclfrq = 0x0, .scllt = 0x6, .sclht = 0x4, + .fast_mode = true, + }, +}; + struct npcm_i2c_data { u8 fifo_size; u32 segctl_init_val; @@ -1805,102 +2064,45 @@ static void npcm_i2c_recovery_init(struct i2c_adapter *_adap) */ static int npcm_i2c_init_clk(struct npcm_i2c *bus, u32 bus_freq_hz) { - u32 k1 = 0; - u32 k2 = 0; - u8 dbnct = 0; - u32 sclfrq = 0; - u8 hldt = 7; + struct smb_timing_t *smb_timing; + u8 scl_table_cnt = 0, table_size = 0; u8 fast_mode = 0; - u32 src_clk_khz; - u32 bus_freq_khz; - src_clk_khz = bus->apb_clk / 1000; - bus_freq_khz = bus_freq_hz / 1000; bus->bus_freq = bus_freq_hz; - /* 100KHz and below: */ - if (bus_freq_hz <= I2C_MAX_STANDARD_MODE_FREQ) { - sclfrq = src_clk_khz / (bus_freq_khz * 4); - - if (sclfrq < SCLFRQ_MIN || sclfrq > SCLFRQ_MAX) - return -EDOM; - - if (src_clk_khz >= 40000) - hldt = 17; - else if (src_clk_khz >= 12500) - hldt = 15; - else - hldt = 7; - } - - /* 400KHz: */ - else if (bus_freq_hz <= I2C_MAX_FAST_MODE_FREQ) { - sclfrq = 0; + switch (bus_freq_hz) { + case I2C_MAX_STANDARD_MODE_FREQ: + smb_timing = smb_timing_100khz; + table_size = ARRAY_SIZE(smb_timing_100khz); + break; + case I2C_MAX_FAST_MODE_FREQ: + smb_timing = smb_timing_400khz; + table_size = ARRAY_SIZE(smb_timing_400khz); fast_mode = I2CCTL3_400K_MODE; - - if (src_clk_khz < 7500) - /* 400KHZ cannot be supported for core clock < 7.5MHz */ - return -EDOM; - - else if (src_clk_khz >= 50000) { - k1 = 80; - k2 = 48; - hldt = 12; - dbnct = 7; - } - - /* Master or Slave with frequency > 25MHz */ - else if (src_clk_khz > 25000) { - hldt = clk_coef(src_clk_khz, 300) + 7; - k1 = clk_coef(src_clk_khz, 1600); - k2 = clk_coef(src_clk_khz, 900); - } - } - - /* 1MHz: */ - else if (bus_freq_hz <= I2C_MAX_FAST_MODE_PLUS_FREQ) { - sclfrq = 0; + break; + case I2C_MAX_FAST_MODE_PLUS_FREQ: + smb_timing = smb_timing_1000khz; + table_size = ARRAY_SIZE(smb_timing_1000khz); fast_mode = I2CCTL3_400K_MODE; - - /* 1MHZ cannot be supported for core clock < 24 MHz */ - if (src_clk_khz < 24000) - return -EDOM; - - k1 = clk_coef(src_clk_khz, 620); - k2 = clk_coef(src_clk_khz, 380); - - /* Core clk > 40 MHz */ - if (src_clk_khz > 40000) { - /* - * Set HLDT: - * SDA hold time: (HLDT-7) * T(CLK) >= 120 - * HLDT = 120/T(CLK) + 7 = 120 * FREQ(CLK) + 7 - */ - hldt = clk_coef(src_clk_khz, 120) + 7; - } else { - hldt = 7; - dbnct = 2; - } + break; + default: + return -EINVAL; } - /* Frequency larger than 1 MHz is not supported */ - else - return -EINVAL; + for (scl_table_cnt = 0; scl_table_cnt < table_size; scl_table_cnt++) + if (bus->apb_clk >= smb_timing[scl_table_cnt].core_clk) + break; - if (bus_freq_hz >= I2C_MAX_FAST_MODE_FREQ) { - k1 = round_up(k1, 2); - k2 = round_up(k2 + 1, 2); - if (k1 < SCLFRQ_MIN || k1 > SCLFRQ_MAX || - k2 < SCLFRQ_MIN || k2 > SCLFRQ_MAX) - return -EDOM; - } + if (scl_table_cnt == table_size) + return -EINVAL; /* write sclfrq value. bits [6:0] are in I2CCTL2 reg */ - iowrite8(FIELD_PREP(I2CCTL2_SCLFRQ6_0, sclfrq & 0x7F), + iowrite8(FIELD_PREP(I2CCTL2_SCLFRQ6_0, smb_timing[scl_table_cnt].sclfrq & 0x7F), bus->reg + NPCM_I2CCTL2); /* bits [8:7] are in I2CCTL3 reg */ - iowrite8(fast_mode | FIELD_PREP(I2CCTL3_SCLFRQ8_7, (sclfrq >> 7) & 0x3), + iowrite8(FIELD_PREP(I2CCTL3_SCLFRQ8_7, (smb_timing[scl_table_cnt].sclfrq >> 7) & 0x3) | + fast_mode, bus->reg + NPCM_I2CCTL3); /* Select Bank 0 to access NPCM_I2CCTL4/NPCM_I2CCTL5 */ @@ -1912,13 +2114,13 @@ static int npcm_i2c_init_clk(struct npcm_i2c *bus, u32 bus_freq_hz) * k1 = 2 * SCLLT7-0 -> Low Time = k1 / 2 * k2 = 2 * SCLLT7-0 -> High Time = k2 / 2 */ - iowrite8(k1 / 2, bus->reg + NPCM_I2CSCLLT); - iowrite8(k2 / 2, bus->reg + NPCM_I2CSCLHT); + iowrite8(smb_timing[scl_table_cnt].scllt, bus->reg + NPCM_I2CSCLLT); + iowrite8(smb_timing[scl_table_cnt].sclht, bus->reg + NPCM_I2CSCLHT); - iowrite8(dbnct, bus->reg + NPCM_I2CCTL5); + iowrite8(smb_timing[scl_table_cnt].dbcnt, bus->reg + NPCM_I2CCTL5); } - iowrite8(hldt, bus->reg + NPCM_I2CCTL4); + iowrite8(smb_timing[scl_table_cnt].hldt, bus->reg + NPCM_I2CCTL4); /* Return to Bank 1, and stay there by default: */ npcm_i2c_select_bank(bus, I2C_BANK_1); From 8b56f98b28e6238bcfe00de743b4361d26a7f980 Mon Sep 17 00:00:00 2001 From: Charles Boyer Date: Thu, 19 Dec 2024 17:08:59 +0800 Subject: [PATCH 14/52] i2c: npcm: Enable slave in eob interrupt Nuvoton slave enable was in user space API call master_xfer, so it is subject to delays from the OS scheduler. If the BMC is not enabled for slave mode in time for master to send response, then it will NAK the address match. Then the PLDM request timeout occurs. If the slave enable is moved to the EOB interrupt service routine, then the BMC can be ready in slave mode by the time it needs to receive a response. Signed-off-by: Charles Boyer Signed-off-by: Vivekanand Veeracholan Signed-off-by: Tyrone Ting Reviewed-by: Tali Perry Link: https://lore.kernel.org/r/20241219090859.18722-5-kfting@nuvoton.com Signed-off-by: Andi Shyti --- drivers/i2c/busses/i2c-npcm7xx.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/i2c/busses/i2c-npcm7xx.c b/drivers/i2c/busses/i2c-npcm7xx.c index 1aae1a8a80558..3ca08b8ef8af3 100644 --- a/drivers/i2c/busses/i2c-npcm7xx.c +++ b/drivers/i2c/busses/i2c-npcm7xx.c @@ -1925,6 +1925,12 @@ static int npcm_i2c_int_master_handler(struct npcm_i2c *bus) (FIELD_GET(NPCM_I2CCST3_EO_BUSY, ioread8(bus->reg + NPCM_I2CCST3)))) { npcm_i2c_irq_handle_eob(bus); +#if IS_ENABLED(CONFIG_I2C_SLAVE) + /* reenable slave if it was enabled */ + if (bus->slave) + iowrite8(bus->slave->addr | NPCM_I2CADDR_SAEN, + bus->reg + NPCM_I2CADDR1); +#endif return 0; } From d9a13c08f88d696218a44658f290b1b433e787b6 Mon Sep 17 00:00:00 2001 From: Carlos Song Date: Thu, 26 Dec 2024 14:25:21 +0800 Subject: [PATCH 15/52] i2c: imx: support DMA defer probing Return -EPROBE_DEFER when dma_request_slave_channel() because DMA driver have not ready yet. Move i2c_imx_dma_request() before registering I2C adapter to avoid infinite loop of .probe() calls to the same driver, see "e8c220fac415 Revert "i2c: imx: improve the error handling in i2c_imx_dma_request()"" and "Documentation/driver-api/driver-model/driver.rst". Use CPU mode to avoid stuck registering i2c adapter when DMA resources are unavailable. Signed-off-by: Carlos Song Signed-off-by: Clark Wang Acked-by: Ahmad Fatoum Acked-by: Oleksij Rempel Link: https://lore.kernel.org/r/20241226062521.1004809-1-carlos.song@nxp.com Signed-off-by: Andi Shyti --- drivers/i2c/busses/i2c-imx.c | 30 ++++++++++++++++++++++-------- 1 file changed, 22 insertions(+), 8 deletions(-) diff --git a/drivers/i2c/busses/i2c-imx.c b/drivers/i2c/busses/i2c-imx.c index 1f441227bfdcb..ee0d25b498cb2 100644 --- a/drivers/i2c/busses/i2c-imx.c +++ b/drivers/i2c/busses/i2c-imx.c @@ -397,17 +397,16 @@ static void i2c_imx_reset_regs(struct imx_i2c_struct *i2c_imx) } /* Functions for DMA support */ -static void i2c_imx_dma_request(struct imx_i2c_struct *i2c_imx, - dma_addr_t phy_addr) +static int i2c_imx_dma_request(struct imx_i2c_struct *i2c_imx, dma_addr_t phy_addr) { struct imx_i2c_dma *dma; struct dma_slave_config dma_sconfig; - struct device *dev = &i2c_imx->adapter.dev; + struct device *dev = i2c_imx->adapter.dev.parent; int ret; dma = devm_kzalloc(dev, sizeof(*dma), GFP_KERNEL); if (!dma) - return; + return -ENOMEM; dma->chan_tx = dma_request_chan(dev, "tx"); if (IS_ERR(dma->chan_tx)) { @@ -452,7 +451,7 @@ static void i2c_imx_dma_request(struct imx_i2c_struct *i2c_imx, dev_info(dev, "using %s (tx) and %s (rx) for DMA transfers\n", dma_chan_name(dma->chan_tx), dma_chan_name(dma->chan_rx)); - return; + return 0; fail_rx: dma_release_channel(dma->chan_rx); @@ -460,6 +459,8 @@ static void i2c_imx_dma_request(struct imx_i2c_struct *i2c_imx, dma_release_channel(dma->chan_tx); fail_al: devm_kfree(dev, dma); + + return ret; } static void i2c_imx_dma_callback(void *arg) @@ -1802,6 +1803,22 @@ static int i2c_imx_probe(struct platform_device *pdev) if (ret == -EPROBE_DEFER) goto clk_notifier_unregister; + /* + * DMA mode should be optional for I2C, when encountering DMA errors, + * no need to exit I2C probe. Only print warning to show DMA error and + * use PIO mode directly to ensure I2C bus available as much as possible. + */ + ret = i2c_imx_dma_request(i2c_imx, phy_addr); + if (ret) { + if (ret == -EPROBE_DEFER) + goto clk_notifier_unregister; + else if (ret == -ENODEV) + dev_dbg(&pdev->dev, "Only use PIO mode\n"); + else + dev_warn(&pdev->dev, "Failed to setup DMA (%pe), only use PIO mode\n", + ERR_PTR(ret)); + } + /* Add I2C adapter */ ret = i2c_add_numbered_adapter(&i2c_imx->adapter); if (ret < 0) @@ -1816,9 +1833,6 @@ static int i2c_imx_probe(struct platform_device *pdev) i2c_imx->adapter.name); dev_info(&i2c_imx->adapter.dev, "IMX I2C adapter registered\n"); - /* Init DMA config if supported */ - i2c_imx_dma_request(i2c_imx, phy_addr); - return 0; /* Return OK */ clk_notifier_unregister: From 567ef9035f820ecd3e6fcc142003f396848b31f7 Mon Sep 17 00:00:00 2001 From: Biju Das Date: Mon, 16 Dec 2024 20:24:34 +0000 Subject: [PATCH 16/52] dt-bindings: i2c: renesas,riic: Document the R9A09G047 support Document support for the I2C Bus Interface (RIIC) found in the Renesas RZ/G3E (R9A09G047) SoC. This IP is compatible with Renesas RZ/V2H (R9A09G057) RIIC IP. Acked-by: Conor Dooley Reviewed-by: Geert Uytterhoeven Signed-off-by: Biju Das Link: https://lore.kernel.org/r/20241216202436.185773-1-biju.das.jz@bp.renesas.com Signed-off-by: Andi Shyti --- Documentation/devicetree/bindings/i2c/renesas,riic.yaml | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/i2c/renesas,riic.yaml b/Documentation/devicetree/bindings/i2c/renesas,riic.yaml index 505a8ec922668..1b7fed2326423 100644 --- a/Documentation/devicetree/bindings/i2c/renesas,riic.yaml +++ b/Documentation/devicetree/bindings/i2c/renesas,riic.yaml @@ -26,7 +26,9 @@ properties: - const: renesas,riic-rz # RZ/A or RZ/G2L - items: - - const: renesas,riic-r9a08g045 # RZ/G3S + - enum: + - renesas,riic-r9a08g045 # RZ/G3S + - renesas,riic-r9a09g047 # RZ/G3E - const: renesas,riic-r9a09g057 # RZ/V2H(P) - const: renesas,riic-r9a09g057 # RZ/V2H(P) @@ -89,6 +91,7 @@ if: - renesas,riic-r9a07g043 - renesas,riic-r9a07g044 - renesas,riic-r9a07g054 + - renesas,riic-r9a09g057 then: required: - resets From 4d51ac5b9b4e175abda13617a48639406d3ed7b1 Mon Sep 17 00:00:00 2001 From: Andi Shyti Date: Tue, 10 Dec 2024 23:16:41 +0100 Subject: [PATCH 17/52] i2c: nomadik: Enable compile testing for the Nomadik driver The AMBA bus header files do not generate compilation errors even when the AMBA bus is not enabled in Kconfig via ARM_AMBA. This allows the Nomadik driver to be compiled for testing purposes with the COMPILE_TEST option enabled. Cc: Linus Walleij Link: https://lore.kernel.org/r/20241210221641.2661577-1-andi.shyti@kernel.org Signed-off-by: Andi Shyti --- drivers/i2c/busses/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig index ceb3ecdf884b5..ae4772faa876f 100644 --- a/drivers/i2c/busses/Kconfig +++ b/drivers/i2c/busses/Kconfig @@ -910,7 +910,7 @@ config I2C_MXS config I2C_NOMADIK tristate "ST-Ericsson Nomadik/Ux500 I2C Controller" - depends on ARM_AMBA + depends on ARM_AMBA || COMPILE_TEST help If you say yes to this option, support will be included for the I2C interface from ST-Ericsson's Nomadik and Ux500 architectures, From f524707b44c96254c045dfbfe998f1a33e8595f5 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Tue, 3 Dec 2024 17:19:50 +0100 Subject: [PATCH 18/52] i2c: I2C_BRCMSTB should not default to y when compile-testing Merely enabling compile-testing should not enable additional functionality. Signed-off-by: Geert Uytterhoeven Acked-by: Florian Fainelli Link: https://lore.kernel.org/r/36b2923241f285595f43bb9565da352fd366c63e.1733242595.git.geert+renesas@glider.be Signed-off-by: Andi Shyti --- drivers/i2c/busses/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig index ae4772faa876f..eec95c724b25b 100644 --- a/drivers/i2c/busses/Kconfig +++ b/drivers/i2c/busses/Kconfig @@ -503,7 +503,7 @@ config I2C_BRCMSTB tristate "BRCM Settop/DSL I2C controller" depends on ARCH_BCM2835 || ARCH_BCMBCA || ARCH_BRCMSTB || \ BMIPS_GENERIC || COMPILE_TEST - default y + default ARCH_BCM2835 || ARCH_BCMBCA || ARCH_BRCMSTB || BMIPS_GENERIC help If you say yes to this option, support will be included for the I2C interface on the Broadcom Settop/DSL SoCs. From 2ee409c6a12d74cd1b16ca3690baa7d5ffffeb7d Mon Sep 17 00:00:00 2001 From: Manikanta Guntupalli Date: Tue, 10 Dec 2024 15:22:41 +0530 Subject: [PATCH 19/52] i2c: xiic: Relocate xiic_i2c_runtime_suspend and xiic_i2c_runtime_resume to facilitate atomic mode Relocate xiic_i2c_runtime_suspend and xiic_i2c_runtime_resume functions to avoid prototype statements in atomic mode changes. Signed-off-by: Manikanta Guntupalli Acked-by: Michal Simek Link: https://lore.kernel.org/r/20241210095242.1982770-2-manikanta.guntupalli@amd.com Signed-off-by: Andi Shyti --- drivers/i2c/busses/i2c-xiic.c | 46 +++++++++++++++++------------------ 1 file changed, 23 insertions(+), 23 deletions(-) diff --git a/drivers/i2c/busses/i2c-xiic.c b/drivers/i2c/busses/i2c-xiic.c index c4d3eb02da09f..f48e73f905e5d 100644 --- a/drivers/i2c/busses/i2c-xiic.c +++ b/drivers/i2c/busses/i2c-xiic.c @@ -238,6 +238,29 @@ static const struct timing_regs timing_reg_values[] = { static int xiic_start_xfer(struct xiic_i2c *i2c, struct i2c_msg *msgs, int num); static void __xiic_start_xfer(struct xiic_i2c *i2c); +static int __maybe_unused xiic_i2c_runtime_suspend(struct device *dev) +{ + struct xiic_i2c *i2c = dev_get_drvdata(dev); + + clk_disable(i2c->clk); + + return 0; +} + +static int __maybe_unused xiic_i2c_runtime_resume(struct device *dev) +{ + struct xiic_i2c *i2c = dev_get_drvdata(dev); + int ret; + + ret = clk_enable(i2c->clk); + if (ret) { + dev_err(dev, "Cannot enable clock.\n"); + return ret; + } + + return 0; +} + /* * For the register read and write functions, a little-endian and big-endian * version are necessary. Endianness is detected during the probe function. @@ -1365,29 +1388,6 @@ static void xiic_i2c_remove(struct platform_device *pdev) pm_runtime_dont_use_autosuspend(&pdev->dev); } -static int __maybe_unused xiic_i2c_runtime_suspend(struct device *dev) -{ - struct xiic_i2c *i2c = dev_get_drvdata(dev); - - clk_disable(i2c->clk); - - return 0; -} - -static int __maybe_unused xiic_i2c_runtime_resume(struct device *dev) -{ - struct xiic_i2c *i2c = dev_get_drvdata(dev); - int ret; - - ret = clk_enable(i2c->clk); - if (ret) { - dev_err(dev, "Cannot enable clock.\n"); - return ret; - } - - return 0; -} - static const struct dev_pm_ops xiic_dev_pm_ops = { SET_RUNTIME_PM_OPS(xiic_i2c_runtime_suspend, xiic_i2c_runtime_resume, NULL) From e22daca457d5bec579f62ba84e826a51c26cce31 Mon Sep 17 00:00:00 2001 From: Manikanta Guntupalli Date: Tue, 10 Dec 2024 15:22:42 +0530 Subject: [PATCH 20/52] i2c: xiic: Add atomic transfer support Rework the read and write code paths in the driver to support operation in atomic contexts. Similar changes have been implemented in other drivers, including: commit 3a5ee18d2a32 ("i2c: imx: implement master_xfer_atomic callback") commit 445094c8a9fb ("i2c: exynos5: add support for atomic transfers") commit ede2299f7101 ("i2c: tegra: Support atomic transfers") commit fe402bd09049 ("i2c: meson: implement the master_xfer_atomic callback") Signed-off-by: Manikanta Guntupalli Acked-by: Michal Simek Link: https://lore.kernel.org/r/20241210095242.1982770-3-manikanta.guntupalli@amd.com Signed-off-by: Andi Shyti --- drivers/i2c/busses/i2c-xiic.c | 239 +++++++++++++++++++++++++++++----- 1 file changed, 206 insertions(+), 33 deletions(-) diff --git a/drivers/i2c/busses/i2c-xiic.c b/drivers/i2c/busses/i2c-xiic.c index f48e73f905e5d..dc1e46d834dc0 100644 --- a/drivers/i2c/busses/i2c-xiic.c +++ b/drivers/i2c/busses/i2c-xiic.c @@ -30,6 +30,8 @@ #include #include #include +#include +#include #define DRIVER_NAME "xiic-i2c" #define DYNAMIC_MODE_READ_BROKEN_BIT BIT(0) @@ -74,6 +76,9 @@ enum i2c_scl_freq { * @smbus_block_read: Flag to handle block read * @input_clk: Input clock to I2C controller * @i2c_clk: I2C SCL frequency + * @atomic: Mode of transfer + * @atomic_lock: Lock for atomic transfer mode + * @atomic_xfer_state: See STATE_ */ struct xiic_i2c { struct device *dev; @@ -96,6 +101,9 @@ struct xiic_i2c { bool smbus_block_read; unsigned long input_clk; unsigned int i2c_clk; + bool atomic; + spinlock_t atomic_lock; /* Lock for atomic transfer mode */ + enum xilinx_i2c_state atomic_xfer_state; }; struct xiic_version_data { @@ -224,6 +232,8 @@ static const struct timing_regs timing_reg_values[] = { #define XIIC_I2C_TIMEOUT (msecs_to_jiffies(1000)) /* timeout waiting for the controller finish transfers */ #define XIIC_XFER_TIMEOUT (msecs_to_jiffies(10000)) +/* timeout waiting for the controller finish transfers in micro seconds */ +#define XIIC_XFER_TIMEOUT_US 10000000 /* * The following constant is used for the device global interrupt enable @@ -238,7 +248,7 @@ static const struct timing_regs timing_reg_values[] = { static int xiic_start_xfer(struct xiic_i2c *i2c, struct i2c_msg *msgs, int num); static void __xiic_start_xfer(struct xiic_i2c *i2c); -static int __maybe_unused xiic_i2c_runtime_suspend(struct device *dev) +static int xiic_i2c_runtime_suspend(struct device *dev) { struct xiic_i2c *i2c = dev_get_drvdata(dev); @@ -247,7 +257,7 @@ static int __maybe_unused xiic_i2c_runtime_suspend(struct device *dev) return 0; } -static int __maybe_unused xiic_i2c_runtime_resume(struct device *dev) +static int xiic_i2c_runtime_resume(struct device *dev) { struct xiic_i2c *i2c = dev_get_drvdata(dev); int ret; @@ -397,9 +407,10 @@ static int xiic_setclk(struct xiic_i2c *i2c) unsigned int index = 0; u32 reg_val; - dev_dbg(i2c->adap.dev.parent, - "%s entry, i2c->input_clk: %ld, i2c->i2c_clk: %d\n", - __func__, i2c->input_clk, i2c->i2c_clk); + if (!i2c->atomic) + dev_dbg(i2c->adap.dev.parent, + "%s entry, i2c->input_clk: %ld, i2c->i2c_clk: %d\n", + __func__, i2c->input_clk, i2c->i2c_clk); /* If not specified in DT, do not configure in SW. Rely only on Vivado design */ if (!i2c->i2c_clk || !i2c->input_clk) @@ -490,7 +501,8 @@ static int xiic_reinit(struct xiic_i2c *i2c) return ret; /* Enable interrupts */ - xiic_setreg32(i2c, XIIC_DGIER_OFFSET, XIIC_GINTR_ENABLE_MASK); + if (!i2c->atomic) + xiic_setreg32(i2c, XIIC_DGIER_OFFSET, XIIC_GINTR_ENABLE_MASK); xiic_irq_clr_en(i2c, XIIC_INTR_ARB_LOST_MASK); @@ -572,11 +584,12 @@ static void xiic_read_rx(struct xiic_i2c *i2c) bytes_in_fifo = xiic_getreg8(i2c, XIIC_RFO_REG_OFFSET) + 1; - dev_dbg(i2c->adap.dev.parent, - "%s entry, bytes in fifo: %d, rem: %d, SR: 0x%x, CR: 0x%x\n", - __func__, bytes_in_fifo, xiic_rx_space(i2c), - xiic_getreg8(i2c, XIIC_SR_REG_OFFSET), - xiic_getreg8(i2c, XIIC_CR_REG_OFFSET)); + if (!i2c->atomic) + dev_dbg(i2c->adap.dev.parent, + "%s entry, bytes in fifo: %d, rem: %d, SR: 0x%x, CR: 0x%x\n", + __func__, bytes_in_fifo, xiic_rx_space(i2c), + xiic_getreg8(i2c, XIIC_SR_REG_OFFSET), + xiic_getreg8(i2c, XIIC_CR_REG_OFFSET)); if (bytes_in_fifo > xiic_rx_space(i2c)) bytes_in_fifo = xiic_rx_space(i2c); @@ -635,6 +648,26 @@ static void xiic_read_rx(struct xiic_i2c *i2c) } } +static bool xiic_error_check(struct xiic_i2c *i2c) +{ + bool status = false; + u32 pend, isr, ier; + + isr = xiic_getreg32(i2c, XIIC_IISR_OFFSET); + ier = xiic_getreg32(i2c, XIIC_IIER_OFFSET); + pend = isr & ier; + + if ((pend & XIIC_INTR_ARB_LOST_MASK) || + ((pend & XIIC_INTR_TX_ERROR_MASK) && + !(pend & XIIC_INTR_RX_FULL_MASK))) { + xiic_reinit(i2c); + status = true; + if (i2c->tx_msg || i2c->rx_msg) + i2c->atomic_xfer_state = STATE_ERROR; + } + return status; +} + static int xiic_tx_fifo_space(struct xiic_i2c *i2c) { /* return the actual space left in the FIFO */ @@ -648,8 +681,9 @@ static void xiic_fill_tx_fifo(struct xiic_i2c *i2c) len = (len > fifo_space) ? fifo_space : len; - dev_dbg(i2c->adap.dev.parent, "%s entry, len: %d, fifo space: %d\n", - __func__, len, fifo_space); + if (!i2c->atomic) + dev_dbg(i2c->adap.dev.parent, "%s entry, len: %d, fifo space: %d\n", + __func__, len, fifo_space); while (len--) { u16 data = i2c->tx_msg->buf[i2c->tx_pos++]; @@ -672,9 +706,13 @@ static void xiic_fill_tx_fifo(struct xiic_i2c *i2c) xiic_setreg8(i2c, XIIC_CR_REG_OFFSET, cr & ~XIIC_CR_MSMS_MASK); } - dev_dbg(i2c->adap.dev.parent, "%s TX STOP\n", __func__); + if (!i2c->atomic) + dev_dbg(i2c->adap.dev.parent, "%s TX STOP\n", __func__); } xiic_setreg16(i2c, XIIC_DTR_REG_OFFSET, data); + + if (i2c->atomic && xiic_error_check(i2c)) + return; } } @@ -877,22 +915,51 @@ static int xiic_wait_not_busy(struct xiic_i2c *i2c) */ err = xiic_bus_busy(i2c); while (err && tries--) { - msleep(1); + if (i2c->atomic) + udelay(1000); + else + usleep_range(1000, 1100); err = xiic_bus_busy(i2c); } return err; } +static void xiic_recv_atomic(struct xiic_i2c *i2c) +{ + while (xiic_rx_space(i2c)) { + if (xiic_getreg32(i2c, XIIC_IISR_OFFSET) & XIIC_INTR_RX_FULL_MASK) { + xiic_read_rx(i2c); + + /* Clear Rx full and Tx error interrupts. */ + xiic_irq_clr_en(i2c, XIIC_INTR_RX_FULL_MASK | + XIIC_INTR_TX_ERROR_MASK); + } + if (xiic_error_check(i2c)) + return; + } + + i2c->rx_msg = NULL; + xiic_irq_clr_en(i2c, XIIC_INTR_TX_ERROR_MASK); + + /* send next message if this wasn't the last. */ + if (i2c->nmsgs > 1) { + i2c->nmsgs--; + i2c->tx_msg++; + __xiic_start_xfer(i2c); + } +} + static void xiic_start_recv(struct xiic_i2c *i2c) { u16 rx_watermark; u8 cr = 0, rfd_set = 0; struct i2c_msg *msg = i2c->rx_msg = i2c->tx_msg; - dev_dbg(i2c->adap.dev.parent, "%s entry, ISR: 0x%x, CR: 0x%x\n", - __func__, xiic_getreg32(i2c, XIIC_IISR_OFFSET), - xiic_getreg8(i2c, XIIC_CR_REG_OFFSET)); + if (!i2c->atomic) + dev_dbg(i2c->adap.dev.parent, "%s entry, ISR: 0x%x, CR: 0x%x\n", + __func__, xiic_getreg32(i2c, XIIC_IISR_OFFSET), + xiic_getreg8(i2c, XIIC_CR_REG_OFFSET)); /* Disable Tx interrupts */ xiic_irq_dis(i2c, XIIC_INTR_TX_HALF_MASK | XIIC_INTR_TX_EMPTY_MASK); @@ -990,9 +1057,10 @@ static void xiic_start_recv(struct xiic_i2c *i2c) XIIC_CR_MSMS_MASK) & ~(XIIC_CR_DIR_IS_TX_MASK)); } - dev_dbg(i2c->adap.dev.parent, "%s end, ISR: 0x%x, CR: 0x%x\n", - __func__, xiic_getreg32(i2c, XIIC_IISR_OFFSET), - xiic_getreg8(i2c, XIIC_CR_REG_OFFSET)); + if (!i2c->atomic) + dev_dbg(i2c->adap.dev.parent, "%s end, ISR: 0x%x, CR: 0x%x\n", + __func__, xiic_getreg32(i2c, XIIC_IISR_OFFSET), + xiic_getreg8(i2c, XIIC_CR_REG_OFFSET)); } if (i2c->nmsgs == 1) @@ -1002,10 +1070,55 @@ static void xiic_start_recv(struct xiic_i2c *i2c) /* the message is tx:ed */ i2c->tx_pos = msg->len; + i2c->prev_msg_tx = false; + /* Enable interrupts */ - xiic_setreg32(i2c, XIIC_DGIER_OFFSET, XIIC_GINTR_ENABLE_MASK); + if (!i2c->atomic) + xiic_setreg32(i2c, XIIC_DGIER_OFFSET, XIIC_GINTR_ENABLE_MASK); + else + xiic_recv_atomic(i2c); +} - i2c->prev_msg_tx = false; +static void xiic_send_rem_atomic(struct xiic_i2c *i2c) +{ + while (xiic_tx_space(i2c)) { + if (xiic_tx_fifo_space(i2c)) { + u16 data; + + data = i2c->tx_msg->buf[i2c->tx_pos]; + i2c->tx_pos++; + if (!xiic_tx_space(i2c) && i2c->nmsgs == 1) { + /* last message in transfer -> STOP */ + if (i2c->dynamic) { + data |= XIIC_TX_DYN_STOP_MASK; + } else { + u8 cr; + int status; + + /* Wait till FIFO is empty so STOP is sent last */ + status = xiic_wait_tx_empty(i2c); + if (status) + return; + + /* Write to CR to stop */ + cr = xiic_getreg8(i2c, XIIC_CR_REG_OFFSET); + xiic_setreg8(i2c, XIIC_CR_REG_OFFSET, cr & + ~XIIC_CR_MSMS_MASK); + } + } + xiic_setreg16(i2c, XIIC_DTR_REG_OFFSET, data); + } + if (xiic_error_check(i2c)) + return; + } + + if (i2c->nmsgs > 1) { + i2c->nmsgs--; + i2c->tx_msg++; + __xiic_start_xfer(i2c); + } else { + xiic_irq_dis(i2c, XIIC_INTR_TX_HALF_MASK); + } } static void xiic_start_send(struct xiic_i2c *i2c) @@ -1014,11 +1127,13 @@ static void xiic_start_send(struct xiic_i2c *i2c) u16 data; struct i2c_msg *msg = i2c->tx_msg; - dev_dbg(i2c->adap.dev.parent, "%s entry, msg: %p, len: %d", - __func__, msg, msg->len); - dev_dbg(i2c->adap.dev.parent, "%s entry, ISR: 0x%x, CR: 0x%x\n", - __func__, xiic_getreg32(i2c, XIIC_IISR_OFFSET), - xiic_getreg8(i2c, XIIC_CR_REG_OFFSET)); + if (!i2c->atomic) { + dev_dbg(i2c->adap.dev.parent, "%s entry, msg: %p, len: %d", + __func__, msg, msg->len); + dev_dbg(i2c->adap.dev.parent, "%s entry, ISR: 0x%x, CR: 0x%x\n", + __func__, xiic_getreg32(i2c, XIIC_IISR_OFFSET), + xiic_getreg8(i2c, XIIC_CR_REG_OFFSET)); + } if (i2c->dynamic) { /* write the address */ @@ -1083,19 +1198,27 @@ static void xiic_start_send(struct xiic_i2c *i2c) XIIC_INTR_TX_ERROR_MASK | XIIC_INTR_BNB_MASK); } + i2c->prev_msg_tx = true; + + if (i2c->atomic && !i2c->atomic_xfer_state) + xiic_send_rem_atomic(i2c); } static void __xiic_start_xfer(struct xiic_i2c *i2c) { int fifo_space = xiic_tx_fifo_space(i2c); - dev_dbg(i2c->adap.dev.parent, "%s entry, msg: %p, fifos space: %d\n", - __func__, i2c->tx_msg, fifo_space); + if (!i2c->atomic) + dev_dbg(i2c->adap.dev.parent, "%s entry, msg: %p, fifos space: %d\n", + __func__, i2c->tx_msg, fifo_space); if (!i2c->tx_msg) return; + if (i2c->atomic && xiic_error_check(i2c)) + return; + i2c->rx_pos = 0; i2c->tx_pos = 0; i2c->state = STATE_START; @@ -1112,7 +1235,10 @@ static int xiic_start_xfer(struct xiic_i2c *i2c, struct i2c_msg *msgs, int num) bool broken_read, max_read_len, smbus_blk_read; int ret, count; - mutex_lock(&i2c->lock); + if (i2c->atomic) + spin_lock(&i2c->atomic_lock); + else + mutex_lock(&i2c->lock); if (i2c->tx_msg || i2c->rx_msg) { dev_err(i2c->adap.dev.parent, @@ -1121,6 +1247,8 @@ static int xiic_start_xfer(struct xiic_i2c *i2c, struct i2c_msg *msgs, int num) goto out; } + i2c->atomic_xfer_state = STATE_DONE; + /* In single master mode bus can only be busy, when in use by this * driver. If the register indicates bus being busy for some reason we * should ignore it, since bus will never be released and i2c will be @@ -1147,7 +1275,9 @@ static int xiic_start_xfer(struct xiic_i2c *i2c, struct i2c_msg *msgs, int num) i2c->tx_msg = msgs; i2c->rx_msg = NULL; i2c->nmsgs = num; - init_completion(&i2c->completion); + + if (!i2c->atomic) + init_completion(&i2c->completion); /* Decide standard mode or Dynamic mode */ i2c->dynamic = true; @@ -1182,7 +1312,10 @@ static int xiic_start_xfer(struct xiic_i2c *i2c, struct i2c_msg *msgs, int num) __xiic_start_xfer(i2c); out: - mutex_unlock(&i2c->lock); + if (i2c->atomic) + spin_unlock(&i2c->atomic_lock); + else + mutex_unlock(&i2c->lock); return ret; } @@ -1221,6 +1354,44 @@ static int xiic_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num) return err; } +static int xiic_xfer_atomic(struct i2c_adapter *adap, struct i2c_msg *msgs, int num) +{ + struct xiic_i2c *i2c = i2c_get_adapdata(adap); + u32 status_reg; + int err; + + err = xiic_i2c_runtime_resume(i2c->dev); + if (err) + return err; + + i2c->atomic = true; + err = xiic_start_xfer(i2c, msgs, num); + if (err < 0) + return err; + + err = readl_poll_timeout_atomic(i2c->base + XIIC_SR_REG_OFFSET, + status_reg, !(status_reg & XIIC_SR_BUS_BUSY_MASK), + 1, XIIC_XFER_TIMEOUT_US); + + if (err) /* Timeout */ + err = -ETIMEDOUT; + + spin_lock(&i2c->atomic_lock); + if (err || i2c->state) { + i2c->tx_msg = NULL; + i2c->rx_msg = NULL; + i2c->nmsgs = 0; + } + + err = (i2c->atomic_xfer_state == STATE_DONE) ? num : -EIO; + spin_unlock(&i2c->atomic_lock); + + i2c->atomic = false; + xiic_i2c_runtime_suspend(i2c->dev); + + return err; +} + static u32 xiic_func(struct i2c_adapter *adap) { return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL | I2C_FUNC_SMBUS_BLOCK_DATA; @@ -1228,6 +1399,7 @@ static u32 xiic_func(struct i2c_adapter *adap) static const struct i2c_algorithm xiic_algorithm = { .master_xfer = xiic_xfer, + .master_xfer_atomic = xiic_xfer_atomic, .functionality = xiic_func, }; @@ -1291,6 +1463,7 @@ static int xiic_i2c_probe(struct platform_device *pdev) DRIVER_NAME " %s", pdev->name); mutex_init(&i2c->lock); + spin_lock_init(&i2c->atomic_lock); i2c->clk = devm_clk_get_enabled(&pdev->dev, NULL); if (IS_ERR(i2c->clk)) From 525defdb608a153108c434e127b0bd1d83a5d8c1 Mon Sep 17 00:00:00 2001 From: Chen Ni Date: Tue, 26 Nov 2024 10:38:39 +0800 Subject: [PATCH 21/52] i2c: isch: Convert comma to semicolon Replace comma between expressions with semicolons. Using a ',' in place of a ';' can have unintended side effects. Although that is not the case here, it is seems best to use ';' unless ',' is intended. Found by inspection. No functional change intended. Compile tested only. Signed-off-by: Chen Ni Link: https://lore.kernel.org/r/20241126023839.251922-1-nichen@iscas.ac.cn Signed-off-by: Andi Shyti --- drivers/i2c/busses/i2c-isch.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/i2c/busses/i2c-isch.c b/drivers/i2c/busses/i2c-isch.c index 2b3b65ef2900a..a2ac992f9cb0d 100644 --- a/drivers/i2c/busses/i2c-isch.c +++ b/drivers/i2c/busses/i2c-isch.c @@ -291,9 +291,9 @@ static int smbus_sch_probe(struct platform_device *pdev) /* Set up the sysfs linkage to our parent device */ priv->adapter.dev.parent = dev; - priv->adapter.owner = THIS_MODULE, - priv->adapter.class = I2C_CLASS_HWMON, - priv->adapter.algo = &smbus_algorithm, + priv->adapter.owner = THIS_MODULE; + priv->adapter.class = I2C_CLASS_HWMON; + priv->adapter.algo = &smbus_algorithm; snprintf(priv->adapter.name, sizeof(priv->adapter.name), "SMBus SCH adapter at %04x", (unsigned short)res->start); From a09c8b3f9047959e60dde90c51dcca17f66778c1 Mon Sep 17 00:00:00 2001 From: Carlos Song Date: Mon, 25 Nov 2024 22:29:09 +0800 Subject: [PATCH 22/52] i2c: imx-lpi2c: add eDMA mode support for LPI2C Add eDMA mode support for LPI2C. There are some differences between TX DMA mode and RX DMA mode. LPI2C MTDR register is Controller Transmit Data Register. When lpi2c send data, it is tx cmd register and tx data fifo. When lpi2c receive data, it is just a rx cmd register. LPI2C MRDR register is Controller Receive Data Register, received data are stored in this. MTDR[8:10] is CMD field and MTDR[0:7] is DATA filed. +-----------+-------------------------------+ | C M D | D A T A | +---+---+---+---+---+---+---+---+---+---+---+ | 10| 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | +---+---+---+---+---+---+---+---+---+---+---+ MRDR is Controller Receive Data Register. MRDR[0:7] is DATA filed. +-------------------------------+ | D A T A | +---+---+---+---+---+---+---+---+ | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | +---+---+---+---+---+---+---+---+ When the LPI2C controller needs to send data, tx cmd and 8-bit data should be written into MTDR: CMD: 000b: Transmit the value in DATA[7:0]. DATA: 8-bit data. If lpi2c controller needs to send N 8-bit data, just write N times (CMD(W) + DATA(u8)) to MTDR. When the LPI2C controller needs to receive data, rx cmd should be written into MTDR, the received data will be stored in the MRDR. MTDR(CMD): 001b: Receive (DATA[7:0] + 1) 8-bit data. MTDR(DATA): byte counter. MRDR(DATA): 8-bit data. So when lpi2c controller needs to receive N 8-bit data, 1. N <= 256: Write 1 time (CMD(R) + BYTE COUNT(N-1)) into MTDR and receive data from MRDR. 2. N > 256: Write N/256 times (CMD(R) + BYTE COUNT(255)) + 1 time (CMD(R) + BYTE COUNT(N%256)) into MTDR and receive data from MRDR. Due to these differences, when lpi2c is in DMA TX mode, only enable TX channel to send data. But when lpi2c is in DMA RX mode, TX and RX channel are both enabled, TX channel is used to send RX cmd and RX channel is used to receive data. Signed-off-by: Carlos Song Signed-off-by: Frank Li Link: https://lore.kernel.org/r/20241125142909.1613245-1-carlos.song@nxp.com Signed-off-by: Andi Shyti --- drivers/i2c/busses/i2c-imx-lpi2c.c | 524 ++++++++++++++++++++++++++++- 1 file changed, 517 insertions(+), 7 deletions(-) diff --git a/drivers/i2c/busses/i2c-imx-lpi2c.c b/drivers/i2c/busses/i2c-imx-lpi2c.c index 8adf2963d764e..9778dc8f6d363 100644 --- a/drivers/i2c/busses/i2c-imx-lpi2c.c +++ b/drivers/i2c/busses/i2c-imx-lpi2c.c @@ -8,6 +8,8 @@ #include #include #include +#include +#include #include #include #include @@ -29,6 +31,7 @@ #define LPI2C_MCR 0x10 /* i2c contrl register */ #define LPI2C_MSR 0x14 /* i2c status register */ #define LPI2C_MIER 0x18 /* i2c interrupt enable */ +#define LPI2C_MDER 0x1C /* i2c DMA enable */ #define LPI2C_MCFGR0 0x20 /* i2c master configuration */ #define LPI2C_MCFGR1 0x24 /* i2c master configuration */ #define LPI2C_MCFGR2 0x28 /* i2c master configuration */ @@ -70,11 +73,14 @@ #define MCFGR1_AUTOSTOP BIT(8) #define MCFGR1_IGNACK BIT(9) #define MRDR_RXEMPTY BIT(14) +#define MDER_TDDE BIT(0) +#define MDER_RDDE BIT(1) #define I2C_CLK_RATIO 2 #define CHUNK_DATA 256 #define I2C_PM_TIMEOUT 10 /* ms */ +#define I2C_DMA_THRESHOLD 8 /* bytes */ enum lpi2c_imx_mode { STANDARD, /* 100+Kbps */ @@ -91,6 +97,24 @@ enum lpi2c_imx_pincfg { FOUR_PIN_PP, }; +struct lpi2c_imx_dma { + bool using_pio_mode; + u8 rx_cmd_buf_len; + u8 *dma_buf; + u16 *rx_cmd_buf; + unsigned int dma_len; + unsigned int tx_burst_num; + unsigned int rx_burst_num; + unsigned long dma_msg_flag; + resource_size_t phy_addr; + dma_addr_t dma_tx_addr; + dma_addr_t dma_addr; + enum dma_data_direction dma_data_dir; + enum dma_transfer_direction dma_transfer_dir; + struct dma_chan *chan_tx; + struct dma_chan *chan_rx; +}; + struct lpi2c_imx_struct { struct i2c_adapter adapter; int num_clks; @@ -108,6 +132,8 @@ struct lpi2c_imx_struct { unsigned int rxfifosize; enum lpi2c_imx_mode mode; struct i2c_bus_recovery_info rinfo; + bool can_use_dma; + struct lpi2c_imx_dma *dma; }; static void lpi2c_imx_intctrl(struct lpi2c_imx_struct *lpi2c_imx, @@ -305,7 +331,7 @@ static int lpi2c_imx_master_disable(struct lpi2c_imx_struct *lpi2c_imx) return 0; } -static int lpi2c_imx_msg_complete(struct lpi2c_imx_struct *lpi2c_imx) +static int lpi2c_imx_pio_msg_complete(struct lpi2c_imx_struct *lpi2c_imx) { unsigned long time_left; @@ -451,6 +477,425 @@ static void lpi2c_imx_read(struct lpi2c_imx_struct *lpi2c_imx, lpi2c_imx_intctrl(lpi2c_imx, MIER_RDIE | MIER_NDIE); } +static bool is_use_dma(struct lpi2c_imx_struct *lpi2c_imx, struct i2c_msg *msg) +{ + if (!lpi2c_imx->can_use_dma) + return false; + + /* + * When the length of data is less than I2C_DMA_THRESHOLD, + * cpu mode is used directly to avoid low performance. + */ + return !(msg->len < I2C_DMA_THRESHOLD); +} + +static int lpi2c_imx_pio_xfer(struct lpi2c_imx_struct *lpi2c_imx, + struct i2c_msg *msg) +{ + reinit_completion(&lpi2c_imx->complete); + + if (msg->flags & I2C_M_RD) + lpi2c_imx_read(lpi2c_imx, msg); + else + lpi2c_imx_write(lpi2c_imx, msg); + + return lpi2c_imx_pio_msg_complete(lpi2c_imx); +} + +static int lpi2c_imx_dma_timeout_calculate(struct lpi2c_imx_struct *lpi2c_imx) +{ + unsigned long time = 0; + + time = 8 * lpi2c_imx->dma->dma_len * 1000 / lpi2c_imx->bitrate; + + /* Add extra second for scheduler related activities */ + time += 1; + + /* Double calculated time */ + return msecs_to_jiffies(time * MSEC_PER_SEC); +} + +static int lpi2c_imx_alloc_rx_cmd_buf(struct lpi2c_imx_struct *lpi2c_imx) +{ + struct lpi2c_imx_dma *dma = lpi2c_imx->dma; + u16 rx_remain = dma->dma_len; + int cmd_num; + u16 temp; + + /* + * Calculate the number of rx command words via the DMA TX channel + * writing into command register based on the i2c msg len, and build + * the rx command words buffer. + */ + cmd_num = DIV_ROUND_UP(rx_remain, CHUNK_DATA); + dma->rx_cmd_buf = kcalloc(cmd_num, sizeof(u16), GFP_KERNEL); + dma->rx_cmd_buf_len = cmd_num * sizeof(u16); + + if (!dma->rx_cmd_buf) { + dev_err(&lpi2c_imx->adapter.dev, "Alloc RX cmd buffer failed\n"); + return -ENOMEM; + } + + for (int i = 0; i < cmd_num ; i++) { + temp = rx_remain > CHUNK_DATA ? CHUNK_DATA - 1 : rx_remain - 1; + temp |= (RECV_DATA << 8); + rx_remain -= CHUNK_DATA; + dma->rx_cmd_buf[i] = temp; + } + + return 0; +} + +static int lpi2c_imx_dma_msg_complete(struct lpi2c_imx_struct *lpi2c_imx) +{ + unsigned long time_left, time; + + time = lpi2c_imx_dma_timeout_calculate(lpi2c_imx); + time_left = wait_for_completion_timeout(&lpi2c_imx->complete, time); + if (time_left == 0) { + dev_err(&lpi2c_imx->adapter.dev, "I/O Error in DMA Data Transfer\n"); + return -ETIMEDOUT; + } + + return 0; +} + +static void lpi2c_dma_unmap(struct lpi2c_imx_dma *dma) +{ + struct dma_chan *chan = dma->dma_data_dir == DMA_FROM_DEVICE + ? dma->chan_rx : dma->chan_tx; + + dma_unmap_single(chan->device->dev, dma->dma_addr, + dma->dma_len, dma->dma_data_dir); + + dma->dma_data_dir = DMA_NONE; +} + +static void lpi2c_cleanup_rx_cmd_dma(struct lpi2c_imx_dma *dma) +{ + dmaengine_terminate_sync(dma->chan_tx); + dma_unmap_single(dma->chan_tx->device->dev, dma->dma_tx_addr, + dma->rx_cmd_buf_len, DMA_TO_DEVICE); +} + +static void lpi2c_cleanup_dma(struct lpi2c_imx_dma *dma) +{ + if (dma->dma_data_dir == DMA_FROM_DEVICE) + dmaengine_terminate_sync(dma->chan_rx); + else if (dma->dma_data_dir == DMA_TO_DEVICE) + dmaengine_terminate_sync(dma->chan_tx); + + lpi2c_dma_unmap(dma); +} + +static void lpi2c_dma_callback(void *data) +{ + struct lpi2c_imx_struct *lpi2c_imx = (struct lpi2c_imx_struct *)data; + + complete(&lpi2c_imx->complete); +} + +static int lpi2c_dma_rx_cmd_submit(struct lpi2c_imx_struct *lpi2c_imx) +{ + struct dma_async_tx_descriptor *rx_cmd_desc; + struct lpi2c_imx_dma *dma = lpi2c_imx->dma; + struct dma_chan *txchan = dma->chan_tx; + dma_cookie_t cookie; + + dma->dma_tx_addr = dma_map_single(txchan->device->dev, + dma->rx_cmd_buf, dma->rx_cmd_buf_len, + DMA_TO_DEVICE); + if (dma_mapping_error(txchan->device->dev, dma->dma_tx_addr)) { + dev_err(&lpi2c_imx->adapter.dev, "DMA map failed, use pio\n"); + return -EINVAL; + } + + rx_cmd_desc = dmaengine_prep_slave_single(txchan, dma->dma_tx_addr, + dma->rx_cmd_buf_len, DMA_MEM_TO_DEV, + DMA_PREP_INTERRUPT | DMA_CTRL_ACK); + if (!rx_cmd_desc) { + dev_err(&lpi2c_imx->adapter.dev, "DMA prep slave sg failed, use pio\n"); + goto desc_prepare_err_exit; + } + + cookie = dmaengine_submit(rx_cmd_desc); + if (dma_submit_error(cookie)) { + dev_err(&lpi2c_imx->adapter.dev, "submitting DMA failed, use pio\n"); + goto submit_err_exit; + } + + dma_async_issue_pending(txchan); + + return 0; + +desc_prepare_err_exit: + dma_unmap_single(txchan->device->dev, dma->dma_tx_addr, + dma->rx_cmd_buf_len, DMA_TO_DEVICE); + return -EINVAL; + +submit_err_exit: + dma_unmap_single(txchan->device->dev, dma->dma_tx_addr, + dma->rx_cmd_buf_len, DMA_TO_DEVICE); + dmaengine_desc_free(rx_cmd_desc); + return -EINVAL; +} + +static int lpi2c_dma_submit(struct lpi2c_imx_struct *lpi2c_imx) +{ + struct lpi2c_imx_dma *dma = lpi2c_imx->dma; + struct dma_async_tx_descriptor *desc; + struct dma_chan *chan; + dma_cookie_t cookie; + + if (dma->dma_msg_flag & I2C_M_RD) { + chan = dma->chan_rx; + dma->dma_data_dir = DMA_FROM_DEVICE; + dma->dma_transfer_dir = DMA_DEV_TO_MEM; + } else { + chan = dma->chan_tx; + dma->dma_data_dir = DMA_TO_DEVICE; + dma->dma_transfer_dir = DMA_MEM_TO_DEV; + } + + dma->dma_addr = dma_map_single(chan->device->dev, + dma->dma_buf, dma->dma_len, dma->dma_data_dir); + if (dma_mapping_error(chan->device->dev, dma->dma_addr)) { + dev_err(&lpi2c_imx->adapter.dev, "DMA map failed, use pio\n"); + return -EINVAL; + } + + desc = dmaengine_prep_slave_single(chan, dma->dma_addr, + dma->dma_len, dma->dma_transfer_dir, + DMA_PREP_INTERRUPT | DMA_CTRL_ACK); + if (!desc) { + dev_err(&lpi2c_imx->adapter.dev, "DMA prep slave sg failed, use pio\n"); + goto desc_prepare_err_exit; + } + + reinit_completion(&lpi2c_imx->complete); + desc->callback = lpi2c_dma_callback; + desc->callback_param = lpi2c_imx; + + cookie = dmaengine_submit(desc); + if (dma_submit_error(cookie)) { + dev_err(&lpi2c_imx->adapter.dev, "submitting DMA failed, use pio\n"); + goto submit_err_exit; + } + + /* Can't switch to PIO mode when DMA have started transfer */ + dma->using_pio_mode = false; + + dma_async_issue_pending(chan); + + return 0; + +desc_prepare_err_exit: + lpi2c_dma_unmap(dma); + return -EINVAL; + +submit_err_exit: + lpi2c_dma_unmap(dma); + dmaengine_desc_free(desc); + return -EINVAL; +} + +static int lpi2c_imx_find_max_burst_num(unsigned int fifosize, unsigned int len) +{ + unsigned int i; + + for (i = fifosize / 2; i > 0; i--) + if (!(len % i)) + break; + + return i; +} + +/* + * For a highest DMA efficiency, tx/rx burst number should be calculated according + * to the FIFO depth. + */ +static void lpi2c_imx_dma_burst_num_calculate(struct lpi2c_imx_struct *lpi2c_imx) +{ + struct lpi2c_imx_dma *dma = lpi2c_imx->dma; + unsigned int cmd_num; + + if (dma->dma_msg_flag & I2C_M_RD) { + /* + * One RX cmd word can trigger DMA receive no more than 256 bytes. + * The number of RX cmd words should be calculated based on the data + * length. + */ + cmd_num = DIV_ROUND_UP(dma->dma_len, CHUNK_DATA); + dma->tx_burst_num = lpi2c_imx_find_max_burst_num(lpi2c_imx->txfifosize, + cmd_num); + dma->rx_burst_num = lpi2c_imx_find_max_burst_num(lpi2c_imx->rxfifosize, + dma->dma_len); + } else { + dma->tx_burst_num = lpi2c_imx_find_max_burst_num(lpi2c_imx->txfifosize, + dma->dma_len); + } +} + +static int lpi2c_dma_config(struct lpi2c_imx_struct *lpi2c_imx) +{ + struct lpi2c_imx_dma *dma = lpi2c_imx->dma; + struct dma_slave_config rx = {}, tx = {}; + int ret; + + lpi2c_imx_dma_burst_num_calculate(lpi2c_imx); + + if (dma->dma_msg_flag & I2C_M_RD) { + tx.dst_addr = dma->phy_addr + LPI2C_MTDR; + tx.dst_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES; + tx.dst_maxburst = dma->tx_burst_num; + tx.direction = DMA_MEM_TO_DEV; + ret = dmaengine_slave_config(dma->chan_tx, &tx); + if (ret < 0) + return ret; + + rx.src_addr = dma->phy_addr + LPI2C_MRDR; + rx.src_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE; + rx.src_maxburst = dma->rx_burst_num; + rx.direction = DMA_DEV_TO_MEM; + ret = dmaengine_slave_config(dma->chan_rx, &rx); + if (ret < 0) + return ret; + } else { + tx.dst_addr = dma->phy_addr + LPI2C_MTDR; + tx.dst_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE; + tx.dst_maxburst = dma->tx_burst_num; + tx.direction = DMA_MEM_TO_DEV; + ret = dmaengine_slave_config(dma->chan_tx, &tx); + if (ret < 0) + return ret; + } + + return 0; +} + +static void lpi2c_dma_enable(struct lpi2c_imx_struct *lpi2c_imx) +{ + struct lpi2c_imx_dma *dma = lpi2c_imx->dma; + /* + * TX interrupt will be triggered when the number of words in + * the transmit FIFO is equal or less than TX watermark. + * RX interrupt will be triggered when the number of words in + * the receive FIFO is greater than RX watermark. + * In order to trigger the DMA interrupt, TX watermark should be + * set equal to the DMA TX burst number but RX watermark should + * be set less than the DMA RX burst number. + */ + if (dma->dma_msg_flag & I2C_M_RD) { + /* Set I2C TX/RX watermark */ + writel(dma->tx_burst_num | (dma->rx_burst_num - 1) << 16, + lpi2c_imx->base + LPI2C_MFCR); + /* Enable I2C DMA TX/RX function */ + writel(MDER_TDDE | MDER_RDDE, lpi2c_imx->base + LPI2C_MDER); + } else { + /* Set I2C TX watermark */ + writel(dma->tx_burst_num, lpi2c_imx->base + LPI2C_MFCR); + /* Enable I2C DMA TX function */ + writel(MDER_TDDE, lpi2c_imx->base + LPI2C_MDER); + } + + /* Enable NACK detected */ + lpi2c_imx_intctrl(lpi2c_imx, MIER_NDIE); +}; + +/* + * When lpi2c is in TX DMA mode we can use one DMA TX channel to write + * data word into TXFIFO, but in RX DMA mode it is different. + * + * The LPI2C MTDR register is a command data and transmit data register. + * Bits 8-10 are the command data field and Bits 0-7 are the transmit + * data field. When the LPI2C master needs to read data, the number of + * bytes to read should be set in the command field and RECV_DATA should + * be set into the command data field to receive (DATA[7:0] + 1) bytes. + * The recv data command word is made of RECV_DATA in the command data + * field and the number of bytes to read in transmit data field. When the + * length of data to be read exceeds 256 bytes, recv data command word + * needs to be written to TXFIFO multiple times. + * + * So when in RX DMA mode, the TX channel also must to be configured to + * send RX command words and the RX command word must be set in advance + * before transmitting. + */ +static int lpi2c_imx_dma_xfer(struct lpi2c_imx_struct *lpi2c_imx, + struct i2c_msg *msg) +{ + struct lpi2c_imx_dma *dma = lpi2c_imx->dma; + int ret; + + /* When DMA mode fails before transferring, CPU mode can be used. */ + dma->using_pio_mode = true; + + dma->dma_len = msg->len; + dma->dma_msg_flag = msg->flags; + dma->dma_buf = i2c_get_dma_safe_msg_buf(msg, I2C_DMA_THRESHOLD); + if (!dma->dma_buf) + return -ENOMEM; + + ret = lpi2c_dma_config(lpi2c_imx); + if (ret) { + dev_err(&lpi2c_imx->adapter.dev, "Failed to configure DMA (%d)\n", ret); + goto disable_dma; + } + + lpi2c_dma_enable(lpi2c_imx); + + ret = lpi2c_dma_submit(lpi2c_imx); + if (ret) { + dev_err(&lpi2c_imx->adapter.dev, "DMA submission failed (%d)\n", ret); + goto disable_dma; + } + + if (dma->dma_msg_flag & I2C_M_RD) { + ret = lpi2c_imx_alloc_rx_cmd_buf(lpi2c_imx); + if (ret) + goto disable_cleanup_data_dma; + + ret = lpi2c_dma_rx_cmd_submit(lpi2c_imx); + if (ret) + goto disable_cleanup_data_dma; + } + + ret = lpi2c_imx_dma_msg_complete(lpi2c_imx); + if (ret) + goto disable_cleanup_all_dma; + + /* When encountering NACK in transfer, clean up all DMA transfers */ + if ((readl(lpi2c_imx->base + LPI2C_MSR) & MSR_NDF) && !ret) { + ret = -EIO; + goto disable_cleanup_all_dma; + } + + if (dma->dma_msg_flag & I2C_M_RD) + dma_unmap_single(dma->chan_tx->device->dev, dma->dma_tx_addr, + dma->rx_cmd_buf_len, DMA_TO_DEVICE); + lpi2c_dma_unmap(dma); + + goto disable_dma; + +disable_cleanup_all_dma: + if (dma->dma_msg_flag & I2C_M_RD) + lpi2c_cleanup_rx_cmd_dma(dma); +disable_cleanup_data_dma: + lpi2c_cleanup_dma(dma); +disable_dma: + /* Disable I2C DMA function */ + writel(0, lpi2c_imx->base + LPI2C_MDER); + + if (dma->dma_msg_flag & I2C_M_RD) + kfree(dma->rx_cmd_buf); + + if (ret) + i2c_put_dma_safe_msg_buf(dma->dma_buf, msg, false); + else + i2c_put_dma_safe_msg_buf(dma->dma_buf, msg, true); + + return ret; +} + static int lpi2c_imx_xfer(struct i2c_adapter *adapter, struct i2c_msg *msgs, int num) { @@ -477,12 +922,14 @@ static int lpi2c_imx_xfer(struct i2c_adapter *adapter, lpi2c_imx->msglen = msgs[i].len; init_completion(&lpi2c_imx->complete); - if (msgs[i].flags & I2C_M_RD) - lpi2c_imx_read(lpi2c_imx, &msgs[i]); - else - lpi2c_imx_write(lpi2c_imx, &msgs[i]); + if (is_use_dma(lpi2c_imx, &msgs[i])) { + result = lpi2c_imx_dma_xfer(lpi2c_imx, &msgs[i]); + if (result && lpi2c_imx->dma->using_pio_mode) + result = lpi2c_imx_pio_xfer(lpi2c_imx, &msgs[i]); + } else { + result = lpi2c_imx_pio_xfer(lpi2c_imx, &msgs[i]); + } - result = lpi2c_imx_msg_complete(lpi2c_imx); if (result) goto stop; @@ -546,6 +993,58 @@ static int lpi2c_imx_init_recovery_info(struct lpi2c_imx_struct *lpi2c_imx, return 0; } +static void dma_exit(struct device *dev, struct lpi2c_imx_dma *dma) +{ + if (dma->chan_rx) + dma_release_channel(dma->chan_rx); + + if (dma->chan_tx) + dma_release_channel(dma->chan_tx); + + devm_kfree(dev, dma); +} + +static int lpi2c_dma_init(struct device *dev, dma_addr_t phy_addr) +{ + struct lpi2c_imx_struct *lpi2c_imx = dev_get_drvdata(dev); + struct lpi2c_imx_dma *dma; + int ret; + + dma = devm_kzalloc(dev, sizeof(*dma), GFP_KERNEL); + if (!dma) + return -ENOMEM; + + dma->phy_addr = phy_addr; + + /* Prepare for TX DMA: */ + dma->chan_tx = dma_request_chan(dev, "tx"); + if (IS_ERR(dma->chan_tx)) { + ret = PTR_ERR(dma->chan_tx); + if (ret != -ENODEV && ret != -EPROBE_DEFER) + dev_err(dev, "can't request DMA tx channel (%d)\n", ret); + dma->chan_tx = NULL; + goto dma_exit; + } + + /* Prepare for RX DMA: */ + dma->chan_rx = dma_request_chan(dev, "rx"); + if (IS_ERR(dma->chan_rx)) { + ret = PTR_ERR(dma->chan_rx); + if (ret != -ENODEV && ret != -EPROBE_DEFER) + dev_err(dev, "can't request DMA rx channel (%d)\n", ret); + dma->chan_rx = NULL; + goto dma_exit; + } + + lpi2c_imx->can_use_dma = true; + lpi2c_imx->dma = dma; + return 0; + +dma_exit: + dma_exit(dev, dma); + return ret; +} + static u32 lpi2c_imx_func(struct i2c_adapter *adapter) { return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL | @@ -566,6 +1065,8 @@ MODULE_DEVICE_TABLE(of, lpi2c_imx_of_match); static int lpi2c_imx_probe(struct platform_device *pdev) { struct lpi2c_imx_struct *lpi2c_imx; + struct resource *res; + dma_addr_t phy_addr; unsigned int temp; int irq, ret; @@ -573,7 +1074,7 @@ static int lpi2c_imx_probe(struct platform_device *pdev) if (!lpi2c_imx) return -ENOMEM; - lpi2c_imx->base = devm_platform_ioremap_resource(pdev, 0); + lpi2c_imx->base = devm_platform_get_and_ioremap_resource(pdev, 0, &res); if (IS_ERR(lpi2c_imx->base)) return PTR_ERR(lpi2c_imx->base); @@ -587,6 +1088,7 @@ static int lpi2c_imx_probe(struct platform_device *pdev) lpi2c_imx->adapter.dev.of_node = pdev->dev.of_node; strscpy(lpi2c_imx->adapter.name, pdev->name, sizeof(lpi2c_imx->adapter.name)); + phy_addr = (dma_addr_t)res->start; ret = devm_clk_bulk_get_all(&pdev->dev, &lpi2c_imx->clks); if (ret < 0) @@ -640,6 +1142,14 @@ static int lpi2c_imx_probe(struct platform_device *pdev) if (ret == -EPROBE_DEFER) goto rpm_disable; + /* Init DMA */ + ret = lpi2c_dma_init(&pdev->dev, phy_addr); + if (ret) { + if (ret == -EPROBE_DEFER) + goto rpm_disable; + dev_info(&pdev->dev, "use pio mode\n"); + } + ret = i2c_add_adapter(&lpi2c_imx->adapter); if (ret) goto rpm_disable; From 01aa028151380556a46225d840898fd4c590119f Mon Sep 17 00:00:00 2001 From: Ivaylo Ivanov Date: Sat, 28 Dec 2024 13:15:08 +0200 Subject: [PATCH 23/52] dt-bindings: i2c: exynos5: Add samsung,exynos8895-hsi2c compatible Add samsung,exynos8895-hsi2c dedicated compatible for representing I2C of Exynos8895 SoC. Since there are I2C buses that aren't implemented as a part of USIv1 blocks, they only require a single clock. Signed-off-by: Ivaylo Ivanov Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20241228111509.896502-2-ivo.ivanov.ivanov1@gmail.com Signed-off-by: Andi Shyti --- Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml b/Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml index cc8bba5537b94..70cc2ee9ee27d 100644 --- a/Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml +++ b/Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml @@ -25,6 +25,7 @@ properties: - samsung,exynos5250-hsi2c # Exynos5250 and Exynos5420 - samsung,exynos5260-hsi2c # Exynos5260 - samsung,exynos7-hsi2c # Exynos7 + - samsung,exynos8895-hsi2c - samsung,exynosautov9-hsi2c - items: - enum: From f8cef982c2ee2ba1042e72d5d33dd1be2de313dd Mon Sep 17 00:00:00 2001 From: Ivaylo Ivanov Date: Sat, 28 Dec 2024 13:15:09 +0200 Subject: [PATCH 24/52] i2c: exynos5: Add support for Exynos8895 SoC Exynos8895 functioning logic mostly follows I2C_TYPE_EXYNOS7, but timing and temp calculations are slightly different according to the following logic: FPCLK / FI2C = (CLK_DIV + 1) * (TSCLK_L + TSCLK_H + 2) + 2 * ((FLT_CYCLE + 3) - (FLT_CYCLE + 3) % (CLK_DIV + 1)) temp := (FPCLK / FI2C) - (FLT_CYCLE + 3) * 2 Signed-off-by: Ivaylo Ivanov Link: https://lore.kernel.org/r/20241228111509.896502-3-ivo.ivanov.ivanov1@gmail.com Signed-off-by: Andi Shyti --- drivers/i2c/busses/i2c-exynos5.c | 35 ++++++++++++++++++++++++++++---- 1 file changed, 31 insertions(+), 4 deletions(-) diff --git a/drivers/i2c/busses/i2c-exynos5.c b/drivers/i2c/busses/i2c-exynos5.c index e330015087ab8..6cdd957ea7e4e 100644 --- a/drivers/i2c/busses/i2c-exynos5.c +++ b/drivers/i2c/busses/i2c-exynos5.c @@ -168,6 +168,7 @@ enum i2c_type_exynos { I2C_TYPE_EXYNOS5, I2C_TYPE_EXYNOS7, I2C_TYPE_EXYNOSAUTOV9, + I2C_TYPE_EXYNOS8895, }; struct exynos5_i2c { @@ -240,6 +241,11 @@ static const struct exynos_hsi2c_variant exynosautov9_hsi2c_data = { .hw = I2C_TYPE_EXYNOSAUTOV9, }; +static const struct exynos_hsi2c_variant exynos8895_hsi2c_data = { + .fifo_depth = 64, + .hw = I2C_TYPE_EXYNOS8895, +}; + static const struct of_device_id exynos5_i2c_match[] = { { .compatible = "samsung,exynos5-hsi2c", @@ -256,6 +262,9 @@ static const struct of_device_id exynos5_i2c_match[] = { }, { .compatible = "samsung,exynosautov9-hsi2c", .data = &exynosautov9_hsi2c_data + }, { + .compatible = "samsung,exynos8895-hsi2c", + .data = &exynos8895_hsi2c_data }, {}, }; MODULE_DEVICE_TABLE(of, exynos5_i2c_match); @@ -331,6 +340,14 @@ static int exynos5_i2c_set_timing(struct exynos5_i2c *i2c, bool hs_timings) * clk_cycle := TSCLK_L + TSCLK_H * temp := (CLK_DIV + 1) * (clk_cycle + 2) * + * In case of HSI2C controllers in Exynos8895 + * FPCLK / FI2C = + * (CLK_DIV + 1) * (TSCLK_L + TSCLK_H + 2) + + * 2 * ((FLT_CYCLE + 3) - (FLT_CYCLE + 3) % (CLK_DIV + 1)) + * + * clk_cycle := TSCLK_L + TSCLK_H + * temp := (FPCLK / FI2C) - (FLT_CYCLE + 3) * 2 + * * Constraints: 4 <= temp, 0 <= CLK_DIV < 256, 2 <= clk_cycle <= 510 * * To split SCL clock into low, high periods appropriately, one @@ -352,11 +369,19 @@ static int exynos5_i2c_set_timing(struct exynos5_i2c *i2c, bool hs_timings) * */ t_ftl_cycle = (readl(i2c->regs + HSI2C_CONF) >> 16) & 0x7; - temp = clkin / op_clk - 8 - t_ftl_cycle; - if (i2c->variant->hw != I2C_TYPE_EXYNOS7) - temp -= t_ftl_cycle; + if (i2c->variant->hw == I2C_TYPE_EXYNOS8895) + temp = clkin / op_clk - (t_ftl_cycle + 3) * 2; + else if (i2c->variant->hw == I2C_TYPE_EXYNOS7) + temp = clkin / op_clk - 8 - t_ftl_cycle; + else + temp = clkin / op_clk - 8 - (t_ftl_cycle * 2); div = temp / 512; - clk_cycle = temp / (div + 1) - 2; + + if (i2c->variant->hw == I2C_TYPE_EXYNOS8895) + clk_cycle = (temp + ((t_ftl_cycle + 3) % (div + 1)) * 2) / + (div + 1) - 2; + else + clk_cycle = temp / (div + 1) - 2; if (temp < 4 || div >= 256 || clk_cycle < 2) { dev_err(i2c->dev, "%s clock set-up failed\n", hs_timings ? "HS" : "FS"); @@ -491,6 +516,8 @@ static irqreturn_t exynos5_i2c_irq(int irqno, void *dev_id) switch (i2c->variant->hw) { case I2C_TYPE_EXYNOSAUTOV9: fallthrough; + case I2C_TYPE_EXYNOS8895: + fallthrough; case I2C_TYPE_EXYNOS7: if (int_status & HSI2C_INT_TRANS_DONE) { i2c->trans_done = 1; From bfb3ddfdc5fb7904ba5c7870cfec9efabc9a4f83 Mon Sep 17 00:00:00 2001 From: Andi Shyti Date: Fri, 27 Dec 2024 23:32:29 +0100 Subject: [PATCH 25/52] i2c: qcom-geni: Use dev_err_probe in the probe function Replace classical dev_err with dev_err_probe in the probe function for better error reporting. Also, use dev_err_probe in cases where the error number is clear (e.g., -EIO or -EINVAL) to maintain consistency. Additionally, remove redundant logging to simplify the code. Reviewed-by: Vladimir Zapolskiy Acked-by: Mukesh Kumar Savaliya Link: https://lore.kernel.org/r/20241227223230.462395-2-andi.shyti@kernel.org Signed-off-by: Andi Shyti --- drivers/i2c/busses/i2c-qcom-geni.c | 33 +++++++++++++----------------- 1 file changed, 14 insertions(+), 19 deletions(-) diff --git a/drivers/i2c/busses/i2c-qcom-geni.c b/drivers/i2c/busses/i2c-qcom-geni.c index 7a22e1f46e60a..01db24188e29b 100644 --- a/drivers/i2c/busses/i2c-qcom-geni.c +++ b/drivers/i2c/busses/i2c-qcom-geni.c @@ -823,11 +823,9 @@ static int geni_i2c_probe(struct platform_device *pdev) return gi2c->irq; ret = geni_i2c_clk_map_idx(gi2c); - if (ret) { - dev_err(dev, "Invalid clk frequency %d Hz: %d\n", - gi2c->clk_freq_out, ret); - return ret; - } + if (ret) + return dev_err_probe(dev, ret, "Invalid clk frequency %d Hz\n", + gi2c->clk_freq_out); gi2c->adap.algo = &geni_i2c_algo; init_completion(&gi2c->done); @@ -837,11 +835,10 @@ static int geni_i2c_probe(struct platform_device *pdev) /* Keep interrupts disabled initially to allow for low-power modes */ ret = devm_request_irq(dev, gi2c->irq, geni_i2c_irq, IRQF_NO_AUTOEN, dev_name(dev), gi2c); - if (ret) { - dev_err(dev, "Request_irq failed:%d: err:%d\n", - gi2c->irq, ret); - return ret; - } + if (ret) + return dev_err_probe(dev, ret, + "Request_irq failed: %d\n", gi2c->irq); + i2c_set_adapdata(&gi2c->adap, gi2c); gi2c->adap.dev.parent = dev; gi2c->adap.dev.of_node = dev->of_node; @@ -870,16 +867,14 @@ static int geni_i2c_probe(struct platform_device *pdev) ret = geni_se_resources_on(&gi2c->se); if (ret) { - dev_err(dev, "Error turning on resources %d\n", ret); clk_disable_unprepare(gi2c->core_clk); - return ret; + return dev_err_probe(dev, ret, "Error turning on resources\n"); } proto = geni_se_read_proto(&gi2c->se); if (proto != GENI_SE_I2C) { - dev_err(dev, "Invalid proto %d\n", proto); geni_se_resources_off(&gi2c->se); clk_disable_unprepare(gi2c->core_clk); - return -ENXIO; + return dev_err_probe(dev, -ENXIO, "Invalid proto %d\n", proto); } if (desc && desc->no_dma_support) @@ -894,7 +889,7 @@ static int geni_i2c_probe(struct platform_device *pdev) if (ret) { geni_se_resources_off(&gi2c->se); clk_disable_unprepare(gi2c->core_clk); - return dev_err_probe(dev, ret, "Failed to setup GPI DMA mode\n"); + return ret; } dev_dbg(dev, "Using GPI DMA mode for I2C\n"); @@ -907,10 +902,10 @@ static int geni_i2c_probe(struct platform_device *pdev) tx_depth = desc->tx_fifo_depth; if (!tx_depth) { - dev_err(dev, "Invalid TX FIFO depth\n"); geni_se_resources_off(&gi2c->se); clk_disable_unprepare(gi2c->core_clk); - return -EINVAL; + return dev_err_probe(dev, -EINVAL, + "Invalid TX FIFO depth\n"); } gi2c->tx_wm = tx_depth - 1; @@ -924,7 +919,7 @@ static int geni_i2c_probe(struct platform_device *pdev) clk_disable_unprepare(gi2c->core_clk); ret = geni_se_resources_off(&gi2c->se); if (ret) { - dev_err(dev, "Error turning off resources %d\n", ret); + dev_err_probe(dev, ret, "Error turning off resources\n"); goto err_dma; } @@ -940,7 +935,7 @@ static int geni_i2c_probe(struct platform_device *pdev) ret = i2c_add_adapter(&gi2c->adap); if (ret) { - dev_err(dev, "Error adding i2c adapter %d\n", ret); + dev_err_probe(dev, ret, "Error adding i2c adapter\n"); pm_runtime_disable(gi2c->se.dev); goto err_dma; } From 494fed6809585b8386072cf96ef2426e7a7c6326 Mon Sep 17 00:00:00 2001 From: Andi Shyti Date: Fri, 27 Dec 2024 23:32:30 +0100 Subject: [PATCH 26/52] i2c: qcom-geni: Simplify error handling in probe function Avoid repeating the error handling pattern: geni_se_resources_off(&gi2c->se); clk_disable_unprepare(gi2c->core_clk); return; Introduce a single 'goto' exit label for cleanup in case of errors. While there are currently two distinct exit points, there is no overlap in their handling, allowing both branches to coexist cleanly. Reviewed-by: Vladimir Zapolskiy Link: https://lore.kernel.org/r/20241227223230.462395-3-andi.shyti@kernel.org Signed-off-by: Andi Shyti --- drivers/i2c/busses/i2c-qcom-geni.c | 33 ++++++++++++++++-------------- 1 file changed, 18 insertions(+), 15 deletions(-) diff --git a/drivers/i2c/busses/i2c-qcom-geni.c b/drivers/i2c/busses/i2c-qcom-geni.c index 01db24188e29b..7bbd478171e02 100644 --- a/drivers/i2c/busses/i2c-qcom-geni.c +++ b/drivers/i2c/busses/i2c-qcom-geni.c @@ -867,14 +867,13 @@ static int geni_i2c_probe(struct platform_device *pdev) ret = geni_se_resources_on(&gi2c->se); if (ret) { - clk_disable_unprepare(gi2c->core_clk); - return dev_err_probe(dev, ret, "Error turning on resources\n"); + dev_err_probe(dev, ret, "Error turning on resources\n"); + goto err_clk; } proto = geni_se_read_proto(&gi2c->se); if (proto != GENI_SE_I2C) { - geni_se_resources_off(&gi2c->se); - clk_disable_unprepare(gi2c->core_clk); - return dev_err_probe(dev, -ENXIO, "Invalid proto %d\n", proto); + ret = dev_err_probe(dev, -ENXIO, "Invalid proto %d\n", proto); + goto err_resources; } if (desc && desc->no_dma_support) @@ -886,11 +885,8 @@ static int geni_i2c_probe(struct platform_device *pdev) /* FIFO is disabled, so we can only use GPI DMA */ gi2c->gpi_mode = true; ret = setup_gpi_dma(gi2c); - if (ret) { - geni_se_resources_off(&gi2c->se); - clk_disable_unprepare(gi2c->core_clk); - return ret; - } + if (ret) + goto err_resources; dev_dbg(dev, "Using GPI DMA mode for I2C\n"); } else { @@ -902,10 +898,9 @@ static int geni_i2c_probe(struct platform_device *pdev) tx_depth = desc->tx_fifo_depth; if (!tx_depth) { - geni_se_resources_off(&gi2c->se); - clk_disable_unprepare(gi2c->core_clk); - return dev_err_probe(dev, -EINVAL, - "Invalid TX FIFO depth\n"); + ret = dev_err_probe(dev, -EINVAL, + "Invalid TX FIFO depth\n"); + goto err_resources; } gi2c->tx_wm = tx_depth - 1; @@ -942,10 +937,18 @@ static int geni_i2c_probe(struct platform_device *pdev) dev_dbg(dev, "Geni-I2C adaptor successfully added\n"); - return 0; + return ret; + +err_resources: + geni_se_resources_off(&gi2c->se); +err_clk: + clk_disable_unprepare(gi2c->core_clk); + + return ret; err_dma: release_gpi_dma(gi2c); + return ret; } From febe15218072eee5361a36f4510711a7cf7403e1 Mon Sep 17 00:00:00 2001 From: Bryan O'Donoghue Date: Fri, 27 Dec 2024 13:11:34 +0000 Subject: [PATCH 27/52] dt-bindings: i2c: qcom-cci: Document x1e80100 compatible Add the x1e80100 CCI device string compatible. Signed-off-by: Bryan O'Donoghue Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20241227-b4-linux-next-24-11-18-dtsi-x1e80100-camss-v2-1-06fdd5a7d5bb@linaro.org Signed-off-by: Andi Shyti --- Documentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml b/Documentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml index ef26ba6eda28e..73144473b9b24 100644 --- a/Documentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml +++ b/Documentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml @@ -34,6 +34,7 @@ properties: - qcom,sm8450-cci - qcom,sm8550-cci - qcom,sm8650-cci + - qcom,x1e80100-cci - const: qcom,msm8996-cci # CCI v2 "#address-cells": @@ -224,6 +225,7 @@ allOf: enum: - qcom,sm8550-cci - qcom,sm8650-cci + - qcom,x1e80100-cci then: properties: clocks: From 1ee867e465c1b0216ec02d4c0d334c4e89919cec Mon Sep 17 00:00:00 2001 From: Carlos Song Date: Mon, 30 Dec 2024 11:38:46 +0800 Subject: [PATCH 28/52] i2c: imx-lpi2c: add target mode support LPI2C support master controller and target controller enabled simultaneously. Both controllers share the same SDA/SCL lines and interrupt source but has a separate control and status registers. When target is enabled and an interrupt has been triggered, target register status will be checked to determine IRQ source. Then enter the corresponding interrupt handler function of master or target to handle the interrupt event. This patch supports basic target data read/write operations in 7-bit target address. LPI2C target mode can be enabled by using I2C slave backend. I2C slave backend behaves like a standard I2C client. For simple use and test, Linux I2C slave EEPROM backend can be used. Signed-off-by: Carlos Song Link: https://lore.kernel.org/r/20241230033846.2302500-1-carlos.song@nxp.com Signed-off-by: Andi Shyti --- drivers/i2c/busses/i2c-imx-lpi2c.c | 251 ++++++++++++++++++++++++++++- 1 file changed, 247 insertions(+), 4 deletions(-) diff --git a/drivers/i2c/busses/i2c-imx-lpi2c.c b/drivers/i2c/busses/i2c-imx-lpi2c.c index 9778dc8f6d363..dc25d7dfe1ab6 100644 --- a/drivers/i2c/busses/i2c-imx-lpi2c.c +++ b/drivers/i2c/busses/i2c-imx-lpi2c.c @@ -43,6 +43,20 @@ #define LPI2C_MTDR 0x60 /* i2c master TX data register */ #define LPI2C_MRDR 0x70 /* i2c master RX data register */ +#define LPI2C_SCR 0x110 /* i2c target control register */ +#define LPI2C_SSR 0x114 /* i2c target status register */ +#define LPI2C_SIER 0x118 /* i2c target interrupt enable */ +#define LPI2C_SDER 0x11C /* i2c target DMA enable */ +#define LPI2C_SCFGR0 0x120 /* i2c target configuration */ +#define LPI2C_SCFGR1 0x124 /* i2c target configuration */ +#define LPI2C_SCFGR2 0x128 /* i2c target configuration */ +#define LPI2C_SAMR 0x140 /* i2c target address match */ +#define LPI2C_SASR 0x150 /* i2c target address status */ +#define LPI2C_STAR 0x154 /* i2c target transmit ACK */ +#define LPI2C_STDR 0x160 /* i2c target transmit data */ +#define LPI2C_SRDR 0x170 /* i2c target receive data */ +#define LPI2C_SRDROR 0x178 /* i2c target receive data read only */ + /* i2c command */ #define TRAN_DATA 0X00 #define RECV_DATA 0X01 @@ -76,6 +90,42 @@ #define MDER_TDDE BIT(0) #define MDER_RDDE BIT(1) +#define SCR_SEN BIT(0) +#define SCR_RST BIT(1) +#define SCR_FILTEN BIT(4) +#define SCR_RTF BIT(8) +#define SCR_RRF BIT(9) +#define SSR_TDF BIT(0) +#define SSR_RDF BIT(1) +#define SSR_AVF BIT(2) +#define SSR_TAF BIT(3) +#define SSR_RSF BIT(8) +#define SSR_SDF BIT(9) +#define SSR_BEF BIT(10) +#define SSR_FEF BIT(11) +#define SSR_SBF BIT(24) +#define SSR_BBF BIT(25) +#define SSR_CLEAR_BITS (SSR_RSF | SSR_SDF | SSR_BEF | SSR_FEF) +#define SIER_TDIE BIT(0) +#define SIER_RDIE BIT(1) +#define SIER_AVIE BIT(2) +#define SIER_TAIE BIT(3) +#define SIER_RSIE BIT(8) +#define SIER_SDIE BIT(9) +#define SIER_BEIE BIT(10) +#define SIER_FEIE BIT(11) +#define SIER_AM0F BIT(12) +#define SCFGR1_RXSTALL BIT(1) +#define SCFGR1_TXDSTALL BIT(2) +#define SCFGR2_FILTSDA_SHIFT 24 +#define SCFGR2_FILTSCL_SHIFT 16 +#define SCFGR2_CLKHOLD(x) (x) +#define SCFGR2_FILTSDA(x) ((x) << SCFGR2_FILTSDA_SHIFT) +#define SCFGR2_FILTSCL(x) ((x) << SCFGR2_FILTSCL_SHIFT) +#define SASR_READ_REQ 0x1 +#define SLAVE_INT_FLAG (SIER_TDIE | SIER_RDIE | SIER_AVIE | \ + SIER_SDIE | SIER_BEIE) + #define I2C_CLK_RATIO 2 #define CHUNK_DATA 256 @@ -134,6 +184,7 @@ struct lpi2c_imx_struct { struct i2c_bus_recovery_info rinfo; bool can_use_dma; struct lpi2c_imx_dma *dma; + struct i2c_client *target; }; static void lpi2c_imx_intctrl(struct lpi2c_imx_struct *lpi2c_imx, @@ -957,9 +1008,56 @@ static int lpi2c_imx_xfer(struct i2c_adapter *adapter, return (result < 0) ? result : num; } -static irqreturn_t lpi2c_imx_isr(int irq, void *dev_id) +static irqreturn_t lpi2c_imx_target_isr(struct lpi2c_imx_struct *lpi2c_imx, + u32 ssr, u32 sier_filter) +{ + u8 value; + u32 sasr; + + /* Arbitration lost */ + if (sier_filter & SSR_BEF) { + writel(0, lpi2c_imx->base + LPI2C_SIER); + return IRQ_HANDLED; + } + + /* Address detected */ + if (sier_filter & SSR_AVF) { + sasr = readl(lpi2c_imx->base + LPI2C_SASR); + if (SASR_READ_REQ & sasr) { + /* Read request */ + i2c_slave_event(lpi2c_imx->target, I2C_SLAVE_READ_REQUESTED, &value); + writel(value, lpi2c_imx->base + LPI2C_STDR); + goto ret; + } else { + /* Write request */ + i2c_slave_event(lpi2c_imx->target, I2C_SLAVE_WRITE_REQUESTED, &value); + } + } + + if (sier_filter & SSR_SDF) + /* STOP */ + i2c_slave_event(lpi2c_imx->target, I2C_SLAVE_STOP, &value); + + if (sier_filter & SSR_TDF) { + /* Target send data */ + i2c_slave_event(lpi2c_imx->target, I2C_SLAVE_READ_PROCESSED, &value); + writel(value, lpi2c_imx->base + LPI2C_STDR); + } + + if (sier_filter & SSR_RDF) { + /* Target receive data */ + value = readl(lpi2c_imx->base + LPI2C_SRDR); + i2c_slave_event(lpi2c_imx->target, I2C_SLAVE_WRITE_RECEIVED, &value); + } + +ret: + /* Clear SSR */ + writel(ssr & SSR_CLEAR_BITS, lpi2c_imx->base + LPI2C_SSR); + return IRQ_HANDLED; +} + +static irqreturn_t lpi2c_imx_master_isr(struct lpi2c_imx_struct *lpi2c_imx) { - struct lpi2c_imx_struct *lpi2c_imx = dev_id; unsigned int enabled; unsigned int temp; @@ -979,6 +1077,124 @@ static irqreturn_t lpi2c_imx_isr(int irq, void *dev_id) return IRQ_HANDLED; } +static irqreturn_t lpi2c_imx_isr(int irq, void *dev_id) +{ + struct lpi2c_imx_struct *lpi2c_imx = dev_id; + + if (lpi2c_imx->target) { + u32 scr = readl(lpi2c_imx->base + LPI2C_SCR); + u32 ssr = readl(lpi2c_imx->base + LPI2C_SSR); + u32 sier_filter = ssr & readl(lpi2c_imx->base + LPI2C_SIER); + + /* + * The target is enabled and an interrupt has been triggered. + * Enter the target's irq handler. + */ + if ((scr & SCR_SEN) && sier_filter) + return lpi2c_imx_target_isr(lpi2c_imx, ssr, sier_filter); + } + + /* + * Otherwise the interrupt has been triggered by the master. + * Enter the master's irq handler. + */ + return lpi2c_imx_master_isr(lpi2c_imx); +} + +static void lpi2c_imx_target_init(struct lpi2c_imx_struct *lpi2c_imx) +{ + u32 temp; + + /* reset target module */ + writel(SCR_RST, lpi2c_imx->base + LPI2C_SCR); + writel(0, lpi2c_imx->base + LPI2C_SCR); + + /* Set target address */ + writel((lpi2c_imx->target->addr << 1), lpi2c_imx->base + LPI2C_SAMR); + + writel(SCFGR1_RXSTALL | SCFGR1_TXDSTALL, lpi2c_imx->base + LPI2C_SCFGR1); + + /* + * set SCFGR2: FILTSDA, FILTSCL and CLKHOLD + * + * FILTSCL/FILTSDA can eliminate signal skew. It should generally be + * set to the same value and should be set >= 50ns. + * + * CLKHOLD is only used when clock stretching is enabled, but it will + * extend the clock stretching to ensure there is an additional delay + * between the target driving SDA and the target releasing the SCL pin. + * + * CLKHOLD setting is crucial for lpi2c target. When master read data + * from target, if there is a delay caused by cpu idle, excessive load, + * or other delays between two bytes in one message transmission, it + * will cause a short interval time between the driving SDA signal and + * releasing SCL signal. The lpi2c master will mistakenly think it is a stop + * signal resulting in an arbitration failure. This issue can be avoided + * by setting CLKHOLD. + * + * In order to ensure lpi2c function normally when the lpi2c speed is as + * low as 100kHz, CLKHOLD should be set to 3 and it is also compatible with + * higher clock frequency like 400kHz and 1MHz. + */ + temp = SCFGR2_FILTSDA(2) | SCFGR2_FILTSCL(2) | SCFGR2_CLKHOLD(3); + writel(temp, lpi2c_imx->base + LPI2C_SCFGR2); + + /* + * Enable module: + * SCR_FILTEN can enable digital filter and output delay counter for LPI2C + * target mode. So SCR_FILTEN need be asserted when enable SDA/SCL FILTER + * and CLKHOLD. + */ + writel(SCR_SEN | SCR_FILTEN, lpi2c_imx->base + LPI2C_SCR); + + /* Enable interrupt from i2c module */ + writel(SLAVE_INT_FLAG, lpi2c_imx->base + LPI2C_SIER); +} + +static int lpi2c_imx_register_target(struct i2c_client *client) +{ + struct lpi2c_imx_struct *lpi2c_imx = i2c_get_adapdata(client->adapter); + int ret; + + if (lpi2c_imx->target) + return -EBUSY; + + lpi2c_imx->target = client; + + ret = pm_runtime_resume_and_get(lpi2c_imx->adapter.dev.parent); + if (ret < 0) { + dev_err(&lpi2c_imx->adapter.dev, "failed to resume i2c controller"); + return ret; + } + + lpi2c_imx_target_init(lpi2c_imx); + + return 0; +} + +static int lpi2c_imx_unregister_target(struct i2c_client *client) +{ + struct lpi2c_imx_struct *lpi2c_imx = i2c_get_adapdata(client->adapter); + int ret; + + if (!lpi2c_imx->target) + return -EINVAL; + + /* Reset target address. */ + writel(0, lpi2c_imx->base + LPI2C_SAMR); + + writel(SCR_RST, lpi2c_imx->base + LPI2C_SCR); + writel(0, lpi2c_imx->base + LPI2C_SCR); + + lpi2c_imx->target = NULL; + + ret = pm_runtime_put_sync(lpi2c_imx->adapter.dev.parent); + if (ret < 0) + dev_err(&lpi2c_imx->adapter.dev, "failed to suspend i2c controller"); + + return ret; +} + static int lpi2c_imx_init_recovery_info(struct lpi2c_imx_struct *lpi2c_imx, struct platform_device *pdev) { @@ -1054,6 +1270,8 @@ static u32 lpi2c_imx_func(struct i2c_adapter *adapter) static const struct i2c_algorithm lpi2c_imx_algo = { .master_xfer = lpi2c_imx_xfer, .functionality = lpi2c_imx_func, + .reg_target = lpi2c_imx_register_target, + .unreg_target = lpi2c_imx_unregister_target, }; static const struct of_device_id lpi2c_imx_of_match[] = { @@ -1204,9 +1422,34 @@ static int __maybe_unused lpi2c_runtime_resume(struct device *dev) return 0; } +static int __maybe_unused lpi2c_suspend_noirq(struct device *dev) +{ + return pm_runtime_force_suspend(dev); +} + +static int __maybe_unused lpi2c_resume_noirq(struct device *dev) +{ + struct lpi2c_imx_struct *lpi2c_imx = dev_get_drvdata(dev); + int ret; + + ret = pm_runtime_force_resume(dev); + if (ret) + return ret; + + /* + * If the I2C module powers down during system suspend, + * the register values will be lost. Therefore, reinitialize + * the target when the system resumes. + */ + if (lpi2c_imx->target) + lpi2c_imx_target_init(lpi2c_imx); + + return 0; +} + static const struct dev_pm_ops lpi2c_pm_ops = { - SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, - pm_runtime_force_resume) + SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(lpi2c_suspend_noirq, + lpi2c_resume_noirq) SET_RUNTIME_PM_OPS(lpi2c_runtime_suspend, lpi2c_runtime_resume, NULL) }; From 70f3d3669c074efbcee32867a1ab71f5f7ead385 Mon Sep 17 00:00:00 2001 From: Atharva Tiwari Date: Wed, 1 Jan 2025 16:04:22 +0530 Subject: [PATCH 29/52] i2c: amd756: Fix endianness handling for word data Ensure correct handling of "endianness" for word-sized data in amd756_access - Convert word data into little-endian using cpu_to_le16 - Convert word data from little-endian to cpu native format using le16_to_cpu This fixes poteential issues on big-endian systems and ensure proper byte ordering for SMBus word transacitions Signed-off-by: Atharva Tiwari Link: https://lore.kernel.org/r/20250101103422.30523-1-evepolonium@gmail.com Signed-off-by: Andi Shyti --- drivers/i2c/busses/i2c-amd756.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/i2c/busses/i2c-amd756.c b/drivers/i2c/busses/i2c-amd756.c index fa0d5a2c37323..e551d63e96b12 100644 --- a/drivers/i2c/busses/i2c-amd756.c +++ b/drivers/i2c/busses/i2c-amd756.c @@ -31,6 +31,7 @@ #include #include #include +#include /* AMD756 SMBus address offsets */ #define SMB_ADDR_OFFSET 0xE0 @@ -211,7 +212,7 @@ static s32 amd756_access(struct i2c_adapter * adap, u16 addr, SMB_HOST_ADDRESS); outb_p(command, SMB_HOST_COMMAND); if (read_write == I2C_SMBUS_WRITE) - outw_p(data->word, SMB_HOST_DATA); /* TODO: endian???? */ + outw_p(cpu_to_le16((u16)data->word), SMB_HOST_DATA); size = AMD756_WORD_DATA; break; case I2C_SMBUS_BLOCK_DATA: @@ -256,7 +257,7 @@ static s32 amd756_access(struct i2c_adapter * adap, u16 addr, data->byte = inw_p(SMB_HOST_DATA); break; case AMD756_WORD_DATA: - data->word = inw_p(SMB_HOST_DATA); /* TODO: endian???? */ + data->word = (u16)le16_to_cpu(inw_p(SMB_HOST_DATA)); break; case AMD756_BLOCK_DATA: data->block[0] = inw_p(SMB_HOST_DATA) & 0x3f; From b04ce63859793e3439b394976b8d29e785d4d69a Mon Sep 17 00:00:00 2001 From: Bartosz Golaszewski Date: Wed, 11 Dec 2024 11:23:35 +0100 Subject: [PATCH 30/52] i2c: davinci: kill platform data There are no more board file users of this driver. The platform data structure is only used internally. Two of the four fields it stores are not used at all anymore. Pull the remainder into the driver data struct and shrink code by removing parts that are now dead code. Signed-off-by: Bartosz Golaszewski Link: https://lore.kernel.org/r/20241211102337.37956-1-brgl@bgdev.pl Signed-off-by: Andi Shyti --- drivers/i2c/busses/i2c-davinci.c | 84 +++++------------------ include/linux/platform_data/i2c-davinci.h | 26 ------- 2 files changed, 19 insertions(+), 91 deletions(-) delete mode 100644 include/linux/platform_data/i2c-davinci.h diff --git a/drivers/i2c/busses/i2c-davinci.c b/drivers/i2c/busses/i2c-davinci.c index 71dc0a6688b7a..4b499931fdfd0 100644 --- a/drivers/i2c/busses/i2c-davinci.c +++ b/drivers/i2c/busses/i2c-davinci.c @@ -26,7 +26,6 @@ #include #include #include -#include #include /* ----- global defines ----------------------------------------------- */ @@ -117,6 +116,8 @@ /* timeout for pm runtime autosuspend */ #define DAVINCI_I2C_PM_TIMEOUT 1000 /* ms */ +#define DAVINCI_I2C_DEFAULT_BUS_FREQ 100 + struct davinci_i2c_dev { struct device *dev; void __iomem *base; @@ -132,13 +133,10 @@ struct davinci_i2c_dev { #ifdef CONFIG_CPU_FREQ struct notifier_block freq_transition; #endif - struct davinci_i2c_platform_data *pdata; -}; - -/* default platform data to use if not supplied in the platform_device */ -static struct davinci_i2c_platform_data davinci_i2c_platform_data_default = { - .bus_freq = 100, - .bus_delay = 0, + /* standard bus frequency (kHz) */ + unsigned int bus_freq; + /* Chip has a ICPFUNC register */ + bool has_pfunc; }; static inline void davinci_i2c_write_reg(struct davinci_i2c_dev *i2c_dev, @@ -168,7 +166,6 @@ static inline void davinci_i2c_reset_ctrl(struct davinci_i2c_dev *i2c_dev, static void i2c_davinci_calc_clk_dividers(struct davinci_i2c_dev *dev) { - struct davinci_i2c_platform_data *pdata = dev->pdata; u16 psc; u32 clk; u32 d; @@ -212,16 +209,16 @@ static void i2c_davinci_calc_clk_dividers(struct davinci_i2c_dev *dev) if (of_node && of_device_is_compatible(of_node, "ti,keystone-i2c")) d = 6; - clk = ((input_clock / (psc + 1)) / (pdata->bus_freq * 1000)); + clk = ((input_clock / (psc + 1)) / (dev->bus_freq * 1000)); /* Avoid driving the bus too fast because of rounding errors above */ - if (input_clock / (psc + 1) / clk > pdata->bus_freq * 1000) + if (input_clock / (psc + 1) / clk > dev->bus_freq * 1000) clk++; /* * According to I2C-BUS Spec 2.1, in FAST-MODE LOW period should be at * least 1.3uS, which is not the case with 50% duty cycle. Driving HIGH * to LOW ratio as 1 to 2 is more safe. */ - if (pdata->bus_freq > 100) + if (dev->bus_freq > 100) clkl = (clk << 1) / 3; else clkl = (clk >> 1); @@ -255,8 +252,6 @@ static void i2c_davinci_calc_clk_dividers(struct davinci_i2c_dev *dev) */ static int i2c_davinci_init(struct davinci_i2c_dev *dev) { - struct davinci_i2c_platform_data *pdata = dev->pdata; - /* put I2C into reset */ davinci_i2c_reset_ctrl(dev, 0); @@ -274,8 +269,7 @@ static int i2c_davinci_init(struct davinci_i2c_dev *dev) davinci_i2c_read_reg(dev, DAVINCI_I2C_CLKL_REG)); dev_dbg(dev->dev, "CLKH = %d\n", davinci_i2c_read_reg(dev, DAVINCI_I2C_CLKH_REG)); - dev_dbg(dev->dev, "bus_freq = %dkHz, bus_delay = %d\n", - pdata->bus_freq, pdata->bus_delay); + dev_dbg(dev->dev, "bus_freq = %dkHz\n", dev->bus_freq); /* Take the I2C module out of reset: */ @@ -309,12 +303,6 @@ static void davinci_i2c_unprepare_recovery(struct i2c_adapter *adap) i2c_davinci_init(dev); } -static struct i2c_bus_recovery_info davinci_i2c_gpio_recovery_info = { - .recover_bus = i2c_generic_scl_recovery, - .prepare_recovery = davinci_i2c_prepare_recovery, - .unprepare_recovery = davinci_i2c_unprepare_recovery, -}; - static void davinci_i2c_set_scl(struct i2c_adapter *adap, int val) { struct davinci_i2c_dev *dev = i2c_get_adapdata(adap); @@ -414,7 +402,6 @@ static int i2c_davinci_xfer_msg(struct i2c_adapter *adap, struct i2c_msg *msg, int stop) { struct davinci_i2c_dev *dev = i2c_get_adapdata(adap); - struct davinci_i2c_platform_data *pdata = dev->pdata; u32 flag; u16 w; unsigned long time_left; @@ -424,10 +411,6 @@ i2c_davinci_xfer_msg(struct i2c_adapter *adap, struct i2c_msg *msg, int stop) return -EADDRNOTAVAIL; } - /* Introduce a delay, required for some boards (e.g Davinci EVM) */ - if (pdata->bus_delay) - udelay(pdata->bus_delay); - /* set the target address */ davinci_i2c_write_reg(dev, DAVINCI_I2C_SAR_REG, msg->addr); @@ -758,8 +741,8 @@ static int davinci_i2c_probe(struct platform_device *pdev) { struct davinci_i2c_dev *dev; struct i2c_adapter *adap; - struct i2c_bus_recovery_info *rinfo; int r, irq; + u32 prop; irq = platform_get_irq(pdev, 0); if (irq < 0) @@ -773,29 +756,15 @@ static int davinci_i2c_probe(struct platform_device *pdev) dev->dev = &pdev->dev; dev->irq = irq; - dev->pdata = dev_get_platdata(&pdev->dev); platform_set_drvdata(pdev, dev); - if (!dev->pdata && pdev->dev.of_node) { - u32 prop; - - dev->pdata = devm_kzalloc(&pdev->dev, - sizeof(struct davinci_i2c_platform_data), GFP_KERNEL); - if (!dev->pdata) - return -ENOMEM; - - memcpy(dev->pdata, &davinci_i2c_platform_data_default, - sizeof(struct davinci_i2c_platform_data)); - if (!of_property_read_u32(pdev->dev.of_node, "clock-frequency", - &prop)) - dev->pdata->bus_freq = prop / 1000; - - dev->pdata->has_pfunc = - of_property_read_bool(pdev->dev.of_node, - "ti,has-pfunc"); - } else if (!dev->pdata) { - dev->pdata = &davinci_i2c_platform_data_default; - } + r = device_property_read_u32(&pdev->dev, "clock-frequency", &prop); + if (r) + prop = DAVINCI_I2C_DEFAULT_BUS_FREQ; + + dev->bus_freq = prop / 1000; + + dev->has_pfunc = device_property_present(&pdev->dev, "ti,has-pfunc"); dev->clk = devm_clk_get(&pdev->dev, NULL); if (IS_ERR(dev->clk)) @@ -843,23 +812,8 @@ static int davinci_i2c_probe(struct platform_device *pdev) adap->timeout = DAVINCI_I2C_TIMEOUT; adap->dev.of_node = pdev->dev.of_node; - if (dev->pdata->has_pfunc) + if (dev->has_pfunc) adap->bus_recovery_info = &davinci_i2c_scl_recovery_info; - else if (dev->pdata->gpio_recovery) { - rinfo = &davinci_i2c_gpio_recovery_info; - adap->bus_recovery_info = rinfo; - rinfo->scl_gpiod = devm_gpiod_get(&pdev->dev, "scl", - GPIOD_OUT_HIGH_OPEN_DRAIN); - if (IS_ERR(rinfo->scl_gpiod)) { - r = PTR_ERR(rinfo->scl_gpiod); - goto err_unuse_clocks; - } - rinfo->sda_gpiod = devm_gpiod_get(&pdev->dev, "sda", GPIOD_IN); - if (IS_ERR(rinfo->sda_gpiod)) { - r = PTR_ERR(rinfo->sda_gpiod); - goto err_unuse_clocks; - } - } adap->nr = pdev->id; r = i2c_add_numbered_adapter(adap); diff --git a/include/linux/platform_data/i2c-davinci.h b/include/linux/platform_data/i2c-davinci.h deleted file mode 100644 index 98967df074689..0000000000000 --- a/include/linux/platform_data/i2c-davinci.h +++ /dev/null @@ -1,26 +0,0 @@ -/* - * DaVinci I2C controller platform_device info - * - * Author: Vladimir Barinov, MontaVista Software, Inc. - * - * 2007 (c) MontaVista Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. -*/ - -#ifndef __ASM_ARCH_I2C_H -#define __ASM_ARCH_I2C_H - -/* All frequencies are expressed in kHz */ -struct davinci_i2c_platform_data { - unsigned int bus_freq; /* standard bus frequency (kHz) */ - unsigned int bus_delay; /* post-transaction delay (usec) */ - bool gpio_recovery; /* Use GPIO recovery method */ - bool has_pfunc; /* Chip has a ICPFUNC register */ -}; - -/* for board setup code */ -void davinci_init_i2c(struct davinci_i2c_platform_data *); - -#endif /* __ASM_ARCH_I2C_H */ From 7d2b31f833b7faf2f17f9d54cf3820367ba85a23 Mon Sep 17 00:00:00 2001 From: Bartosz Golaszewski Date: Wed, 11 Dec 2024 11:23:36 +0100 Subject: [PATCH 31/52] i2c: davinci: order includes alphabetically For better readability order included headers alphabetically. Signed-off-by: Bartosz Golaszewski Reviewed-by: Andi Shyti Link: https://lore.kernel.org/r/20241211102337.37956-2-brgl@bgdev.pl Signed-off-by: Andi Shyti --- drivers/i2c/busses/i2c-davinci.c | 21 +++++++++++---------- 1 file changed, 11 insertions(+), 10 deletions(-) diff --git a/drivers/i2c/busses/i2c-davinci.c b/drivers/i2c/busses/i2c-davinci.c index 4b499931fdfd0..bab9f785eeecc 100644 --- a/drivers/i2c/busses/i2c-davinci.c +++ b/drivers/i2c/busses/i2c-davinci.c @@ -11,22 +11,23 @@ * * ---------------------------------------------------------------------------- */ -#include -#include -#include -#include + #include -#include -#include +#include +#include #include +#include +#include +#include #include -#include #include -#include -#include -#include +#include +#include #include +#include #include +#include +#include /* ----- global defines ----------------------------------------------- */ From 8abbc711da605e530a0f06bed7feb76df35e99f7 Mon Sep 17 00:00:00 2001 From: Bartosz Golaszewski Date: Wed, 11 Dec 2024 11:23:37 +0100 Subject: [PATCH 32/52] i2c: davinci: use generic device property accessors Don't use generic OF APIs if the generic device-level ones will do. Signed-off-by: Bartosz Golaszewski Reviewed-by: Andi Shyti Link: https://lore.kernel.org/r/20241211102337.37956-3-brgl@bgdev.pl Signed-off-by: Andi Shyti --- drivers/i2c/busses/i2c-davinci.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/drivers/i2c/busses/i2c-davinci.c b/drivers/i2c/busses/i2c-davinci.c index bab9f785eeecc..6a909d3396812 100644 --- a/drivers/i2c/busses/i2c-davinci.c +++ b/drivers/i2c/busses/i2c-davinci.c @@ -23,9 +23,9 @@ #include #include #include -#include #include #include +#include #include #include @@ -173,7 +173,6 @@ static void i2c_davinci_calc_clk_dividers(struct davinci_i2c_dev *dev) u32 clkh; u32 clkl; u32 input_clock = clk_get_rate(dev->clk); - struct device_node *of_node = dev->dev->of_node; /* NOTE: I2C Clock divider programming info * As per I2C specs the following formulas provide prescaler @@ -207,7 +206,7 @@ static void i2c_davinci_calc_clk_dividers(struct davinci_i2c_dev *dev) psc++; /* better to run under spec than over */ d = (psc >= 2) ? 5 : 7 - psc; - if (of_node && of_device_is_compatible(of_node, "ti,keystone-i2c")) + if (device_is_compatible(dev->dev, "ti,keystone-i2c")) d = 6; clk = ((input_clock / (psc + 1)) / (dev->bus_freq * 1000)); @@ -811,7 +810,7 @@ static int davinci_i2c_probe(struct platform_device *pdev) adap->algo = &i2c_davinci_algo; adap->dev.parent = &pdev->dev; adap->timeout = DAVINCI_I2C_TIMEOUT; - adap->dev.of_node = pdev->dev.of_node; + adap->dev.of_node = dev_of_node(&pdev->dev); if (dev->has_pfunc) adap->bus_recovery_info = &davinci_i2c_scl_recovery_info; From 4262df2a69c32a0bce87d75342f6f8e3a535d7cb Mon Sep 17 00:00:00 2001 From: Carlos Song Date: Fri, 27 Dec 2024 16:47:36 +0800 Subject: [PATCH 33/52] i2c: imx-lpi2c: make controller available until the system enters suspend_noirq() and from resume_noirq(). This is a general i2c controller feature. Some I2C devices may need the I2C controller to remain active during resume_noirq() or suspend_noirq(). If the controller is autosuspended, there is no way to wake it up once runtime PM disabled (in suspend_late()). During system resume, the I2C controller will be available only after runtime PM is re-enabled (in resume_early()). However, this may be too late for some devices. Wake up the controller in the suspend() callback while runtime PM is still enabled. The I2C controller will remain available until the suspend_noirq() callback (pm_runtime_force_suspend()) is called. During resume, the I2C controller can be restored by the resume_noirq() callback (pm_runtime_force_resume()). Finally, the resume() callback re-enables autosuspend. As a result, the I2C controller can remain available until the system enters suspend_noirq() and from resume_noirq(). Signed-off-by: Carlos Song Link: https://lore.kernel.org/r/20241227084736.1323943-1-carlos.song@nxp.com Signed-off-by: Andi Shyti --- drivers/i2c/busses/i2c-imx-lpi2c.c | 36 +++++++++++++++++++++++++++++- 1 file changed, 35 insertions(+), 1 deletion(-) diff --git a/drivers/i2c/busses/i2c-imx-lpi2c.c b/drivers/i2c/busses/i2c-imx-lpi2c.c index dc25d7dfe1ab6..0d4b3935e6873 100644 --- a/drivers/i2c/busses/i2c-imx-lpi2c.c +++ b/drivers/i2c/busses/i2c-imx-lpi2c.c @@ -1318,7 +1318,7 @@ static int lpi2c_imx_probe(struct platform_device *pdev) if (ret) lpi2c_imx->bitrate = I2C_MAX_STANDARD_MODE_FREQ; - ret = devm_request_irq(&pdev->dev, irq, lpi2c_imx_isr, 0, + ret = devm_request_irq(&pdev->dev, irq, lpi2c_imx_isr, IRQF_NO_SUSPEND, pdev->name, lpi2c_imx); if (ret) return dev_err_probe(&pdev->dev, ret, "can't claim irq %d\n", irq); @@ -1447,9 +1447,43 @@ static int __maybe_unused lpi2c_resume_noirq(struct device *dev) return 0; } +static int lpi2c_suspend(struct device *dev) +{ + /* + * Some I2C devices may need the I2C controller to remain active + * during resume_noirq() or suspend_noirq(). If the controller is + * autosuspended, there is no way to wake it up once runtime PM is + * disabled (in suspend_late()). + * + * During system resume, the I2C controller will be available only + * after runtime PM is re-enabled (in resume_early()). However, this + * may be too late for some devices. + * + * Wake up the controller in the suspend() callback while runtime PM + * is still enabled. The I2C controller will remain available until + * the suspend_noirq() callback (pm_runtime_force_suspend()) is + * called. During resume, the I2C controller can be restored by the + * resume_noirq() callback (pm_runtime_force_resume()). + * + * Finally, the resume() callback re-enables autosuspend, ensuring + * the I2C controller remains available until the system enters + * suspend_noirq() and from resume_noirq(). + */ + return pm_runtime_resume_and_get(dev); +} + +static int lpi2c_resume(struct device *dev) +{ + pm_runtime_mark_last_busy(dev); + pm_runtime_put_autosuspend(dev); + + return 0; +} + static const struct dev_pm_ops lpi2c_pm_ops = { SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(lpi2c_suspend_noirq, lpi2c_resume_noirq) + SYSTEM_SLEEP_PM_OPS(lpi2c_suspend, lpi2c_resume) SET_RUNTIME_PM_OPS(lpi2c_runtime_suspend, lpi2c_runtime_resume, NULL) }; From 7fd9d28d1a6b1bab4559e472e3d552b5c77e08bb Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Thomas=20Wei=C3=9Fschuh?= Date: Sun, 15 Dec 2024 14:21:39 +0100 Subject: [PATCH 34/52] i2c: slave-eeprom: Constify 'struct bin_attribute' MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The sysfs core now allows instances of 'struct bin_attribute' to be moved into read-only memory. Make use of that to protect them against accidental or malicious modifications. Signed-off-by: Thomas Weißschuh Signed-off-by: Wolfram Sang --- drivers/i2c/i2c-slave-eeprom.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/i2c/i2c-slave-eeprom.c b/drivers/i2c/i2c-slave-eeprom.c index 5946c0d0aef99..275d1d0e910fb 100644 --- a/drivers/i2c/i2c-slave-eeprom.c +++ b/drivers/i2c/i2c-slave-eeprom.c @@ -91,7 +91,7 @@ static int i2c_slave_eeprom_slave_cb(struct i2c_client *client, } static ssize_t i2c_slave_eeprom_bin_read(struct file *filp, struct kobject *kobj, - struct bin_attribute *attr, char *buf, loff_t off, size_t count) + const struct bin_attribute *attr, char *buf, loff_t off, size_t count) { struct eeprom_data *eeprom; unsigned long flags; @@ -106,7 +106,7 @@ static ssize_t i2c_slave_eeprom_bin_read(struct file *filp, struct kobject *kobj } static ssize_t i2c_slave_eeprom_bin_write(struct file *filp, struct kobject *kobj, - struct bin_attribute *attr, char *buf, loff_t off, size_t count) + const struct bin_attribute *attr, char *buf, loff_t off, size_t count) { struct eeprom_data *eeprom; unsigned long flags; @@ -165,8 +165,8 @@ static int i2c_slave_eeprom_probe(struct i2c_client *client) sysfs_bin_attr_init(&eeprom->bin); eeprom->bin.attr.name = "slave-eeprom"; eeprom->bin.attr.mode = S_IRUSR | S_IWUSR; - eeprom->bin.read = i2c_slave_eeprom_bin_read; - eeprom->bin.write = i2c_slave_eeprom_bin_write; + eeprom->bin.read_new = i2c_slave_eeprom_bin_read; + eeprom->bin.write_new = i2c_slave_eeprom_bin_write; eeprom->bin.size = size; ret = sysfs_create_bin_file(&client->dev.kobj, &eeprom->bin); From 735668f8e5c99698100e9df1e296f76a51c3c83a Mon Sep 17 00:00:00 2001 From: Heiner Kallweit Date: Tue, 7 Jan 2025 21:24:29 +0100 Subject: [PATCH 35/52] i2c: core: Allocate temp client on the stack in i2c_detect The temp client is used only in scope of this function, so there's no benefit in dynamic allocation. Signed-off-by: Heiner Kallweit Signed-off-by: Wolfram Sang --- drivers/i2c/i2c-core-base.c | 13 +++++-------- 1 file changed, 5 insertions(+), 8 deletions(-) diff --git a/drivers/i2c/i2c-core-base.c b/drivers/i2c/i2c-core-base.c index bd90a6084fc0d..b072030a9105a 100644 --- a/drivers/i2c/i2c-core-base.c +++ b/drivers/i2c/i2c-core-base.c @@ -2461,7 +2461,7 @@ static int i2c_detect_address(struct i2c_client *temp_client, static int i2c_detect(struct i2c_adapter *adapter, struct i2c_driver *driver) { const unsigned short *address_list; - struct i2c_client *temp_client; + struct i2c_client temp_client; int i, err = 0; address_list = driver->address_list; @@ -2482,22 +2482,19 @@ static int i2c_detect(struct i2c_adapter *adapter, struct i2c_driver *driver) return 0; /* Set up a temporary client to help detect callback */ - temp_client = kzalloc(sizeof(struct i2c_client), GFP_KERNEL); - if (!temp_client) - return -ENOMEM; - temp_client->adapter = adapter; + memset(&temp_client, 0, sizeof(temp_client)); + temp_client.adapter = adapter; for (i = 0; address_list[i] != I2C_CLIENT_END; i += 1) { dev_dbg(&adapter->dev, "found normal entry for adapter %d, addr 0x%02x\n", i2c_adapter_id(adapter), address_list[i]); - temp_client->addr = address_list[i]; - err = i2c_detect_address(temp_client, driver); + temp_client.addr = address_list[i]; + err = i2c_detect_address(&temp_client, driver); if (unlikely(err)) break; } - kfree(temp_client); return err; } From 65cba48d295216d0636ee835631142099374d905 Mon Sep 17 00:00:00 2001 From: Philipp Stanner Date: Thu, 21 Nov 2024 20:56:25 +0100 Subject: [PATCH 36/52] i2c: i801: Remove unnecessary PCI function call Since the changes in commit f748a07a0b64 ("PCI: Remove legacy pcim_release()") all pcim_enable_device() does is set up a callback that disables the device from being disabled from driver detach. The function pcim_pin_device() prevents said disabling. pcim_enable_device(), therefore, sets up an action that is removed immediately afterwards by pcim_pin_device(). Replace pcim_enable_device() with pci_enable_device() and remove the unnecessary call to pcim_pin_device(). Signed-off-by: Philipp Stanner Link: https://lore.kernel.org/r/20241121195624.144839-2-pstanner@redhat.com Signed-off-by: Andi Shyti --- drivers/i2c/busses/i2c-i801.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/drivers/i2c/busses/i2c-i801.c b/drivers/i2c/busses/i2c-i801.c index 75dab01d43a75..d9d354ce231d6 100644 --- a/drivers/i2c/busses/i2c-i801.c +++ b/drivers/i2c/busses/i2c-i801.c @@ -1682,13 +1682,16 @@ static int i801_probe(struct pci_dev *dev, const struct pci_device_id *id) if (!(priv->features & FEATURE_BLOCK_BUFFER)) priv->features &= ~FEATURE_BLOCK_PROC; - err = pcim_enable_device(dev); + /* + * Do not call pcim_enable_device(), because the device has to remain + * enabled on driver detach. See i801_remove() for the reasoning. + */ + err = pci_enable_device(dev); if (err) { dev_err(&dev->dev, "Failed to enable SMBus PCI device (%d)\n", err); return err; } - pcim_pin_device(dev); /* Determine the address of the SMBus area */ priv->smba = pci_resource_start(dev, SMBBAR); From fd4e9308312972d5bd11fe1d8c032b95b44748cb Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Patrick=20H=C3=B6hn?= Date: Tue, 12 Mar 2024 20:31:31 +0100 Subject: [PATCH 37/52] i2c: i801: Add lis3lv02d for Dell Precision M6800 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On the Dell Precision M6800/OXD1M5, BIOS A26 06/13/2029, Linux prints the warning below. i801_smbus 0000:00:1f.4: Accelerometer lis3lv02d is present on SMBus but its address is unknown, skipping registration Following the same suggestions by Wolfram Sang as for the Dell Precision 3540 [1], the accelerometer can be successfully found on I2C bus 0 at address 0x29. $ echo lis3lv02d 0x29 | sudo tee /sys/bus/i2c/devices/i2c-0/new_device lis3lv02d 0x29 $ dmesg | tail -5 [1185.385204] lis3lv02d_i2c 0-0029: supply Vdd not found, using dummy regulator [1185.385235] lis3lv02d_i2c 0-0029: supply Vdd_IO not found, using dummy regulator [1185.399689] lis3lv02d: 8 bits 3DC sensor found [1185.449391] input: ST LIS3LV02DL Accelerometer as /devices/platform/lis3lv02d/input/input371 [1185.449577] i2c i2c-0: new_device: Instantiated device lis3lv02d at 0x29 So, the device has that accelerometer. Add the I2C address to the mapping list, and test it successfully on the device. [1]: https://lore.kernel.org/linux-i2c/97708c11-ac85-fb62-2c8e-d37739ca826f@molgen.mpg.de/ Signed-off-by: Patrick Höhn Acked-by: Pali Rohár Link: https://lore.kernel.org/r/20240312193132.26518-1-hoehnp@gmx.de Signed-off-by: Andi Shyti --- drivers/i2c/busses/i2c-i801.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/i2c/busses/i2c-i801.c b/drivers/i2c/busses/i2c-i801.c index d9d354ce231d6..b6d1140eb678c 100644 --- a/drivers/i2c/busses/i2c-i801.c +++ b/drivers/i2c/busses/i2c-i801.c @@ -1252,6 +1252,7 @@ static const struct { */ { "Latitude 5480", 0x29 }, { "Precision 3540", 0x29 }, + { "Precision M6800", 0x29 }, { "Vostro V131", 0x1d }, { "Vostro 5568", 0x29 }, { "XPS 15 7590", 0x29 }, From b967c4b9a103f80608fffb8d3145bb3fb4a3ea63 Mon Sep 17 00:00:00 2001 From: Wolfram Sang Date: Tue, 14 Jan 2025 11:07:03 +0100 Subject: [PATCH 38/52] Revert "i2c: amd756: Fix endianness handling for word data" This reverts commit 70f3d3669c074efbcee32867a1ab71f5f7ead385. We concluded that removing the comments is the right thing to do. This will be done by an incremental patch. Signed-off-by: Wolfram Sang --- drivers/i2c/busses/i2c-amd756.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/i2c/busses/i2c-amd756.c b/drivers/i2c/busses/i2c-amd756.c index e551d63e96b12..fa0d5a2c37323 100644 --- a/drivers/i2c/busses/i2c-amd756.c +++ b/drivers/i2c/busses/i2c-amd756.c @@ -31,7 +31,6 @@ #include #include #include -#include /* AMD756 SMBus address offsets */ #define SMB_ADDR_OFFSET 0xE0 @@ -212,7 +211,7 @@ static s32 amd756_access(struct i2c_adapter * adap, u16 addr, SMB_HOST_ADDRESS); outb_p(command, SMB_HOST_COMMAND); if (read_write == I2C_SMBUS_WRITE) - outw_p(cpu_to_le16((u16)data->word), SMB_HOST_DATA); + outw_p(data->word, SMB_HOST_DATA); /* TODO: endian???? */ size = AMD756_WORD_DATA; break; case I2C_SMBUS_BLOCK_DATA: @@ -257,7 +256,7 @@ static s32 amd756_access(struct i2c_adapter * adap, u16 addr, data->byte = inw_p(SMB_HOST_DATA); break; case AMD756_WORD_DATA: - data->word = (u16)le16_to_cpu(inw_p(SMB_HOST_DATA)); + data->word = inw_p(SMB_HOST_DATA); /* TODO: endian???? */ break; case AMD756_BLOCK_DATA: data->block[0] = inw_p(SMB_HOST_DATA) & 0x3f; From 8834a4ec9d0fca6e63a9b077e6476e0ccafcc297 Mon Sep 17 00:00:00 2001 From: Atharva Tiwari Date: Mon, 13 Jan 2025 18:27:28 +0530 Subject: [PATCH 39/52] i2c: amd756: Remove superfluous TODO This old driver has never been used on big-endian systems, so remove the todo. Suggested-by: Andi Shyti Signed-off-by: Atharva Tiwari [wsa: reworded commit message] Signed-off-by: Wolfram Sang --- drivers/i2c/busses/i2c-amd756.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/i2c/busses/i2c-amd756.c b/drivers/i2c/busses/i2c-amd756.c index fa0d5a2c37323..3621c02f1cbab 100644 --- a/drivers/i2c/busses/i2c-amd756.c +++ b/drivers/i2c/busses/i2c-amd756.c @@ -211,7 +211,7 @@ static s32 amd756_access(struct i2c_adapter * adap, u16 addr, SMB_HOST_ADDRESS); outb_p(command, SMB_HOST_COMMAND); if (read_write == I2C_SMBUS_WRITE) - outw_p(data->word, SMB_HOST_DATA); /* TODO: endian???? */ + outw_p(data->word, SMB_HOST_DATA); size = AMD756_WORD_DATA; break; case I2C_SMBUS_BLOCK_DATA: @@ -256,7 +256,7 @@ static s32 amd756_access(struct i2c_adapter * adap, u16 addr, data->byte = inw_p(SMB_HOST_DATA); break; case AMD756_WORD_DATA: - data->word = inw_p(SMB_HOST_DATA); /* TODO: endian???? */ + data->word = inw_p(SMB_HOST_DATA); break; case AMD756_BLOCK_DATA: data->block[0] = inw_p(SMB_HOST_DATA) & 0x3f; From 76dc16296124ec478ec9ac011f0b9b52462c88d5 Mon Sep 17 00:00:00 2001 From: Lad Prabhakar Date: Mon, 13 Jan 2025 12:26:34 +0000 Subject: [PATCH 40/52] i2c: riic: Introduce a separate variable for IRQ Refactor the IRQ handling in riic_i2c_probe by introducing a local variable `irq` to store IRQ numbers instead of assigning them to `ret`. This change improves code readability and clarity. Suggested-by: Andy Shevchenko Signed-off-by: Lad Prabhakar Reviewed-by: Wolfram Sang Tested-by: Wolfram Sang Reviewed-by: Geert Uytterhoeven Reviewed-by: Andy Shevchenko Signed-off-by: Wolfram Sang --- drivers/i2c/busses/i2c-riic.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/drivers/i2c/busses/i2c-riic.c b/drivers/i2c/busses/i2c-riic.c index 9264adc97ca9d..9809ac095710b 100644 --- a/drivers/i2c/busses/i2c-riic.c +++ b/drivers/i2c/busses/i2c-riic.c @@ -464,11 +464,13 @@ static int riic_i2c_probe(struct platform_device *pdev) return ret; for (i = 0; i < ARRAY_SIZE(riic_irqs); i++) { - ret = platform_get_irq(pdev, riic_irqs[i].res_num); - if (ret < 0) - return ret; + int irq; + + irq = platform_get_irq(pdev, riic_irqs[i].res_num); + if (irq < 0) + return irq; - ret = devm_request_irq(dev, ret, riic_irqs[i].isr, + ret = devm_request_irq(dev, irq, riic_irqs[i].isr, 0, riic_irqs[i].name, riic); if (ret) { dev_err(dev, "failed to request irq %s\n", riic_irqs[i].name); From e2aa2502e8067527e36dd7a3cad81b2004614a6c Mon Sep 17 00:00:00 2001 From: Lad Prabhakar Date: Mon, 13 Jan 2025 12:26:35 +0000 Subject: [PATCH 41/52] i2c: riic: Use dev_err_probe in probe and riic_init_hw functions Refactor error handling in the riic_i2c_probe() and riic_init_hw() functions by replacing multiple dev_err() calls with dev_err_probe(). Additionally, update the riic_init_hw() function to use a local `dev` pointer instead of `riic->adapter.dev` for dev_err_probe(), as the I2C adapter is not initialized at this stage. Drop the cast to (unsigned long) in the riic_init_hw() function when printing the bus frequency, and update the error message to display the frequency in Hz, improving clarity. Signed-off-by: Lad Prabhakar Reviewed-by: Geert Uytterhoeven Reviewed-by: Wolfram Sang Tested-by: Wolfram Sang Tested-by: Claudiu Beznea Reviewed-by: Claudiu Beznea Reviewed-by: Andy Shevchenko Signed-off-by: Wolfram Sang --- drivers/i2c/busses/i2c-riic.c | 22 +++++++++------------- 1 file changed, 9 insertions(+), 13 deletions(-) diff --git a/drivers/i2c/busses/i2c-riic.c b/drivers/i2c/busses/i2c-riic.c index 9809ac095710b..4e2add343c9e4 100644 --- a/drivers/i2c/busses/i2c-riic.c +++ b/drivers/i2c/busses/i2c-riic.c @@ -356,11 +356,9 @@ static int riic_init_hw(struct riic_dev *riic) rate /= 2; } - if (brl > (0x1F + 3)) { - dev_err(&riic->adapter.dev, "invalid speed (%lu). Too slow.\n", - (unsigned long)t->bus_freq_hz); - return -EINVAL; - } + if (brl > (0x1F + 3)) + return dev_err_probe(dev, -EINVAL, "invalid speed (%uHz). Too slow.\n", + t->bus_freq_hz); brh = total_ticks - brl; @@ -445,10 +443,9 @@ static int riic_i2c_probe(struct platform_device *pdev) return PTR_ERR(riic->base); riic->clk = devm_clk_get(dev, NULL); - if (IS_ERR(riic->clk)) { - dev_err(dev, "missing controller clock"); - return PTR_ERR(riic->clk); - } + if (IS_ERR(riic->clk)) + return dev_err_probe(dev, PTR_ERR(riic->clk), + "missing controller clock"); riic->rstc = devm_reset_control_get_optional_exclusive(dev, NULL); if (IS_ERR(riic->rstc)) @@ -472,10 +469,9 @@ static int riic_i2c_probe(struct platform_device *pdev) ret = devm_request_irq(dev, irq, riic_irqs[i].isr, 0, riic_irqs[i].name, riic); - if (ret) { - dev_err(dev, "failed to request irq %s\n", riic_irqs[i].name); - return ret; - } + if (ret) + return dev_err_probe(dev, ret, "failed to request irq %s\n", + riic_irqs[i].name); } riic->info = of_device_get_match_data(dev); From 279c83db24552e83caa09347358473e633e56617 Mon Sep 17 00:00:00 2001 From: Lad Prabhakar Date: Mon, 13 Jan 2025 12:26:36 +0000 Subject: [PATCH 42/52] i2c: riic: Use local `dev` pointer in `dev_err_probe()` Update the `riic_init_hw()` function to use the local `dev` pointer in calls to `dev_err_probe()`. Previously, `riic_init_hw()` used `riic->adapter.dev` in error reporting. Since this function is invoked during the probe phase, the I2C adapter is not yet initialized, leading to `(null) ...` being printed in error messages. This patch fixes the issue by consistently using the local `dev` pointer, which points to `riic->adapter.dev.parent`. Signed-off-by: Lad Prabhakar Reviewed-by: Geert Uytterhoeven Reviewed-by: Wolfram Sang Tested-by: Wolfram Sang Tested-by: Claudiu Beznea Reviewed-by: Claudiu Beznea Reviewed-by: Andy Shevchenko Signed-off-by: Wolfram Sang --- drivers/i2c/busses/i2c-riic.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/i2c/busses/i2c-riic.c b/drivers/i2c/busses/i2c-riic.c index 4e2add343c9e4..c555b6220e661 100644 --- a/drivers/i2c/busses/i2c-riic.c +++ b/drivers/i2c/busses/i2c-riic.c @@ -320,7 +320,7 @@ static int riic_init_hw(struct riic_dev *riic) : I2C_MAX_FAST_MODE_FREQ; if (t->bus_freq_hz > max_freq) - return dev_err_probe(&riic->adapter.dev, -EINVAL, + return dev_err_probe(dev, -EINVAL, "unsupported bus speed %uHz (%u max)\n", t->bus_freq_hz, max_freq); From 0094d6b70d6b4eb5084e3b7dd99ebfc94d3ca58d Mon Sep 17 00:00:00 2001 From: Lad Prabhakar Date: Mon, 13 Jan 2025 12:26:37 +0000 Subject: [PATCH 43/52] i2c: riic: Use BIT macro consistently Easier to read and ensures proper types. Signed-off-by: Lad Prabhakar Reviewed-by: Geert Uytterhoeven Reviewed-by: Wolfram Sang Tested-by: Wolfram Sang Tested-by: Claudiu Beznea Reviewed-by: Claudiu Beznea Reviewed-by: Andy Shevchenko Signed-off-by: Wolfram Sang --- drivers/i2c/busses/i2c-riic.c | 37 ++++++++++++++++++----------------- 1 file changed, 19 insertions(+), 18 deletions(-) diff --git a/drivers/i2c/busses/i2c-riic.c b/drivers/i2c/busses/i2c-riic.c index c555b6220e661..370cb83bf5ac2 100644 --- a/drivers/i2c/busses/i2c-riic.c +++ b/drivers/i2c/busses/i2c-riic.c @@ -34,6 +34,7 @@ * Also check the comments in the interrupt routines for some gory details. */ +#include #include #include #include @@ -46,32 +47,32 @@ #include #include -#define ICCR1_ICE 0x80 -#define ICCR1_IICRST 0x40 -#define ICCR1_SOWP 0x10 +#define ICCR1_ICE BIT(7) +#define ICCR1_IICRST BIT(6) +#define ICCR1_SOWP BIT(4) -#define ICCR2_BBSY 0x80 -#define ICCR2_SP 0x08 -#define ICCR2_RS 0x04 -#define ICCR2_ST 0x02 +#define ICCR2_BBSY BIT(7) +#define ICCR2_SP BIT(3) +#define ICCR2_RS BIT(2) +#define ICCR2_ST BIT(1) #define ICMR1_CKS_MASK 0x70 -#define ICMR1_BCWP 0x08 +#define ICMR1_BCWP BIT(3) #define ICMR1_CKS(_x) ((((_x) << 4) & ICMR1_CKS_MASK) | ICMR1_BCWP) -#define ICMR3_RDRFS 0x20 -#define ICMR3_ACKWP 0x10 -#define ICMR3_ACKBT 0x08 +#define ICMR3_RDRFS BIT(5) +#define ICMR3_ACKWP BIT(4) +#define ICMR3_ACKBT BIT(3) -#define ICFER_FMPE 0x80 +#define ICFER_FMPE BIT(7) -#define ICIER_TIE 0x80 -#define ICIER_TEIE 0x40 -#define ICIER_RIE 0x20 -#define ICIER_NAKIE 0x10 -#define ICIER_SPIE 0x08 +#define ICIER_TIE BIT(7) +#define ICIER_TEIE BIT(6) +#define ICIER_RIE BIT(5) +#define ICIER_NAKIE BIT(4) +#define ICIER_SPIE BIT(3) -#define ICSR2_NACKF 0x10 +#define ICSR2_NACKF BIT(4) #define ICBR_RESERVED 0xe0 /* Should be 1 on writes */ From 72252162258c8a0b19d5bd0bb49fe20495898d6d Mon Sep 17 00:00:00 2001 From: Lad Prabhakar Date: Mon, 13 Jan 2025 12:26:38 +0000 Subject: [PATCH 44/52] i2c: riic: Use GENMASK() macro for bitmask definitions Replace raw bitmask values with the `GENMASK()` macro in the `i2c-riic` driver to improve readability and maintain consistency. Signed-off-by: Lad Prabhakar Reviewed-by: Geert Uytterhoeven Reviewed-by: Wolfram Sang Tested-by: Wolfram Sang Tested-by: Claudiu Beznea Reviewed-by: Claudiu Beznea Reviewed-by: Andy Shevchenko Signed-off-by: Wolfram Sang --- drivers/i2c/busses/i2c-riic.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/i2c/busses/i2c-riic.c b/drivers/i2c/busses/i2c-riic.c index 370cb83bf5ac2..cf0b45f9e3d54 100644 --- a/drivers/i2c/busses/i2c-riic.c +++ b/drivers/i2c/busses/i2c-riic.c @@ -56,7 +56,7 @@ #define ICCR2_RS BIT(2) #define ICCR2_ST BIT(1) -#define ICMR1_CKS_MASK 0x70 +#define ICMR1_CKS_MASK GENMASK(6, 4) #define ICMR1_BCWP BIT(3) #define ICMR1_CKS(_x) ((((_x) << 4) & ICMR1_CKS_MASK) | ICMR1_BCWP) @@ -74,7 +74,7 @@ #define ICSR2_NACKF BIT(4) -#define ICBR_RESERVED 0xe0 /* Should be 1 on writes */ +#define ICBR_RESERVED GENMASK(7, 5) /* Should be 1 on writes */ #define RIIC_INIT_MSG -1 From 3d9e63c3aba479ec2f669cbc410754a2b1cf38fb Mon Sep 17 00:00:00 2001 From: Lad Prabhakar Date: Mon, 13 Jan 2025 12:26:39 +0000 Subject: [PATCH 45/52] i2c: riic: Make use of devres helper to request deasserted reset line Simplify the `riic_i2c_probe()` function by using the `devm_reset_control_get_optional_exclusive_deasserted()` API to request a deasserted reset line. This eliminates the need to manually deassert the reset control and the additional cleanup. Signed-off-by: Lad Prabhakar Reviewed-by: Geert Uytterhoeven Tested-by: Wolfram Sang Tested-by: Claudiu Beznea Reviewed-by: Claudiu Beznea Reviewed-by: Wolfram Sang Reviewed-by: Andy Shevchenko Signed-off-by: Wolfram Sang --- drivers/i2c/busses/i2c-riic.c | 17 ++--------------- 1 file changed, 2 insertions(+), 15 deletions(-) diff --git a/drivers/i2c/busses/i2c-riic.c b/drivers/i2c/busses/i2c-riic.c index cf0b45f9e3d54..577be1fb941e4 100644 --- a/drivers/i2c/busses/i2c-riic.c +++ b/drivers/i2c/busses/i2c-riic.c @@ -423,11 +423,6 @@ static struct riic_irq_desc riic_irqs[] = { { .res_num = 5, .isr = riic_tend_isr, .name = "riic-nack" }, }; -static void riic_reset_control_assert(void *data) -{ - reset_control_assert(data); -} - static int riic_i2c_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; @@ -448,18 +443,10 @@ static int riic_i2c_probe(struct platform_device *pdev) return dev_err_probe(dev, PTR_ERR(riic->clk), "missing controller clock"); - riic->rstc = devm_reset_control_get_optional_exclusive(dev, NULL); + riic->rstc = devm_reset_control_get_optional_exclusive_deasserted(dev, NULL); if (IS_ERR(riic->rstc)) return dev_err_probe(dev, PTR_ERR(riic->rstc), - "Error: missing reset ctrl\n"); - - ret = reset_control_deassert(riic->rstc); - if (ret) - return ret; - - ret = devm_add_action_or_reset(dev, riic_reset_control_assert, riic->rstc); - if (ret) - return ret; + "failed to acquire deasserted reset\n"); for (i = 0; i < ARRAY_SIZE(riic_irqs); i++) { int irq; From 9ae0e7f77cfb638c3cd4198ad1ce7a3bce9a5c2a Mon Sep 17 00:00:00 2001 From: Lad Prabhakar Date: Mon, 13 Jan 2025 12:26:40 +0000 Subject: [PATCH 46/52] i2c: riic: Mark riic_irqs array as const The riic_irqs array describes the supported IRQs by the RIIC driver and does not change at runtime. Signed-off-by: Lad Prabhakar Reviewed-by: Geert Uytterhoeven Tested-by: Wolfram Sang Tested-by: Claudiu Beznea Reviewed-by: Claudiu Beznea Reviewed-by: Wolfram Sang Reviewed-by: Andy Shevchenko Signed-off-by: Wolfram Sang --- drivers/i2c/busses/i2c-riic.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/i2c/busses/i2c-riic.c b/drivers/i2c/busses/i2c-riic.c index 577be1fb941e4..d1768b38b12dc 100644 --- a/drivers/i2c/busses/i2c-riic.c +++ b/drivers/i2c/busses/i2c-riic.c @@ -415,7 +415,7 @@ static int riic_init_hw(struct riic_dev *riic) return 0; } -static struct riic_irq_desc riic_irqs[] = { +static const struct riic_irq_desc riic_irqs[] = { { .res_num = 0, .isr = riic_tend_isr, .name = "riic-tend" }, { .res_num = 1, .isr = riic_rdrf_isr, .name = "riic-rdrf" }, { .res_num = 2, .isr = riic_tdre_isr, .name = "riic-tdre" }, From 385bb1c2678b59db201831255b524a6d7f7a25ff Mon Sep 17 00:00:00 2001 From: Lad Prabhakar Date: Mon, 13 Jan 2025 12:26:41 +0000 Subject: [PATCH 47/52] i2c: riic: Use predefined macro and simplify clock tick calculation Replace the hardcoded `1000000000` with the predefined `NSEC_PER_SEC` macro for clarity. Simplify the code by introducing a `ns_per_tick` variable to store `NSEC_PER_SEC / rate`, reducing redundancy and improving readability. Signed-off-by: Lad Prabhakar Reviewed-by: Geert Uytterhoeven Tested-by: Wolfram Sang Reviewed-by: Wolfram Sang Reviewed-by: Andy Shevchenko Signed-off-by: Wolfram Sang --- drivers/i2c/busses/i2c-riic.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/drivers/i2c/busses/i2c-riic.c b/drivers/i2c/busses/i2c-riic.c index d1768b38b12dc..aa3e4f430b113 100644 --- a/drivers/i2c/busses/i2c-riic.c +++ b/drivers/i2c/busses/i2c-riic.c @@ -46,6 +46,7 @@ #include #include #include +#include #define ICCR1_ICE BIT(7) #define ICCR1_IICRST BIT(6) @@ -313,6 +314,7 @@ static int riic_init_hw(struct riic_dev *riic) { int ret; unsigned long rate; + unsigned long ns_per_tick; int total_ticks, cks, brl, brh; struct i2c_timings *t = &riic->i2c_t; struct device *dev = riic->adapter.dev.parent; @@ -376,8 +378,9 @@ static int riic_init_hw(struct riic_dev *riic) * Remove clock ticks for rise and fall times. Convert ns to clock * ticks. */ - brl -= t->scl_fall_ns / (1000000000 / rate); - brh -= t->scl_rise_ns / (1000000000 / rate); + ns_per_tick = NSEC_PER_SEC / rate; + brl -= t->scl_fall_ns / ns_per_tick; + brh -= t->scl_rise_ns / ns_per_tick; /* Adjust for min register values for when SCLE=1 and NFE=1 */ if (brl < 1) @@ -387,8 +390,7 @@ static int riic_init_hw(struct riic_dev *riic) pr_debug("i2c-riic: freq=%lu, duty=%d, fall=%lu, rise=%lu, cks=%d, brl=%d, brh=%d\n", rate / total_ticks, ((brl + 3) * 100) / (brl + brh + 6), - t->scl_fall_ns / (1000000000 / rate), - t->scl_rise_ns / (1000000000 / rate), cks, brl, brh); + t->scl_fall_ns / ns_per_tick, t->scl_rise_ns / ns_per_tick, cks, brl, brh); ret = pm_runtime_resume_and_get(dev); if (ret) From b31addf2a08bc5c16dfd6eae8785546f3eea92b8 Mon Sep 17 00:00:00 2001 From: Lad Prabhakar Date: Mon, 13 Jan 2025 12:26:42 +0000 Subject: [PATCH 48/52] i2c: riic: Add `riic_bus_barrier()` to check bus availability Introduce a new `riic_bus_barrier()` function to verify bus availability before initiating an I2C transfer. This function enhances the bus arbitration check by ensuring that the SDA and SCL lines are not held low, in addition to checking the BBSY flag using `readb_poll_timeout()`. Previously, only the BBSY flag was checked to determine bus availability. However, it is possible for the SDA line to remain low even when BBSY = 0. This new implementation performs an additional check on the SDA and SCL lines to avoid potential bus contention issues. Signed-off-by: Lad Prabhakar Reviewed-by: Geert Uytterhoeven Reviewed-by: Wolfram Sang Tested-by: Wolfram Sang Tested-by: Claudiu Beznea Reviewed-by: Claudiu Beznea Reviewed-by: Andy Shevchenko Signed-off-by: Wolfram Sang --- drivers/i2c/busses/i2c-riic.c | 30 ++++++++++++++++++++++++++---- 1 file changed, 26 insertions(+), 4 deletions(-) diff --git a/drivers/i2c/busses/i2c-riic.c b/drivers/i2c/busses/i2c-riic.c index aa3e4f430b113..d7dddd6c296a2 100644 --- a/drivers/i2c/busses/i2c-riic.c +++ b/drivers/i2c/busses/i2c-riic.c @@ -41,6 +41,7 @@ #include #include #include +#include #include #include #include @@ -51,6 +52,8 @@ #define ICCR1_ICE BIT(7) #define ICCR1_IICRST BIT(6) #define ICCR1_SOWP BIT(4) +#define ICCR1_SCLI BIT(1) +#define ICCR1_SDAI BIT(0) #define ICCR2_BBSY BIT(7) #define ICCR2_SP BIT(3) @@ -136,6 +139,27 @@ static inline void riic_clear_set_bit(struct riic_dev *riic, u8 clear, u8 set, u riic_writeb(riic, (riic_readb(riic, reg) & ~clear) | set, reg); } +static int riic_bus_barrier(struct riic_dev *riic) +{ + int ret; + u8 val; + + /* + * The SDA line can still be low even when BBSY = 0. Therefore, after checking + * the BBSY flag, also verify that the SDA and SCL lines are not being held low. + */ + ret = readb_poll_timeout(riic->base + riic->info->regs[RIIC_ICCR2], val, + !(val & ICCR2_BBSY), 10, riic->adapter.timeout); + if (ret) + return ret; + + if ((riic_readb(riic, RIIC_ICCR1) & (ICCR1_SDAI | ICCR1_SCLI)) != + (ICCR1_SDAI | ICCR1_SCLI)) + return -EBUSY; + + return 0; +} + static int riic_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num) { struct riic_dev *riic = i2c_get_adapdata(adap); @@ -148,13 +172,11 @@ static int riic_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num) if (ret) return ret; - if (riic_readb(riic, RIIC_ICCR2) & ICCR2_BBSY) { - riic->err = -EBUSY; + riic->err = riic_bus_barrier(riic); + if (riic->err) goto out; - } reinit_completion(&riic->msg_done); - riic->err = 0; riic_writeb(riic, 0, RIIC_ICSR2); From bfd74cd1fbc026f04446e67d6915c7e199c2bffd Mon Sep 17 00:00:00 2001 From: Randolph Ha Date: Mon, 13 Jan 2025 14:52:37 -0500 Subject: [PATCH 49/52] i2c: Force ELAN06FA touchpad I2C bus freq to 100KHz When a 400KHz freq is used on this model of ELAN touchpad in Linux, excessive smoothing (similar to when the touchpad's firmware detects a noisy signal) is sometimes applied. As some devices' (e.g, Lenovo V15 G4) ACPI tables specify a 400KHz frequency for this device and some I2C busses (e.g, Designware I2C) default to a 400KHz freq, force the speed to 100KHz as a workaround. For future investigation: This problem may be related to the default HCNT/LCNT values given by some busses' drivers, because they are not specified in the aforementioned devices' ACPI tables, and because the device works without issues on Windows at what is expected to be a 400KHz frequency. The root cause of the issue is not known. Signed-off-by: Randolph Ha Reviewed-by: Mika Westerberg Signed-off-by: Wolfram Sang --- drivers/i2c/i2c-core-acpi.c | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/drivers/i2c/i2c-core-acpi.c b/drivers/i2c/i2c-core-acpi.c index 14ae0cfc325ef..d2499f302b508 100644 --- a/drivers/i2c/i2c-core-acpi.c +++ b/drivers/i2c/i2c-core-acpi.c @@ -355,6 +355,25 @@ static const struct acpi_device_id i2c_acpi_force_400khz_device_ids[] = { {} }; +static const struct acpi_device_id i2c_acpi_force_100khz_device_ids[] = { + /* + * When a 400KHz freq is used on this model of ELAN touchpad in Linux, + * excessive smoothing (similar to when the touchpad's firmware detects + * a noisy signal) is sometimes applied. As some devices' (e.g, Lenovo + * V15 G4) ACPI tables specify a 400KHz frequency for this device and + * some I2C busses (e.g, Designware I2C) default to a 400KHz freq, + * force the speed to 100KHz as a workaround. + * + * For future investigation: This problem may be related to the default + * HCNT/LCNT values given by some busses' drivers, because they are not + * specified in the aforementioned devices' ACPI tables, and because + * the device works without issues on Windows at what is expected to be + * a 400KHz frequency. The root cause of the issue is not known. + */ + { "ELAN06FA", 0 }, + {} +}; + static acpi_status i2c_acpi_lookup_speed(acpi_handle handle, u32 level, void *data, void **return_value) { @@ -373,6 +392,9 @@ static acpi_status i2c_acpi_lookup_speed(acpi_handle handle, u32 level, if (acpi_match_device_ids(adev, i2c_acpi_force_400khz_device_ids) == 0) lookup->force_speed = I2C_MAX_FAST_MODE_FREQ; + if (acpi_match_device_ids(adev, i2c_acpi_force_100khz_device_ids) == 0) + lookup->force_speed = I2C_MAX_STANDARD_MODE_FREQ; + return AE_OK; } From d06905d686107c8343ff71aa4f3c881cc0a9a7b9 Mon Sep 17 00:00:00 2001 From: Wolfram Sang Date: Thu, 9 Jan 2025 13:21:10 +0100 Subject: [PATCH 50/52] i2c: add core-managed per-client directory in debugfs More and more I2C client drivers use debugfs entries and currently they need to manage a subdir for their files on their own. This means inconsistent naming for these subdirs and they are scattered all over the debugfs-tree as well. Not to mention the duplicated code. Let the I2C core provide and maintain a proper directory per client. Note: It was considered to save the additional pointer in 'struct i2c_client' and only provide a subdir when requested via a helper function. When sketching this approach, more and more corner cases appeared, though, so the current solution with its simple and unabiguous code was chosen. Signed-off-by: Wolfram Sang Reviewed-by: Guenter Roeck --- drivers/i2c/i2c-core-base.c | 4 ++++ include/linux/i2c.h | 1 + 2 files changed, 5 insertions(+) diff --git a/drivers/i2c/i2c-core-base.c b/drivers/i2c/i2c-core-base.c index b072030a9105a..00f171ebc01f1 100644 --- a/drivers/i2c/i2c-core-base.c +++ b/drivers/i2c/i2c-core-base.c @@ -1015,6 +1015,8 @@ i2c_new_client_device(struct i2c_adapter *adap, struct i2c_board_info const *inf if (status) goto out_remove_swnode; + client->debugfs = debugfs_create_dir(dev_name(&client->dev), adap->debugfs); + dev_dbg(&adap->dev, "client [%s] registered with bus id %s\n", client->name, dev_name(&client->dev)); @@ -1058,6 +1060,8 @@ void i2c_unregister_device(struct i2c_client *client) if (ACPI_COMPANION(&client->dev)) acpi_device_clear_enumerated(ACPI_COMPANION(&client->dev)); + + debugfs_remove_recursive(client->debugfs); device_remove_software_node(&client->dev); device_unregister(&client->dev); } diff --git a/include/linux/i2c.h b/include/linux/i2c.h index 66fb3d6cf686c..36de788dc7fe6 100644 --- a/include/linux/i2c.h +++ b/include/linux/i2c.h @@ -347,6 +347,7 @@ struct i2c_client { i2c_slave_cb_t slave_cb; /* callback for slave mode */ #endif void *devres_group_id; /* ID of probe devres group */ + struct dentry *debugfs; /* per-client debugfs dir */ }; #define to_i2c_client(d) container_of(d, struct i2c_client, dev) From f0a4e9fa656ceb3b2e4c296cf6226798d804fa22 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= Date: Mon, 30 Dec 2024 16:59:49 +0100 Subject: [PATCH 51/52] i2c: designware: Actually make use of the I2C_DW_COMMON and I2C_DW symbol namespaces MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit DEFAULT_SYMBOL_NAMESPACE must already be defined when is included. So move the define above the include block. Fixes: fd57a3325a77 ("i2c: designware: Move exports to I2C_DW namespaces") Signed-off-by: Uwe Kleine-König Acked-by: Jarkko Nikula Acked-by: Andy Shevchenko Signed-off-by: Wolfram Sang --- drivers/i2c/busses/i2c-designware-common.c | 5 +++-- drivers/i2c/busses/i2c-designware-master.c | 5 +++-- drivers/i2c/busses/i2c-designware-slave.c | 5 +++-- 3 files changed, 9 insertions(+), 6 deletions(-) diff --git a/drivers/i2c/busses/i2c-designware-common.c b/drivers/i2c/busses/i2c-designware-common.c index 183a35038eef9..8eb7bd640f8d3 100644 --- a/drivers/i2c/busses/i2c-designware-common.c +++ b/drivers/i2c/busses/i2c-designware-common.c @@ -8,6 +8,9 @@ * Copyright (C) 2007 MontaVista Software Inc. * Copyright (C) 2009 Provigent Ltd. */ + +#define DEFAULT_SYMBOL_NAMESPACE "I2C_DW_COMMON" + #include #include #include @@ -29,8 +32,6 @@ #include #include -#define DEFAULT_SYMBOL_NAMESPACE "I2C_DW_COMMON" - #include "i2c-designware-core.h" static const char *const abort_sources[] = { diff --git a/drivers/i2c/busses/i2c-designware-master.c b/drivers/i2c/busses/i2c-designware-master.c index c8cbe5b1aeb19..2569bf1a72e0e 100644 --- a/drivers/i2c/busses/i2c-designware-master.c +++ b/drivers/i2c/busses/i2c-designware-master.c @@ -8,6 +8,9 @@ * Copyright (C) 2007 MontaVista Software Inc. * Copyright (C) 2009 Provigent Ltd. */ + +#define DEFAULT_SYMBOL_NAMESPACE "I2C_DW" + #include #include #include @@ -22,8 +25,6 @@ #include #include -#define DEFAULT_SYMBOL_NAMESPACE "I2C_DW" - #include "i2c-designware-core.h" #define AMD_TIMEOUT_MIN_US 25 diff --git a/drivers/i2c/busses/i2c-designware-slave.c b/drivers/i2c/busses/i2c-designware-slave.c index dc2b788eac5bd..5cd4a5f7a472e 100644 --- a/drivers/i2c/busses/i2c-designware-slave.c +++ b/drivers/i2c/busses/i2c-designware-slave.c @@ -6,6 +6,9 @@ * * Copyright (C) 2016 Synopsys Inc. */ + +#define DEFAULT_SYMBOL_NAMESPACE "I2C_DW" + #include #include #include @@ -16,8 +19,6 @@ #include #include -#define DEFAULT_SYMBOL_NAMESPACE "I2C_DW" - #include "i2c-designware-core.h" static void i2c_dw_configure_fifo_slave(struct dw_i2c_dev *dev) From 27c3f0e61f19d2306527406cad233d5f5915ca1e Mon Sep 17 00:00:00 2001 From: Wolfram Sang Date: Wed, 15 Jan 2025 08:39:18 +0100 Subject: [PATCH 52/52] i2c: add kdoc for the new debugfs entry of clients When adding the new debugfs entry, its kdoc equivalent was forgotten. Add it now. Fixes: d06905d68610 ("i2c: add core-managed per-client directory in debugfs") Reported-by: Stephen Rothwell Closes: https://lore.kernel.org/r/20250115163146.6c48f066@canb.auug.org.au Signed-off-by: Wolfram Sang --- include/linux/i2c.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/linux/i2c.h b/include/linux/i2c.h index 36de788dc7fe6..c31fd1dba3bd2 100644 --- a/include/linux/i2c.h +++ b/include/linux/i2c.h @@ -317,6 +317,8 @@ struct i2c_driver { * calls it to pass on slave events to the slave driver. * @devres_group_id: id of the devres group that will be created for resources * acquired when probing this device. + * @debugfs: pointer to the debugfs subdirectory which the I2C core created + * for this client. * * An i2c_client identifies a single device (i.e. chip) connected to an * i2c bus. The behaviour exposed to Linux is defined by the driver