From 3b42fbd5951171bce5ecd22ad72d6a16fefaa704 Mon Sep 17 00:00:00 2001 From: Rasmus Villemoes Date: Tue, 20 Jun 2023 13:38:52 +0200 Subject: [PATCH 1/3] net: dsa: microchip: simplify ksz_prmw8() Implement ksz_prmw8() in terms of ksz_rmw8(), just as all the other ksz_pX are implemented in terms of ksz_X. No functional change. Signed-off-by: Rasmus Villemoes Reviewed-by: Simon Horman Acked-by: Arun Ramadoss Link: https://lore.kernel.org/r/20230620113855.733526-2-linux@rasmusvillemoes.dk Signed-off-by: Jakub Kicinski --- drivers/net/dsa/microchip/ksz_common.h | 13 ++----------- 1 file changed, 2 insertions(+), 11 deletions(-) diff --git a/drivers/net/dsa/microchip/ksz_common.h b/drivers/net/dsa/microchip/ksz_common.h index a66b56857ec6a..2453c43c48a54 100644 --- a/drivers/net/dsa/microchip/ksz_common.h +++ b/drivers/net/dsa/microchip/ksz_common.h @@ -578,17 +578,8 @@ static inline int ksz_pwrite32(struct ksz_device *dev, int port, int offset, static inline int ksz_prmw8(struct ksz_device *dev, int port, int offset, u8 mask, u8 val) { - int ret; - - ret = regmap_update_bits(ksz_regmap_8(dev), - dev->dev_ops->get_port_addr(port, offset), - mask, val); - if (ret) - dev_err(dev->dev, "can't rmw 8bit reg 0x%x: %pe\n", - dev->dev_ops->get_port_addr(port, offset), - ERR_PTR(ret)); - - return ret; + return ksz_rmw8(dev, dev->dev_ops->get_port_addr(port, offset), + mask, val); } static inline void ksz_regmap_lock(void *__mtx) From ece28ecbec9f63e3f722d7c9a99fb965cbeafc1b Mon Sep 17 00:00:00 2001 From: Rasmus Villemoes Date: Tue, 20 Jun 2023 13:38:53 +0200 Subject: [PATCH 2/3] net: dsa: microchip: add ksz_prmw32() helper This will be used in a subsequent patch fixing an errata for writes to certain PHY registers. Signed-off-by: Rasmus Villemoes Reviewed-by: Simon Horman Acked-by: Arun Ramadoss Link: https://lore.kernel.org/r/20230620113855.733526-3-linux@rasmusvillemoes.dk Signed-off-by: Jakub Kicinski --- drivers/net/dsa/microchip/ksz_common.h | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/net/dsa/microchip/ksz_common.h b/drivers/net/dsa/microchip/ksz_common.h index 2453c43c48a54..28444e5924f95 100644 --- a/drivers/net/dsa/microchip/ksz_common.h +++ b/drivers/net/dsa/microchip/ksz_common.h @@ -582,6 +582,13 @@ static inline int ksz_prmw8(struct ksz_device *dev, int port, int offset, mask, val); } +static inline int ksz_prmw32(struct ksz_device *dev, int port, int offset, + u32 mask, u32 val) +{ + return ksz_rmw32(dev, dev->dev_ops->get_port_addr(port, offset), + mask, val); +} + static inline void ksz_regmap_lock(void *__mtx) { struct mutex *mtx = __mtx; From 5c844d57aa7894154e49cf2fc648bfe2f1aefc1c Mon Sep 17 00:00:00 2001 From: Rasmus Villemoes Date: Tue, 20 Jun 2023 13:38:54 +0200 Subject: [PATCH 3/3] net: dsa: microchip: fix writes to phy registers >= 0x10 According to the errata sheets for ksz9477 and ksz9567, writes to the PHY registers 0x10-0x1f (i.e. those located at addresses 0xN120 to 0xN13f) must be done as a 32 bit write to the 4-byte aligned address containing the register, hence requires a RMW in order not to change the adjacent PHY register. Signed-off-by: Rasmus Villemoes Reviewed-by: Simon Horman Reviewed-by: Andrew Lunn Link: https://lore.kernel.org/r/20230620113855.733526-4-linux@rasmusvillemoes.dk Signed-off-by: Jakub Kicinski --- drivers/net/dsa/microchip/ksz9477.c | 18 +++++++++++++++++- 1 file changed, 17 insertions(+), 1 deletion(-) diff --git a/drivers/net/dsa/microchip/ksz9477.c b/drivers/net/dsa/microchip/ksz9477.c index fc5157a10af5a..83b7f2d5c1ea6 100644 --- a/drivers/net/dsa/microchip/ksz9477.c +++ b/drivers/net/dsa/microchip/ksz9477.c @@ -329,11 +329,27 @@ int ksz9477_r_phy(struct ksz_device *dev, u16 addr, u16 reg, u16 *data) int ksz9477_w_phy(struct ksz_device *dev, u16 addr, u16 reg, u16 val) { + u32 mask, val32; + /* No real PHY after this. */ if (!dev->info->internal_phy[addr]) return 0; - return ksz_pwrite16(dev, addr, 0x100 + (reg << 1), val); + if (reg < 0x10) + return ksz_pwrite16(dev, addr, 0x100 + (reg << 1), val); + + /* Errata: When using SPI, I2C, or in-band register access, + * writes to certain PHY registers should be performed as + * 32-bit writes instead of 16-bit writes. + */ + val32 = val; + mask = 0xffff; + if ((reg & 1) == 0) { + val32 <<= 16; + mask <<= 16; + } + reg &= ~1; + return ksz_prmw32(dev, addr, 0x100 + (reg << 1), mask, val32); } void ksz9477_cfg_port_member(struct ksz_device *dev, int port, u8 member)