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Merge tag 'cris-for-linus-3.7' of git://jni.nu/cris
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Pull CRIS changes from Jesper Nilsson:
 "Removal of some unused code from the CRIS port"

* tag 'cris-for-linus-3.7' of git://jni.nu/cris:
  CRIS: Remove VCS simulator specific code
  cris/PCI: remove pcibios_assign_resources()
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Linus Torvalds committed Oct 3, 2012
2 parents a06cb1a + d75d806 commit b463036
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Showing 16 changed files with 3 additions and 461 deletions.
5 changes: 0 additions & 5 deletions arch/cris/Kconfig
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Original file line number Diff line number Diff line change
Expand Up @@ -138,11 +138,6 @@ config CRIS_MACH_ARTPEC3

endchoice

config ETRAX_VCS_SIM
bool "VCS Simulator"
help
Setup hardware to be run in the VCS simulator.

config ETRAX_ARCH_V10
bool
default y if ETRAX100LX || ETRAX100LX_V2
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29 changes: 0 additions & 29 deletions arch/cris/arch-v32/drivers/axisflashmap.c
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Original file line number Diff line number Diff line change
Expand Up @@ -329,7 +329,6 @@ static int __init init_axis_flash(void)
}
#endif

#ifndef CONFIG_ETRAX_VCS_SIM
main_mtd = flash_probe();
if (main_mtd)
printk(KERN_INFO "%s: 0x%08x bytes of NOR flash memory.\n",
Expand Down Expand Up @@ -603,34 +602,7 @@ static int __init init_axis_flash(void)
"partition %d\n", part);
}
}
#endif /* CONFIG_EXTRAX_VCS_SIM */

#ifdef CONFIG_ETRAX_VCS_SIM
/* For simulator, always use a RAM partition.
* The rootfs will be found after the kernel in RAM,
* with romfs_start and romfs_end indicating location and size.
*/
struct mtd_info *mtd_ram;

mtd_ram = kmalloc(sizeof(struct mtd_info), GFP_KERNEL);
if (!mtd_ram) {
panic("axisflashmap: Couldn't allocate memory for "
"mtd_info!\n");
}

printk(KERN_INFO "axisflashmap: Adding RAM partition for romfs, "
"at %u, size %u\n",
(unsigned) romfs_start, (unsigned) romfs_length);

err = mtdram_init_device(mtd_ram, (void *)romfs_start,
romfs_length, "romfs");
if (err) {
panic("axisflashmap: Could not initialize MTD RAM "
"device!\n");
}
#endif /* CONFIG_EXTRAX_VCS_SIM */

#ifndef CONFIG_ETRAX_VCS_SIM
if (aux_mtd) {
aux_partition.size = aux_mtd->size;
err = mtd_device_register(aux_mtd, &aux_partition, 1);
Expand All @@ -639,7 +611,6 @@ static int __init init_axis_flash(void)
"aux mtd device!\n");

}
#endif /* CONFIG_EXTRAX_VCS_SIM */

return err;
}
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25 changes: 0 additions & 25 deletions arch/cris/arch-v32/drivers/pci/bios.c
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Original file line number Diff line number Diff line change
Expand Up @@ -97,28 +97,3 @@ int pcibios_enable_device(struct pci_dev *dev, int mask)
pcibios_enable_irq(dev);
return 0;
}

int pcibios_assign_resources(void)
{
struct pci_dev *dev = NULL;
int idx;
struct resource *r;

while ((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
int class = dev->class >> 8;

/* Don't touch classless devices and host bridges */
if (!class || class == PCI_CLASS_BRIDGE_HOST)
continue;

for(idx=0; idx<6; idx++) {
r = &dev->resource[idx];

if (!r->start && r->end)
pci_assign_resource(dev, idx);
}
}
return 0;
}

EXPORT_SYMBOL(pcibios_assign_resources);
58 changes: 2 additions & 56 deletions arch/cris/arch-v32/kernel/head.S
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Original file line number Diff line number Diff line change
Expand Up @@ -36,13 +36,6 @@
.global nand_boot
.global swapper_pg_dir

;; Dummy section to make it bootable with current VCS simulator
#ifdef CONFIG_ETRAX_VCS_SIM
.section ".boot", "ax"
ba tstart
nop
#endif

.text
tstart:
;; This is the entry point of the kernel. The CPU is currently in
Expand Down Expand Up @@ -75,17 +68,10 @@ secondary_cpu_entry: /* Entry point for secondary CPUs */
| REG_FIELD(mmu, rw_mm_kbase_hi, base_c, 4) \
| REG_FIELD(mmu, rw_mm_kbase_hi, base_d, 5) \
| REG_FIELD(mmu, rw_mm_kbase_hi, base_b, 0xb), $r0
#elif !defined(CONFIG_ETRAX_VCS_SIM)
move.d REG_FIELD(mmu, rw_mm_kbase_hi, base_e, 8) \
| REG_FIELD(mmu, rw_mm_kbase_hi, base_c, 4) \
| REG_FIELD(mmu, rw_mm_kbase_hi, base_b, 0xb), $r0
#else
;; Map the virtual DRAM to the RW eprom area at address 0.
;; Also map 0xa for the hook calls,
move.d REG_FIELD(mmu, rw_mm_kbase_hi, base_e, 8) \
| REG_FIELD(mmu, rw_mm_kbase_hi, base_c, 4) \
| REG_FIELD(mmu, rw_mm_kbase_hi, base_b, 0xb) \
| REG_FIELD(mmu, rw_mm_kbase_hi, base_a, 0xa), $r0
| REG_FIELD(mmu, rw_mm_kbase_hi, base_b, 0xb), $r0
#endif

;; Temporary map of 0x40 -> 0x40 and 0x00 -> 0x00.
Expand Down Expand Up @@ -126,27 +112,6 @@ secondary_cpu_entry: /* Entry point for secondary CPUs */
| REG_STATE(mmu, rw_mm_cfg, seg_2, page) \
| REG_STATE(mmu, rw_mm_cfg, seg_1, page) \
| REG_STATE(mmu, rw_mm_cfg, seg_0, linear), $r2
#elif !defined(CONFIG_ETRAX_VCS_SIM)
move.d REG_STATE(mmu, rw_mm_cfg, we, on) \
| REG_STATE(mmu, rw_mm_cfg, acc, on) \
| REG_STATE(mmu, rw_mm_cfg, ex, on) \
| REG_STATE(mmu, rw_mm_cfg, inv, on) \
| REG_STATE(mmu, rw_mm_cfg, seg_f, linear) \
| REG_STATE(mmu, rw_mm_cfg, seg_e, linear) \
| REG_STATE(mmu, rw_mm_cfg, seg_d, page) \
| REG_STATE(mmu, rw_mm_cfg, seg_c, linear) \
| REG_STATE(mmu, rw_mm_cfg, seg_b, linear) \
| REG_STATE(mmu, rw_mm_cfg, seg_a, page) \
| REG_STATE(mmu, rw_mm_cfg, seg_9, page) \
| REG_STATE(mmu, rw_mm_cfg, seg_8, page) \
| REG_STATE(mmu, rw_mm_cfg, seg_7, page) \
| REG_STATE(mmu, rw_mm_cfg, seg_6, page) \
| REG_STATE(mmu, rw_mm_cfg, seg_5, page) \
| REG_STATE(mmu, rw_mm_cfg, seg_4, linear) \
| REG_STATE(mmu, rw_mm_cfg, seg_3, page) \
| REG_STATE(mmu, rw_mm_cfg, seg_2, page) \
| REG_STATE(mmu, rw_mm_cfg, seg_1, page) \
| REG_STATE(mmu, rw_mm_cfg, seg_0, linear), $r2
#else
move.d REG_STATE(mmu, rw_mm_cfg, we, on) \
| REG_STATE(mmu, rw_mm_cfg, acc, on) \
Expand All @@ -157,7 +122,7 @@ secondary_cpu_entry: /* Entry point for secondary CPUs */
| REG_STATE(mmu, rw_mm_cfg, seg_d, page) \
| REG_STATE(mmu, rw_mm_cfg, seg_c, linear) \
| REG_STATE(mmu, rw_mm_cfg, seg_b, linear) \
| REG_STATE(mmu, rw_mm_cfg, seg_a, linear) \
| REG_STATE(mmu, rw_mm_cfg, seg_a, page) \
| REG_STATE(mmu, rw_mm_cfg, seg_9, page) \
| REG_STATE(mmu, rw_mm_cfg, seg_8, page) \
| REG_STATE(mmu, rw_mm_cfg, seg_7, page) \
Expand Down Expand Up @@ -226,15 +191,13 @@ master_cpu:
move.d secondary_cpu_entry, $r1
move.d $r1, [$r0]
#endif
#ifndef CONFIG_ETRAX_VCS_SIM
; Check if starting from DRAM (network->RAM boot or unpacked
; compressed kernel), or directly from flash.
lapcq ., $r0
and.d 0x7fffffff, $r0 ; Mask off the non-cache bit.
cmp.d 0x10000, $r0 ; Arbitrary, something above this code.
blo _inflash0
nop
#endif

jump _inram ; Jump to cached RAM.
nop
Expand Down Expand Up @@ -326,7 +289,6 @@ move_cramfs:
move.d romfs_length, $r1
move.d $r0, [$r1]

#ifndef CONFIG_ETRAX_VCS_SIM
;; The kernel could have been unpacked to DRAM by the loader, but
;; the cramfs image could still be in the flash immediately
;; following the compressed kernel image. The loader passes the address
Expand All @@ -335,10 +297,6 @@ move_cramfs:
cmp.d 0x0ffffff8, $r9
bhs _no_romfs_in_flash ; R9 points outside the flash area.
nop
#else
ba _no_romfs_in_flash
nop
#endif
;; cramfs rootfs might to be in flash. Check for it.
move.d [$r9], $r0 ; cramfs_super.magic
cmp.d CRAMFS_MAGIC, $r0
Expand Down Expand Up @@ -396,7 +354,6 @@ _no_romfs_in_flash:
move.d romfs_length, $r3
move.d $r2, [$r3] ; store size at romfs_length

#ifndef CONFIG_ETRAX_VCS_SIM
add.d $r2, $r0 ; copy from end and downwards
add.d $r2, $r1

Expand All @@ -410,7 +367,6 @@ _no_romfs_in_flash:
subq 1, $r2
bne 1b
nop
#endif

4:
;; BSS move done.
Expand Down Expand Up @@ -455,23 +411,13 @@ no_command_line:
move.d etrax_irv, $r1 ; Set the exception base register and pointer.
move.d $r0, [$r1]

#ifndef CONFIG_ETRAX_VCS_SIM
;; Clear the BSS region from _bss_start to _end.
move.d __bss_start, $r0
move.d _end, $r1
1: clear.d [$r0+]
cmp.d $r1, $r0
blo 1b
nop
#endif

#ifdef CONFIG_ETRAX_VCS_SIM
/* Set the watchdog timeout to something big. Will be removed when */
/* watchdog can be disabled with command line option */
move.d 0x7fffffff, $r10
jsr CPU_WATCHDOG_TIMEOUT
nop
#endif

; Initialize registers to increase determinism
move.d __bss_start, $r0
Expand Down
14 changes: 0 additions & 14 deletions arch/cris/arch-v32/kernel/kgdb.c
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Original file line number Diff line number Diff line change
Expand Up @@ -381,23 +381,9 @@ static int read_register(char regno, unsigned int *valptr);
/* Serial port, reads one character. ETRAX 100 specific. from debugport.c */
int getDebugChar(void);

#ifdef CONFIG_ETRAX_VCS_SIM
int getDebugChar(void)
{
return socketread();
}
#endif

/* Serial port, writes one character. ETRAX 100 specific. from debugport.c */
void putDebugChar(int val);

#ifdef CONFIG_ETRAX_VCS_SIM
void putDebugChar(int val)
{
socketwrite((char *)&val, 1);
}
#endif

/* Returns the integer equivalent of a hexadecimal character. */
static int hex(char ch);

Expand Down
2 changes: 0 additions & 2 deletions arch/cris/arch-v32/mach-a3/Makefile
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@@ -1,10 +1,8 @@
# $Id: Makefile,v 1.3 2007/03/13 11:57:46 starvik Exp $
#
# Makefile for the linux kernel.
#

obj-y := dma.o pinmux.o io.o arbiter.o
obj-$(CONFIG_ETRAX_VCS_SIM) += vcs_hook.o
obj-$(CONFIG_CPU_FREQ) += cpufreq.o

clean:
Expand Down
103 changes: 0 additions & 103 deletions arch/cris/arch-v32/mach-a3/vcs_hook.c
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