From b57b4b4d4ef9c2ecb169775815bebab0890cda50 Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Fri, 5 Feb 2021 15:45:31 +0200 Subject: [PATCH] thermal: ti-soc-thermal: Skip pointless register access for dra7 On dra7, there is no Start of Conversion (SOC) register bit and we have an empty bgap_soc_mask in the configuration for the thermal driver. Let's not do pointless reads and writes with the empty mask. There's also no point waiting for End of Conversion bit (EOCZ) to go high on dra7. We only care about it going down, and are now mostly timing out waiting for EOCZ high while it has already gone down. When we add checking for the timeout errors in a later patch, waiting for EOCZ high would cause bogus time out errors. Cc: Adam Ford Cc: Carl Philipp Klemm Cc: Eduardo Valentin Cc: H. Nikolaus Schaller Cc: Merlijn Wajer Cc: Pavel Machek Cc: Peter Ujfalusi Cc: Sebastian Reichel Signed-off-by: Tony Lindgren Tested-by: Adam Ford #logicpd-torpedo-37xx-devkit Acked-by: Pavel Machek Signed-off-by: Daniel Lezcano Link: https://lore.kernel.org/r/20210205134534.49200-2-tony@atomide.com --- drivers/thermal/ti-soc-thermal/ti-bandgap.c | 29 +++++++++++---------- 1 file changed, 15 insertions(+), 14 deletions(-) diff --git a/drivers/thermal/ti-soc-thermal/ti-bandgap.c b/drivers/thermal/ti-soc-thermal/ti-bandgap.c index dcac99f327b08..8266181cbd10b 100644 --- a/drivers/thermal/ti-soc-thermal/ti-bandgap.c +++ b/drivers/thermal/ti-soc-thermal/ti-bandgap.c @@ -602,29 +602,30 @@ void *ti_bandgap_get_sensor_data(struct ti_bandgap *bgp, int id) static int ti_bandgap_force_single_read(struct ti_bandgap *bgp, int id) { - u32 counter = 1000; - struct temp_sensor_registers *tsr; + struct temp_sensor_registers *tsr = bgp->conf->sensors[id].registers; + u32 counter; /* Select single conversion mode */ if (TI_BANDGAP_HAS(bgp, MODE_CONFIG)) RMW_BITS(bgp, id, bgap_mode_ctrl, mode_ctrl_mask, 0); - /* Start of Conversion = 1 */ - RMW_BITS(bgp, id, temp_sensor_ctrl, bgap_soc_mask, 1); + /* Set Start of Conversion if available */ + if (tsr->bgap_soc_mask) { + RMW_BITS(bgp, id, temp_sensor_ctrl, bgap_soc_mask, 1); - /* Wait for EOCZ going up */ - tsr = bgp->conf->sensors[id].registers; + /* Wait for EOCZ going up */ + counter = 1000; + while (--counter) { + if (ti_bandgap_readl(bgp, tsr->temp_sensor_ctrl) & + tsr->bgap_eocz_mask) + break; + } - while (--counter) { - if (ti_bandgap_readl(bgp, tsr->temp_sensor_ctrl) & - tsr->bgap_eocz_mask) - break; + /* Clear Start of Conversion if available */ + RMW_BITS(bgp, id, temp_sensor_ctrl, bgap_soc_mask, 0); } - /* Start of Conversion = 0 */ - RMW_BITS(bgp, id, temp_sensor_ctrl, bgap_soc_mask, 0); - - /* Wait for EOCZ going down */ + /* Wait for EOCZ going down, always needed even if no bgap_soc_mask */ counter = 1000; while (--counter) { if (!(ti_bandgap_readl(bgp, tsr->temp_sensor_ctrl) &