From 434242cd6080dde0103d3b4f28daec5c742c465e Mon Sep 17 00:00:00 2001 From: Caesar Wang Date: Mon, 14 Mar 2016 16:01:52 +0800 Subject: [PATCH 1/9] net: arc_emac: make the rockchip emac document more compatible Add the rk3036 SoCs to match driver for document since the emac driver has supported the rk3036 SoCs. This patch adds the rk3036/rk3066/rk3188 SoCS to compatible for rockchip emac ducument. Also, that will suit for other SoCs in the future. Signed-off-by: Caesar Wang Cc: Rob Herring Cc: devicetree@vger.kernel.org Cc: netdev@vger.kernel.org Cc: "David S. Miller" Cc: Alexander Kochetkov Signed-off-by: David S. Miller --- Documentation/devicetree/bindings/net/emac_rockchip.txt | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/net/emac_rockchip.txt b/Documentation/devicetree/bindings/net/emac_rockchip.txt index 8dc1c79fef7fc..05bd7dafce171 100644 --- a/Documentation/devicetree/bindings/net/emac_rockchip.txt +++ b/Documentation/devicetree/bindings/net/emac_rockchip.txt @@ -1,8 +1,10 @@ -* ARC EMAC 10/100 Ethernet platform driver for Rockchip Rk3066/RK3188 SoCs +* ARC EMAC 10/100 Ethernet platform driver for Rockchip RK3036/RK3066/RK3188 SoCs Required properties: -- compatible: Should be "rockchip,rk3066-emac" or "rockchip,rk3188-emac" - according to the target SoC. +- compatible: should be "rockchip,-emac" + "rockchip,rk3036-emac": found on RK3036 SoCs + "rockchip,rk3066-emac": found on RK3066 SoCs + "rockchip,rk3188-emac": found on RK3188 SoCs - reg: Address and length of the register set for the device - interrupts: Should contain the EMAC interrupts - rockchip,grf: phandle to the syscon grf used to control speed and mode From 8700eee6271c932b2747a6b157655f546c27e7ad Mon Sep 17 00:00:00 2001 From: Caesar Wang Date: Mon, 14 Mar 2016 16:01:53 +0800 Subject: [PATCH 2/9] net: arc_emac: add phy reset is optional for device tree This patch adds the following property for arc_emac. 1) phy-reset-gpios: The phy-reset-gpio is an optional property for arc emac device tree boot. Change the binding document to match the driver code. 2) phy-reset-duration: Different boards may require different phy reset duration. Add property phy-reset-duration for device tree probe, so that the boards that need a longer reset duration can specify it in their device tree. Anyway, we can add the above property for arc emac. Signed-off-by: Caesar Wang Cc: Rob Herring Cc: devicetree@vger.kernel.org Cc: netdev@vger.kernel.org Cc: "David S. Miller" Cc: Sergei Shtylyov Cc; Alexander Kochetkov Signed-off-by: David S. Miller --- Documentation/devicetree/bindings/net/arc_emac.txt | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/Documentation/devicetree/bindings/net/arc_emac.txt b/Documentation/devicetree/bindings/net/arc_emac.txt index a1d71eb43b209..c73a0e9c625e7 100644 --- a/Documentation/devicetree/bindings/net/arc_emac.txt +++ b/Documentation/devicetree/bindings/net/arc_emac.txt @@ -7,6 +7,13 @@ Required properties: - max-speed: see ethernet.txt file in the same directory. - phy: see ethernet.txt file in the same directory. +Optional properties: +- phy-reset-gpios : Should specify the gpio for phy reset +- phy-reset-duration : Reset duration in milliseconds. Should present + only if property "phy-reset-gpios" is available. Missing the property + will have the duration be 1 millisecond. Numbers greater than 1000 are + invalid and 1 millisecond will be used instead. + Clock handling: The clock frequency is needed to calculate and set polling period of EMAC. It must be provided by one of: From 1bddd96cba03da0a14b3e5144e98c9a6ff17e983 Mon Sep 17 00:00:00 2001 From: Caesar Wang Date: Mon, 14 Mar 2016 16:01:54 +0800 Subject: [PATCH 3/9] net: arc_emac: support the phy reset for emac driver This patch adds to support the emac phy reset. Different boards may require different phy reset duration. Add property phy-reset-duration for emac driver, so that the boards that need a longer reset duration can specify it in their device tree. Signed-off-by: Heiko Stuebner Signed-off-by: Caesar Wang Cc: "David S. Miller" Cc: netdev@vger.kernel.org Cc: Alexander Kochetkov Cc: Sergei Shtylyov Signed-off-by: David S. Miller --- drivers/net/ethernet/arc/emac.h | 6 +++++ drivers/net/ethernet/arc/emac_mdio.c | 37 ++++++++++++++++++++++++++++ 2 files changed, 43 insertions(+) diff --git a/drivers/net/ethernet/arc/emac.h b/drivers/net/ethernet/arc/emac.h index dae1ac300a49e..1a4040397a4bc 100644 --- a/drivers/net/ethernet/arc/emac.h +++ b/drivers/net/ethernet/arc/emac.h @@ -102,6 +102,11 @@ struct buffer_state { DEFINE_DMA_UNMAP_LEN(len); }; +struct arc_emac_mdio_bus_data { + struct gpio_desc *reset_gpio; + int msec; +}; + /** * struct arc_emac_priv - Storage of EMAC's private information. * @dev: Pointer to the current device. @@ -131,6 +136,7 @@ struct arc_emac_priv { struct device *dev; struct phy_device *phy_dev; struct mii_bus *bus; + struct arc_emac_mdio_bus_data bus_data; void __iomem *regs; struct clk *clk; diff --git a/drivers/net/ethernet/arc/emac_mdio.c b/drivers/net/ethernet/arc/emac_mdio.c index d5ee986936dad..caf704264eba9 100644 --- a/drivers/net/ethernet/arc/emac_mdio.c +++ b/drivers/net/ethernet/arc/emac_mdio.c @@ -7,6 +7,7 @@ #include #include #include +#include #include "emac.h" @@ -98,6 +99,25 @@ static int arc_mdio_write(struct mii_bus *bus, int phy_addr, return arc_mdio_complete_wait(priv); } +/** + * arc_mdio_reset + * @bus: points to the mii_bus structure + * Description: reset the MII bus + */ +int arc_mdio_reset(struct mii_bus *bus) +{ + struct arc_emac_priv *priv = bus->priv; + struct arc_emac_mdio_bus_data *data = &priv->bus_data; + + if (data->reset_gpio) { + gpiod_set_value_cansleep(data->reset_gpio, 1); + msleep(data->msec); + gpiod_set_value_cansleep(data->reset_gpio, 0); + } + + return 0; +} + /** * arc_mdio_probe - MDIO probe function. * @priv: Pointer to ARC EMAC private data structure. @@ -109,6 +129,8 @@ static int arc_mdio_write(struct mii_bus *bus, int phy_addr, */ int arc_mdio_probe(struct arc_emac_priv *priv) { + struct arc_emac_mdio_bus_data *data = &priv->bus_data; + struct device_node *np = priv->dev->of_node; struct mii_bus *bus; int error; @@ -122,6 +144,21 @@ int arc_mdio_probe(struct arc_emac_priv *priv) bus->name = "Synopsys MII Bus", bus->read = &arc_mdio_read; bus->write = &arc_mdio_write; + bus->reset = &arc_mdio_reset; + + /* optional reset-related properties */ + data->reset_gpio = devm_gpiod_get_optional(priv->dev, "phy-reset", + GPIOD_OUT_LOW); + if (IS_ERR(data->reset_gpio)) { + error = PTR_ERR(data->reset_gpio); + dev_err(priv->dev, "Failed to request gpio: %d\n", error); + return error; + } + + of_property_read_u32(np, "phy-reset-duration", &data->msec); + /* A sane reset duration should not be longer than 1s */ + if (data->msec > 1000) + data->msec = 1; snprintf(bus->id, MII_BUS_ID_SIZE, "%s", bus->name); From 663713eb477b9b916426124d6f5d5c5e9db919cf Mon Sep 17 00:00:00 2001 From: Caesar Wang Date: Mon, 14 Mar 2016 16:01:55 +0800 Subject: [PATCH 4/9] net: arc: trivial: cleanup the emac driver This patch will make the driver more readability The emac has the error and warnings if you run 'scripts/checkpatch.pl -f --subjective xxx' to check. Let's clean up such trivial details. Signed-off-by: Caesar Wang Cc: Jiri Kosina Cc: "David S. Miller" Cc: Alexander Kochetkov Cc: netdev@vger.kernel.org Signed-off-by: David S. Miller --- drivers/net/ethernet/arc/emac.h | 54 ++++++++++++------------ drivers/net/ethernet/arc/emac_main.c | 35 ++++++++------- drivers/net/ethernet/arc/emac_mdio.c | 2 +- drivers/net/ethernet/arc/emac_rockchip.c | 41 ++++++++++++------ 4 files changed, 75 insertions(+), 57 deletions(-) diff --git a/drivers/net/ethernet/arc/emac.h b/drivers/net/ethernet/arc/emac.h index 1a4040397a4bc..ca562bc034c39 100644 --- a/drivers/net/ethernet/arc/emac.h +++ b/drivers/net/ethernet/arc/emac.h @@ -14,36 +14,36 @@ #include /* STATUS and ENABLE Register bit masks */ -#define TXINT_MASK (1<<0) /* Transmit interrupt */ -#define RXINT_MASK (1<<1) /* Receive interrupt */ -#define ERR_MASK (1<<2) /* Error interrupt */ -#define TXCH_MASK (1<<3) /* Transmit chaining error interrupt */ -#define MSER_MASK (1<<4) /* Missed packet counter error */ -#define RXCR_MASK (1<<8) /* RXCRCERR counter rolled over */ -#define RXFR_MASK (1<<9) /* RXFRAMEERR counter rolled over */ -#define RXFL_MASK (1<<10) /* RXOFLOWERR counter rolled over */ -#define MDIO_MASK (1<<12) /* MDIO complete interrupt */ -#define TXPL_MASK (1<<31) /* Force polling of BD by EMAC */ +#define TXINT_MASK (1 << 0) /* Transmit interrupt */ +#define RXINT_MASK (1 << 1) /* Receive interrupt */ +#define ERR_MASK (1 << 2) /* Error interrupt */ +#define TXCH_MASK (1 << 3) /* Transmit chaining error interrupt */ +#define MSER_MASK (1 << 4) /* Missed packet counter error */ +#define RXCR_MASK (1 << 8) /* RXCRCERR counter rolled over */ +#define RXFR_MASK (1 << 9) /* RXFRAMEERR counter rolled over */ +#define RXFL_MASK (1 << 10) /* RXOFLOWERR counter rolled over */ +#define MDIO_MASK (1 << 12) /* MDIO complete interrupt */ +#define TXPL_MASK (1 << 31) /* Force polling of BD by EMAC */ /* CONTROL Register bit masks */ -#define EN_MASK (1<<0) /* VMAC enable */ -#define TXRN_MASK (1<<3) /* TX enable */ -#define RXRN_MASK (1<<4) /* RX enable */ -#define DSBC_MASK (1<<8) /* Disable receive broadcast */ -#define ENFL_MASK (1<<10) /* Enable Full-duplex */ -#define PROM_MASK (1<<11) /* Promiscuous mode */ +#define EN_MASK (1 << 0) /* VMAC enable */ +#define TXRN_MASK (1 << 3) /* TX enable */ +#define RXRN_MASK (1 << 4) /* RX enable */ +#define DSBC_MASK (1 << 8) /* Disable receive broadcast */ +#define ENFL_MASK (1 << 10) /* Enable Full-duplex */ +#define PROM_MASK (1 << 11) /* Promiscuous mode */ /* Buffer descriptor INFO bit masks */ -#define OWN_MASK (1<<31) /* 0-CPU owns buffer, 1-EMAC owns buffer */ -#define FIRST_MASK (1<<16) /* First buffer in chain */ -#define LAST_MASK (1<<17) /* Last buffer in chain */ +#define OWN_MASK (1 << 31) /* 0-CPU or 1-EMAC owns buffer */ +#define FIRST_MASK (1 << 16) /* First buffer in chain */ +#define LAST_MASK (1 << 17) /* Last buffer in chain */ #define LEN_MASK 0x000007FF /* last 11 bits */ -#define CRLS (1<<21) -#define DEFR (1<<22) -#define DROP (1<<23) -#define RTRY (1<<24) -#define LTCL (1<<28) -#define UFLO (1<<29) +#define CRLS (1 << 21) +#define DEFR (1 << 22) +#define DROP (1 << 23) +#define RTRY (1 << 24) +#define LTCL (1 << 28) +#define UFLO (1 << 29) #define FOR_EMAC OWN_MASK #define FOR_CPU 0 @@ -66,7 +66,7 @@ enum { R_MDIO, }; -#define TX_TIMEOUT (400*HZ/1000) /* Transmission timeout */ +#define TX_TIMEOUT (400 * HZ / 1000) /* Transmission timeout */ #define ARC_EMAC_NAPI_WEIGHT 40 /* Workload for NAPI */ @@ -196,6 +196,7 @@ static inline unsigned int arc_reg_get(struct arc_emac_priv *priv, int reg) static inline void arc_reg_or(struct arc_emac_priv *priv, int reg, int mask) { unsigned int value = arc_reg_get(priv, reg); + arc_reg_set(priv, reg, value | mask); } @@ -211,6 +212,7 @@ static inline void arc_reg_or(struct arc_emac_priv *priv, int reg, int mask) static inline void arc_reg_clr(struct arc_emac_priv *priv, int reg, int mask) { unsigned int value = arc_reg_get(priv, reg); + arc_reg_set(priv, reg, value & ~mask); } diff --git a/drivers/net/ethernet/arc/emac_main.c b/drivers/net/ethernet/arc/emac_main.c index 6446af1403f70..a3a9392a49543 100644 --- a/drivers/net/ethernet/arc/emac_main.c +++ b/drivers/net/ethernet/arc/emac_main.c @@ -26,7 +26,6 @@ #include "emac.h" - /** * arc_emac_tx_avail - Return the number of available slots in the tx ring. * @priv: Pointer to ARC EMAC private data structure. @@ -66,7 +65,7 @@ static void arc_emac_adjust_link(struct net_device *ndev) if (priv->duplex != phy_dev->duplex) { reg = arc_reg_get(priv, R_CTRL); - if (DUPLEX_FULL == phy_dev->duplex) + if (phy_dev->duplex == DUPLEX_FULL) reg |= ENFL_MASK; else reg &= ~ENFL_MASK; @@ -466,9 +465,9 @@ static int arc_emac_open(struct net_device *ndev) /* Set CONTROL */ arc_reg_set(priv, R_CTRL, - (RX_BD_NUM << 24) | /* RX BD table length */ - (TX_BD_NUM << 16) | /* TX BD table length */ - TXRN_MASK | RXRN_MASK); + (RX_BD_NUM << 24) | /* RX BD table length */ + (TX_BD_NUM << 16) | /* TX BD table length */ + TXRN_MASK | RXRN_MASK); napi_enable(&priv->napi); @@ -533,8 +532,10 @@ static void arc_free_tx_queue(struct net_device *ndev) struct buffer_state *tx_buff = &priv->tx_buff[i]; if (tx_buff->skb) { - dma_unmap_single(&ndev->dev, dma_unmap_addr(tx_buff, addr), - dma_unmap_len(tx_buff, len), DMA_TO_DEVICE); + dma_unmap_single(&ndev->dev, + dma_unmap_addr(tx_buff, addr), + dma_unmap_len(tx_buff, len), + DMA_TO_DEVICE); /* return the sk_buff to system */ dev_kfree_skb_irq(tx_buff->skb); @@ -562,8 +563,10 @@ static void arc_free_rx_queue(struct net_device *ndev) struct buffer_state *rx_buff = &priv->rx_buff[i]; if (rx_buff->skb) { - dma_unmap_single(&ndev->dev, dma_unmap_addr(rx_buff, addr), - dma_unmap_len(rx_buff, len), DMA_FROM_DEVICE); + dma_unmap_single(&ndev->dev, + dma_unmap_addr(rx_buff, addr), + dma_unmap_len(rx_buff, len), + DMA_FROM_DEVICE); /* return the sk_buff to system */ dev_kfree_skb_irq(rx_buff->skb); @@ -717,8 +720,8 @@ static void arc_emac_set_address_internal(struct net_device *ndev) struct arc_emac_priv *priv = netdev_priv(ndev); unsigned int addr_low, addr_hi; - addr_low = le32_to_cpu(*(__le32 *) &ndev->dev_addr[0]); - addr_hi = le16_to_cpu(*(__le16 *) &ndev->dev_addr[4]); + addr_low = le32_to_cpu(*(__le32 *)&ndev->dev_addr[0]); + addr_hi = le16_to_cpu(*(__le16 *)&ndev->dev_addr[4]); arc_reg_set(priv, R_ADDRL, addr_low); arc_reg_set(priv, R_ADDRH, addr_hi); @@ -774,7 +777,6 @@ int arc_emac_probe(struct net_device *ndev, int interface) unsigned int id, clock_frequency, irq; int err; - /* Get PHY from device tree */ phy_node = of_parse_phandle(dev->of_node, "phy", 0); if (!phy_node) { @@ -796,7 +798,6 @@ int arc_emac_probe(struct net_device *ndev, int interface) return -ENODEV; } - ndev->netdev_ops = &arc_emac_netdev_ops; ndev->ethtool_ops = &arc_emac_ethtool_ops; ndev->watchdog_timeo = TX_TIMEOUT; @@ -807,9 +808,9 @@ int arc_emac_probe(struct net_device *ndev, int interface) priv->dev = dev; priv->regs = devm_ioremap_resource(dev, &res_regs); - if (IS_ERR(priv->regs)) { + if (IS_ERR(priv->regs)) return PTR_ERR(priv->regs); - } + dev_dbg(dev, "Registers base address is 0x%p\n", priv->regs); if (priv->clk) { @@ -930,10 +931,8 @@ int arc_emac_remove(struct net_device *ndev) unregister_netdev(ndev); netif_napi_del(&priv->napi); - if (!IS_ERR(priv->clk)) { + if (!IS_ERR(priv->clk)) clk_disable_unprepare(priv->clk); - } - return 0; } diff --git a/drivers/net/ethernet/arc/emac_mdio.c b/drivers/net/ethernet/arc/emac_mdio.c index caf704264eba9..16419f550eff0 100644 --- a/drivers/net/ethernet/arc/emac_mdio.c +++ b/drivers/net/ethernet/arc/emac_mdio.c @@ -94,7 +94,7 @@ static int arc_mdio_write(struct mii_bus *bus, int phy_addr, phy_addr, reg_num, value); arc_reg_set(priv, R_MDIO, - 0x50020000 | (phy_addr << 23) | (reg_num << 18) | value); + 0x50020000 | (phy_addr << 23) | (reg_num << 18) | value); return arc_mdio_complete_wait(priv); } diff --git a/drivers/net/ethernet/arc/emac_rockchip.c b/drivers/net/ethernet/arc/emac_rockchip.c index 85e821ccfcd29..e278e3d96ee01 100644 --- a/drivers/net/ethernet/arc/emac_rockchip.c +++ b/drivers/net/ethernet/arc/emac_rockchip.c @@ -50,7 +50,7 @@ static void emac_rockchip_set_mac_speed(void *priv, unsigned int speed) u32 data; int err = 0; - switch(speed) { + switch (speed) { case 10: data = (1 << (speed_offset + 16)) | (0 << speed_offset); break; @@ -83,9 +83,18 @@ static const struct emac_rockchip_soc_data emac_rk3188_emac_data = { }; static const struct of_device_id emac_rockchip_dt_ids[] = { - { .compatible = "rockchip,rk3036-emac", .data = &emac_rk3036_emac_data }, - { .compatible = "rockchip,rk3066-emac", .data = &emac_rk3066_emac_data }, - { .compatible = "rockchip,rk3188-emac", .data = &emac_rk3188_emac_data }, + { + .compatible = "rockchip,rk3036-emac", + .data = &emac_rk3036_emac_data, + }, + { + .compatible = "rockchip,rk3066-emac", + .data = &emac_rk3066_emac_data, + }, + { + .compatible = "rockchip,rk3188-emac", + .data = &emac_rk3188_emac_data, + }, { /* Sentinel */ } }; @@ -123,9 +132,11 @@ static int emac_rockchip_probe(struct platform_device *pdev) goto out_netdev; } - priv->grf = syscon_regmap_lookup_by_phandle(dev->of_node, "rockchip,grf"); + priv->grf = syscon_regmap_lookup_by_phandle(dev->of_node, + "rockchip,grf"); if (IS_ERR(priv->grf)) { - dev_err(dev, "failed to retrieve global register file (%ld)\n", PTR_ERR(priv->grf)); + dev_err(dev, "failed to retrieve global register file (%ld)\n", + PTR_ERR(priv->grf)); err = PTR_ERR(priv->grf); goto out_netdev; } @@ -135,14 +146,16 @@ static int emac_rockchip_probe(struct platform_device *pdev) priv->emac.clk = devm_clk_get(dev, "hclk"); if (IS_ERR(priv->emac.clk)) { - dev_err(dev, "failed to retrieve host clock (%ld)\n", PTR_ERR(priv->emac.clk)); + dev_err(dev, "failed to retrieve host clock (%ld)\n", + PTR_ERR(priv->emac.clk)); err = PTR_ERR(priv->emac.clk); goto out_netdev; } priv->refclk = devm_clk_get(dev, "macref"); if (IS_ERR(priv->refclk)) { - dev_err(dev, "failed to retrieve reference clock (%ld)\n", PTR_ERR(priv->refclk)); + dev_err(dev, "failed to retrieve reference clock (%ld)\n", + PTR_ERR(priv->refclk)); err = PTR_ERR(priv->refclk); goto out_netdev; } @@ -179,19 +192,22 @@ static int emac_rockchip_probe(struct platform_device *pdev) err = regmap_write(priv->grf, priv->soc_data->grf_offset, data); if (err) { - dev_err(dev, "unable to apply initial settings to grf (%d)\n", err); + dev_err(dev, "unable to apply initial settings to grf (%d)\n", + err); goto out_regulator_disable; } /* RMII interface needs always a rate of 50MHz */ err = clk_set_rate(priv->refclk, 50000000); if (err) - dev_err(dev, "failed to change reference clock rate (%d)\n", err); + dev_err(dev, + "failed to change reference clock rate (%d)\n", err); if (priv->soc_data->need_div_macclk) { priv->macclk = devm_clk_get(dev, "macclk"); if (IS_ERR(priv->macclk)) { - dev_err(dev, "failed to retrieve mac clock (%ld)\n", PTR_ERR(priv->macclk)); + dev_err(dev, "failed to retrieve mac clock (%ld)\n", + PTR_ERR(priv->macclk)); err = PTR_ERR(priv->macclk); goto out_regulator_disable; } @@ -205,7 +221,8 @@ static int emac_rockchip_probe(struct platform_device *pdev) /* RMII TX/RX needs always a rate of 25MHz */ err = clk_set_rate(priv->macclk, 25000000); if (err) - dev_err(dev, "failed to change mac clock rate (%d)\n", err); + dev_err(dev, + "failed to change mac clock rate (%d)\n", err); } err = arc_emac_probe(ndev, interface); From fb781c8e2a370d67acf7b8a8826e6f5e3ae1d7c6 Mon Sep 17 00:00:00 2001 From: Xing Zheng Date: Mon, 14 Mar 2016 16:01:56 +0800 Subject: [PATCH 5/9] clk: rockchip: add node-id for rk3036 emac hclk Add the node-id for the emac hclk to the binding header. Signed-off-by: Xing Zheng Signed-off-by: Caesar Wang Cc: Xing Zheng Cc: Michael Turquette Cc: Heiko Stuebner Cc: Stephen Boyd Cc: linux-clk@vger.kernel.org Cc: linux-rockchip@lists.infradead.org Signed-off-by: David S. Miller --- include/dt-bindings/clock/rk3036-cru.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/dt-bindings/clock/rk3036-cru.h b/include/dt-bindings/clock/rk3036-cru.h index ebc7a7b43f524..3396591156956 100644 --- a/include/dt-bindings/clock/rk3036-cru.h +++ b/include/dt-bindings/clock/rk3036-cru.h @@ -92,6 +92,7 @@ #define HCLK_SDMMC 456 #define HCLK_SDIO 457 #define HCLK_EMMC 459 +#define HCLK_MAC 460 #define HCLK_I2S 462 #define HCLK_LCDC 465 #define HCLK_ROM 467 From e764b93924b47cd53b818c1cf8708a35bdfbb83d Mon Sep 17 00:00:00 2001 From: Xing Zheng Date: Mon, 14 Mar 2016 16:01:57 +0800 Subject: [PATCH 6/9] clk: rockchip: associate the rk3036 HCLK_EMAC clock-id Associate the new clock id the clock. Signed-off-by: Xing Zheng Signed-off-by: Caesar Wang Cc: Xing Zheng Cc: Michael Turquette Cc: Heiko Stuebner Cc: Stephen Boyd Cc: linux-clk@vger.kernel.org Cc: linux-rockchip@lists.infradead.org Signed-off-by: David S. Miller --- drivers/clk/rockchip/clk-rk3036.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/clk/rockchip/clk-rk3036.c b/drivers/clk/rockchip/clk-rk3036.c index bc7fbac83ab74..37f42929598dd 100644 --- a/drivers/clk/rockchip/clk-rk3036.c +++ b/drivers/clk/rockchip/clk-rk3036.c @@ -404,7 +404,7 @@ static struct rockchip_clk_branch rk3036_clk_branches[] __initdata = { GATE(HCLK_OTG1, "hclk_otg1", "hclk_peri", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(7), 3, GFLAGS), GATE(HCLK_I2S, "hclk_i2s", "hclk_peri", 0, RK2928_CLKGATE_CON(7), 2, GFLAGS), GATE(0, "hclk_sfc", "hclk_peri", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(3), 14, GFLAGS), - GATE(0, "hclk_mac", "hclk_peri", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(3), 15, GFLAGS), + GATE(HCLK_MAC, "hclk_mac", "hclk_peri", 0, RK2928_CLKGATE_CON(3), 5, GFLAGS), /* pclk_peri gates */ GATE(0, "pclk_peri_matrix", "pclk_peri", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(4), 1, GFLAGS), From f7e180222b973a0b363564b281a314276cb2b594 Mon Sep 17 00:00:00 2001 From: Xing Zheng Date: Mon, 14 Mar 2016 16:01:58 +0800 Subject: [PATCH 7/9] clk: rockchip: add clock-id for rk3036 emac pll source clock Suitable PLLs for the emac on the rk3036 are difficult to find and one of them is the (continuously changing) APLL. So in most cases it will be necessary to select a PLL manually. So add a clock-id for it. Signed-off-by: Xing Zheng Signed-off-by: Caesar Wang Cc: Xing Zheng Cc: Michael Turquette Cc: Heiko Stuebner Cc: Stephen Boyd Cc: linux-clk@vger.kernel.org Cc: linux-rockchip@lists.infradead.org Signed-off-by: David S. Miller --- include/dt-bindings/clock/rk3036-cru.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/dt-bindings/clock/rk3036-cru.h b/include/dt-bindings/clock/rk3036-cru.h index 3396591156956..de44109a3a042 100644 --- a/include/dt-bindings/clock/rk3036-cru.h +++ b/include/dt-bindings/clock/rk3036-cru.h @@ -54,6 +54,7 @@ #define SCLK_PVTM_VIDEO 125 #define SCLK_MAC 151 #define SCLK_MACREF 152 +#define SCLK_MACPLL 153 #define SCLK_SFC 160 /* aclk gates */ From 2c6fae2501d87ca94b5249df38797f02d4e39add Mon Sep 17 00:00:00 2001 From: Heiko Stuebner Date: Mon, 14 Mar 2016 16:01:59 +0800 Subject: [PATCH 8/9] clk: rockchip: associate SCLK_MAC_PLL and disable reparenting on rk3036 The emac needs constant and very specific rate but the possible PLL-sources are very limited, so we expect the PLL source to be set manually on per board and don't want it to get changed in an automatic way later. So add the necessary clock-id and disable reparenting on set_rate calls. Signed-off-by: Heiko Stuebner Cc: Michael Turquette Cc: Heiko Stuebner Cc: Stephen Boyd Cc: linux-clk@vger.kernel.org Signed-off-by: Caesar Wang Signed-off-by: David S. Miller --- drivers/clk/rockchip/clk-rk3036.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/clk/rockchip/clk-rk3036.c b/drivers/clk/rockchip/clk-rk3036.c index 37f42929598dd..53e9c39f5103c 100644 --- a/drivers/clk/rockchip/clk-rk3036.c +++ b/drivers/clk/rockchip/clk-rk3036.c @@ -343,7 +343,7 @@ static struct rockchip_clk_branch rk3036_clk_branches[] __initdata = { RK2928_CLKSEL_CON(16), 0, 2, MFLAGS, 2, 5, DFLAGS, RK2928_CLKGATE_CON(10), 5, GFLAGS), - COMPOSITE_NOGATE(0, "mac_pll_src", mux_pll_src_3plls_p, 0, + COMPOSITE_NOGATE(SCLK_MACPLL, "mac_pll_src", mux_pll_src_3plls_p, CLK_SET_RATE_NO_REPARENT, RK2928_CLKSEL_CON(21), 0, 2, MFLAGS, 9, 5, DFLAGS), MUX(SCLK_MACREF, "mac_clk_ref", mux_mac_p, CLK_SET_RATE_PARENT, RK2928_CLKSEL_CON(21), 3, 1, MFLAGS), From af671e7bd96bc9bde623b0e6f75bfa4269c2c57f Mon Sep 17 00:00:00 2001 From: Xing Zheng Date: Mon, 14 Mar 2016 16:02:00 +0800 Subject: [PATCH 9/9] ARM: dts: rockchip: add to support emac for rk3036 SoCs This patch adds the emac device node for rk3036 SoCs. We need to let mac clock under the DPLL which is able to provide the accurate 50MHz what mac_ref need, since that will cause some unstable things if the cpufreq is working. Signed-off-by: Xing Zheng Signed-off-by: Caesar Wang Cc: linux-rockchip@lists.infradead.org Cc: Xing Zheng Cc: Heiko Stuebner Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: David S. Miller --- arch/arm/boot/dts/rk3036-evb.dts | 14 +++++++++++ arch/arm/boot/dts/rk3036-kylin.dts | 14 +++++++++++ arch/arm/boot/dts/rk3036.dtsi | 39 ++++++++++++++++++++++++++++++ 3 files changed, 67 insertions(+) diff --git a/arch/arm/boot/dts/rk3036-evb.dts b/arch/arm/boot/dts/rk3036-evb.dts index 28a0336660175..b3d6ec87f6152 100644 --- a/arch/arm/boot/dts/rk3036-evb.dts +++ b/arch/arm/boot/dts/rk3036-evb.dts @@ -47,6 +47,20 @@ compatible = "rockchip,rk3036-evb", "rockchip,rk3036"; }; +&emac { + pinctrl-names = "default"; + pinctrl-0 = <&emac_xfer>, <&emac_mdio>; + phy = <&phy0>; + phy-reset-gpios = <&gpio2 22 GPIO_ACTIVE_LOW>; /* PHY_RST */ + phy-reset-duration = <10>; /* millisecond */ + + status = "okay"; + + phy0: ethernet-phy@0 { + reg = <0>; + }; +}; + &i2c1 { status = "okay"; diff --git a/arch/arm/boot/dts/rk3036-kylin.dts b/arch/arm/boot/dts/rk3036-kylin.dts index 992f9cadbc04e..6b4ffc3cd5904 100644 --- a/arch/arm/boot/dts/rk3036-kylin.dts +++ b/arch/arm/boot/dts/rk3036-kylin.dts @@ -60,6 +60,20 @@ status = "okay"; }; +&emac { + pinctrl-names = "default"; + pinctrl-0 = <&emac_xfer>, <&emac_mdio>; + phy = <&phy0>; + phy-reset-gpios = <&gpio2 22 GPIO_ACTIVE_LOW>; /* PHY_RST */ + phy-reset-duration = <10>; /* millisecond */ + + status = "okay"; + + phy0: ethernet-phy@0 { + reg = <0>; + }; +}; + &emmc { status = "okay"; }; diff --git a/arch/arm/boot/dts/rk3036.dtsi b/arch/arm/boot/dts/rk3036.dtsi index b9567c1e06877..609319ce916a3 100644 --- a/arch/arm/boot/dts/rk3036.dtsi +++ b/arch/arm/boot/dts/rk3036.dtsi @@ -186,6 +186,27 @@ status = "disabled"; }; + emac: ethernet@10200000 { + compatible = "rockchip,rk3036-emac", "snps,arc-emac"; + reg = <0x10200000 0x4000>; + interrupts = ; + #address-cells = <1>; + #size-cells = <0>; + rockchip,grf = <&grf>; + clocks = <&cru HCLK_MAC>, <&cru SCLK_MACREF>, <&cru SCLK_MAC>; + clock-names = "hclk", "macref", "macclk"; + /* + * Fix the emac parent clock is DPLL instead of APLL. + * since that will cause some unstable things if the cpufreq + * is working. (e.g: the accurate 50MHz what mac_ref need) + */ + assigned-clocks = <&cru SCLK_MACPLL>; + assigned-clock-parents = <&cru PLL_DPLL>; + max-speed = <100>; + phy-mode = "rmii"; + status = "disabled"; + }; + sdmmc: dwmmc@10214000 { compatible = "rockchip,rk3036-dw-mshc", "rockchip,rk3288-dw-mshc"; reg = <0x10214000 0x4000>; @@ -556,6 +577,24 @@ }; }; + emac { + emac_xfer: emac-xfer { + rockchip,pins = <2 10 RK_FUNC_1 &pcfg_pull_default>, /* crs_dvalid */ + <2 13 RK_FUNC_1 &pcfg_pull_default>, /* tx_en */ + <2 14 RK_FUNC_1 &pcfg_pull_default>, /* mac_clk */ + <2 15 RK_FUNC_1 &pcfg_pull_default>, /* rx_err */ + <2 16 RK_FUNC_1 &pcfg_pull_default>, /* rxd1 */ + <2 17 RK_FUNC_1 &pcfg_pull_default>, /* rxd0 */ + <2 18 RK_FUNC_1 &pcfg_pull_default>, /* txd1 */ + <2 19 RK_FUNC_1 &pcfg_pull_default>; /* txd0 */ + }; + + emac_mdio: emac-mdio { + rockchip,pins = <2 12 RK_FUNC_1 &pcfg_pull_default>, /* mac_md */ + <2 25 RK_FUNC_1 &pcfg_pull_default>; /* mac_mdclk */ + }; + }; + i2c0 { i2c0_xfer: i2c0-xfer { rockchip,pins = <0 0 RK_FUNC_1 &pcfg_pull_none>,