From ae88b85e801ba77939b07eb9214f1d6542fa23f7 Mon Sep 17 00:00:00 2001 From: Soren Brinkmann Date: Tue, 2 Sep 2014 14:19:06 -0700 Subject: [PATCH 01/10] ARM: zynq: PM: Enable A9 internal clock gating feature Signed-off-by: Soren Brinkmann Signed-off-by: Michal Simek --- arch/arm/mach-zynq/common.c | 6 ++++++ arch/arm/mach-zynq/common.h | 11 +++++++++++ arch/arm/mach-zynq/platsmp.c | 13 +++++++++++++ 3 files changed, 30 insertions(+) diff --git a/arch/arm/mach-zynq/common.c b/arch/arm/mach-zynq/common.c index 31a6fa40ba37e..3cb7c198615a7 100644 --- a/arch/arm/mach-zynq/common.c +++ b/arch/arm/mach-zynq/common.c @@ -98,6 +98,11 @@ static int __init zynq_get_revision(void) return revision; } +static void __init zynq_init_late(void) +{ + zynq_core_pm_init(); +} + /** * zynq_init_machine - System specific initialization, intended to be * called from board specific initialization. @@ -204,6 +209,7 @@ DT_MACHINE_START(XILINX_EP107, "Xilinx Zynq Platform") .map_io = zynq_map_io, .init_irq = zynq_irq_init, .init_machine = zynq_init_machine, + .init_late = zynq_init_late, .init_time = zynq_timer_init, .dt_compat = zynq_dt_match, .reserve = zynq_memory_init, diff --git a/arch/arm/mach-zynq/common.h b/arch/arm/mach-zynq/common.h index f652f0a884a67..596ef0b5067cd 100644 --- a/arch/arm/mach-zynq/common.h +++ b/arch/arm/mach-zynq/common.h @@ -40,4 +40,15 @@ extern void __iomem *zynq_scu_base; /* Hotplug */ extern void zynq_platform_cpu_die(unsigned int cpu); +static inline void zynq_core_pm_init(void) +{ + /* A9 clock gating */ + asm volatile ("mrc p15, 0, r12, c15, c0, 0\n" + "orr r12, r12, #1\n" + "mcr p15, 0, r12, c15, c0, 0\n" + : /* no outputs */ + : /* no inputs */ + : "r12"); +} + #endif diff --git a/arch/arm/mach-zynq/platsmp.c b/arch/arm/mach-zynq/platsmp.c index abc82ef085c16..6c7843108c7f5 100644 --- a/arch/arm/mach-zynq/platsmp.c +++ b/arch/arm/mach-zynq/platsmp.c @@ -112,6 +112,18 @@ static void __init zynq_smp_prepare_cpus(unsigned int max_cpus) scu_enable(zynq_scu_base); } +/** + * zynq_secondary_init - Initialize secondary CPU cores + * @cpu: CPU that is initialized + * + * This function is in the hotplug path. Don't move it into the + * init section!! + */ +static void zynq_secondary_init(unsigned int cpu) +{ + zynq_core_pm_init(); +} + #ifdef CONFIG_HOTPLUG_CPU static int zynq_cpu_kill(unsigned cpu) { @@ -124,6 +136,7 @@ struct smp_operations zynq_smp_ops __initdata = { .smp_init_cpus = zynq_smp_init_cpus, .smp_prepare_cpus = zynq_smp_prepare_cpus, .smp_boot_secondary = zynq_boot_secondary, + .smp_secondary_init = zynq_secondary_init, #ifdef CONFIG_HOTPLUG_CPU .cpu_die = zynq_platform_cpu_die, .cpu_kill = zynq_cpu_kill, From c07c8b007732dacafd4ba9cda04ea9b9d0e8ec7d Mon Sep 17 00:00:00 2001 From: Soren Brinkmann Date: Tue, 2 Sep 2014 14:19:07 -0700 Subject: [PATCH 02/10] Documentation: devicetree: Add binding for Synopsys DDR controller Signed-off-by: Soren Brinkmann Signed-off-by: Michal Simek --- .../bindings/memory-controllers/synopsys.txt | 11 +++++++++++ 1 file changed, 11 insertions(+) create mode 100644 Documentation/devicetree/bindings/memory-controllers/synopsys.txt diff --git a/Documentation/devicetree/bindings/memory-controllers/synopsys.txt b/Documentation/devicetree/bindings/memory-controllers/synopsys.txt new file mode 100644 index 0000000000000..f9c6454146b6b --- /dev/null +++ b/Documentation/devicetree/bindings/memory-controllers/synopsys.txt @@ -0,0 +1,11 @@ +Binding for Synopsys IntelliDDR Multi Protocol Memory Controller + +Required properties: + - compatible: Should be 'xlnx,zynq-ddrc-a05' + - reg: Base address and size of the controllers memory area + +Example: + memory-controller@f8006000 { + compatible = "xlnx,zynq-ddrc-a05"; + reg = <0xf8006000 0x1000>; + }; From 36ad5ae6dea7ae6abbb7bdf25078e7d1dabcecad Mon Sep 17 00:00:00 2001 From: Soren Brinkmann Date: Tue, 2 Sep 2014 14:19:08 -0700 Subject: [PATCH 03/10] ARM: zynq: DT: Add DDRC node Add the DDR controller to the Zynq devicetree. Signed-off-by: Soren Brinkmann Acked-by: Daniel Lezcano Signed-off-by: Michal Simek --- arch/arm/boot/dts/zynq-7000.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm/boot/dts/zynq-7000.dtsi b/arch/arm/boot/dts/zynq-7000.dtsi index 6cc83d4c6c761..587cadcf7001a 100644 --- a/arch/arm/boot/dts/zynq-7000.dtsi +++ b/arch/arm/boot/dts/zynq-7000.dtsi @@ -146,6 +146,11 @@ cache-level = <2>; }; + memory-controller@f8006000 { + compatible = "xlnx,zynq-ddrc-a05"; + reg = <0xf8006000 0x1000>; + } ; + uart0: serial@e0000000 { compatible = "xlnx,xuartps", "cdns,uart-r1p8"; status = "disabled"; From 0beb2bd36f6216f455363f47f8ba32fdf26667fb Mon Sep 17 00:00:00 2001 From: Soren Brinkmann Date: Tue, 2 Sep 2014 14:19:09 -0700 Subject: [PATCH 04/10] ARM: zynq: PM: Enable DDR clock stop The DDR controller can detect idle periods and leverage low power features clock stop. When new requests occur, the DDRC resumes normal operation. Signed-off-by: Soren Brinkmann Acked-by: Daniel Lezcano Signed-off-by: Michal Simek --- arch/arm/mach-zynq/Makefile | 2 +- arch/arm/mach-zynq/common.c | 1 + arch/arm/mach-zynq/common.h | 2 + arch/arm/mach-zynq/pm.c | 83 +++++++++++++++++++++++++++++++++++++ 4 files changed, 87 insertions(+), 1 deletion(-) create mode 100644 arch/arm/mach-zynq/pm.c diff --git a/arch/arm/mach-zynq/Makefile b/arch/arm/mach-zynq/Makefile index 1b25d92ebf22c..820dff6e1eba5 100644 --- a/arch/arm/mach-zynq/Makefile +++ b/arch/arm/mach-zynq/Makefile @@ -3,7 +3,7 @@ # # Common support -obj-y := common.o slcr.o +obj-y := common.o slcr.o pm.o CFLAGS_REMOVE_hotplug.o =-march=armv6k CFLAGS_hotplug.o =-Wa,-march=armv7-a -mcpu=cortex-a9 obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o diff --git a/arch/arm/mach-zynq/common.c b/arch/arm/mach-zynq/common.c index 3cb7c198615a7..6bd13e5ce6b78 100644 --- a/arch/arm/mach-zynq/common.c +++ b/arch/arm/mach-zynq/common.c @@ -101,6 +101,7 @@ static int __init zynq_get_revision(void) static void __init zynq_init_late(void) { zynq_core_pm_init(); + zynq_pm_late_init(); } /** diff --git a/arch/arm/mach-zynq/common.h b/arch/arm/mach-zynq/common.h index 596ef0b5067cd..0edbb6997b1cc 100644 --- a/arch/arm/mach-zynq/common.h +++ b/arch/arm/mach-zynq/common.h @@ -40,6 +40,8 @@ extern void __iomem *zynq_scu_base; /* Hotplug */ extern void zynq_platform_cpu_die(unsigned int cpu); +void zynq_pm_late_init(void); + static inline void zynq_core_pm_init(void) { /* A9 clock gating */ diff --git a/arch/arm/mach-zynq/pm.c b/arch/arm/mach-zynq/pm.c new file mode 100644 index 0000000000000..911fcf865be85 --- /dev/null +++ b/arch/arm/mach-zynq/pm.c @@ -0,0 +1,83 @@ +/* + * Zynq power management + * + * Copyright (C) 2012 - 2014 Xilinx + * + * Sören Brinkmann + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + +#include +#include +#include +#include "common.h" + +/* register offsets */ +#define DDRC_CTRL_REG1_OFFS 0x60 +#define DDRC_DRAM_PARAM_REG3_OFFS 0x20 + +/* bitfields */ +#define DDRC_CLOCKSTOP_MASK BIT(23) +#define DDRC_SELFREFRESH_MASK BIT(12) + +static void __iomem *ddrc_base; + +/** + * zynq_pm_ioremap() - Create IO mappings + * @comp: DT compatible string + * Return: Pointer to the mapped memory or NULL. + * + * Remap the memory region for a compatible DT node. + */ +static void __iomem *zynq_pm_ioremap(const char *comp) +{ + struct device_node *np; + void __iomem *base = NULL; + + np = of_find_compatible_node(NULL, NULL, comp); + if (np) { + base = of_iomap(np, 0); + of_node_put(np); + } else { + pr_warn("%s: no compatible node found for '%s'\n", __func__, + comp); + } + + return base; +} + +/** + * zynq_pm_late_init() - Power management init + * + * Initialization of power management related featurs and infrastructure. + */ +void __init zynq_pm_late_init(void) +{ + u32 reg; + + ddrc_base = zynq_pm_ioremap("xlnx,zynq-ddrc-a05"); + if (!ddrc_base) { + pr_warn("%s: Unable to map DDRC IO memory.\n", __func__); + } else { + /* + * Enable DDRC clock stop feature. The HW takes care of + * entering/exiting the correct mode depending + * on activity state. + */ + reg = readl(ddrc_base + DDRC_DRAM_PARAM_REG3_OFFS); + reg |= DDRC_CLOCKSTOP_MASK; + writel(reg, ddrc_base + DDRC_DRAM_PARAM_REG3_OFFS); + } +} From 61ce3ed57b40212a9ae79cebb44861a8c63df54a Mon Sep 17 00:00:00 2001 From: Daniel Lezcano Date: Tue, 2 Sep 2014 14:19:10 -0700 Subject: [PATCH 05/10] ARM: zynq: Remove invalidate cache for cpu die As there is no Power management unit on this board, it is not possible to power down a core, just WFI is allowed. There is no point to invalidate the cache and exit coherency. Signed-off-by: Daniel Lezcano Reviewed-and-tested-by: Soren Brinkmann Signed-off-by: Michal Simek --- arch/arm/mach-zynq/hotplug.c | 32 +------------------------------- 1 file changed, 1 insertion(+), 31 deletions(-) diff --git a/arch/arm/mach-zynq/hotplug.c b/arch/arm/mach-zynq/hotplug.c index 5052c70326e49..366f46c913658 100644 --- a/arch/arm/mach-zynq/hotplug.c +++ b/arch/arm/mach-zynq/hotplug.c @@ -10,35 +10,7 @@ * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ -#include -#include -#include - -#include -#include -#include "common.h" - -static inline void zynq_cpu_enter_lowpower(void) -{ - unsigned int v; - - flush_cache_all(); - asm volatile( - " mcr p15, 0, %1, c7, c5, 0\n" - " dsb\n" - /* - * Turn off coherency - */ - " mrc p15, 0, %0, c1, c0, 1\n" - " bic %0, %0, #0x40\n" - " mcr p15, 0, %0, c1, c0, 1\n" - " mrc p15, 0, %0, c1, c0, 0\n" - " bic %0, %0, %2\n" - " mcr p15, 0, %0, c1, c0, 0\n" - : "=&r" (v) - : "r" (0), "Ir" (CR_C) - : "cc"); -} +#include /* * platform-specific code to shutdown a CPU @@ -47,8 +19,6 @@ static inline void zynq_cpu_enter_lowpower(void) */ void zynq_platform_cpu_die(unsigned int cpu) { - zynq_cpu_enter_lowpower(); - /* * there is no power-control hardware on this platform, so all * we can do is put the core into WFI; this is safe as the calling From 18aebf116b494101841f109f07e0d6a0aad9a46e Mon Sep 17 00:00:00 2001 From: Daniel Lezcano Date: Tue, 2 Sep 2014 14:19:11 -0700 Subject: [PATCH 06/10] ARM: zynq: cpuidle: Remove pointless code The core is not powered down, it is pointless to call the cpu_pm notifiers and switch to the global timer. Signed-off-by: Daniel Lezcano Reviewed-and-tested-by: Soren Brinkmann Signed-off-by: Michal Simek --- drivers/cpuidle/cpuidle-zynq.c | 10 +--------- 1 file changed, 1 insertion(+), 9 deletions(-) diff --git a/drivers/cpuidle/cpuidle-zynq.c b/drivers/cpuidle/cpuidle-zynq.c index aded759280282..c61b8b2a7c77e 100644 --- a/drivers/cpuidle/cpuidle-zynq.c +++ b/drivers/cpuidle/cpuidle-zynq.c @@ -26,7 +26,6 @@ */ #include -#include #include #include #include @@ -38,15 +37,9 @@ static int zynq_enter_idle(struct cpuidle_device *dev, struct cpuidle_driver *drv, int index) { - /* Devices must be stopped here */ - cpu_pm_enter(); - /* Add code for DDR self refresh start */ cpu_do_idle(); - /* Add code for DDR self refresh stop */ - cpu_pm_exit(); - return index; } @@ -59,8 +52,7 @@ static struct cpuidle_driver zynq_idle_driver = { .enter = zynq_enter_idle, .exit_latency = 10, .target_residency = 10000, - .flags = CPUIDLE_FLAG_TIME_VALID | - CPUIDLE_FLAG_TIMER_STOP, + .flags = CPUIDLE_FLAG_TIME_VALID, .name = "RAM_SR", .desc = "WFI and RAM Self Refresh", }, From 50c7960a4517d6c93226351cd8c43c86f104c919 Mon Sep 17 00:00:00 2001 From: Soren Brinkmann Date: Tue, 2 Sep 2014 14:19:12 -0700 Subject: [PATCH 07/10] ARM: zynq: Synchronise zynq_cpu_die/kill Avoid races and add synchronisation between the arch specific kill and die routines. The same synchronisation issue was fixed on IMX platform by this commit: "ARM: imx: fix sync issue between imx_cpu_die and imx_cpu_kill" (sha1: 2f3edfd7e27ad4206acbc2ae99c9df5f46353024) Signed-off-by: Soren Brinkmann Signed-off-by: Michal Simek --- arch/arm/mach-zynq/common.h | 2 ++ arch/arm/mach-zynq/hotplug.c | 2 ++ arch/arm/mach-zynq/platsmp.c | 6 +++++ arch/arm/mach-zynq/slcr.c | 43 +++++++++++++++++++++++++++++++++++- 4 files changed, 52 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-zynq/common.h b/arch/arm/mach-zynq/common.h index 0edbb6997b1cc..24d6340d3fb6d 100644 --- a/arch/arm/mach-zynq/common.h +++ b/arch/arm/mach-zynq/common.h @@ -24,6 +24,8 @@ extern int zynq_early_slcr_init(void); extern void zynq_slcr_system_reset(void); extern void zynq_slcr_cpu_stop(int cpu); extern void zynq_slcr_cpu_start(int cpu); +extern bool zynq_slcr_cpu_state_read(int cpu); +extern void zynq_slcr_cpu_state_write(int cpu, bool die); extern u32 zynq_slcr_get_device_id(void); #ifdef CONFIG_SMP diff --git a/arch/arm/mach-zynq/hotplug.c b/arch/arm/mach-zynq/hotplug.c index 366f46c913658..fe44a05677e21 100644 --- a/arch/arm/mach-zynq/hotplug.c +++ b/arch/arm/mach-zynq/hotplug.c @@ -19,6 +19,8 @@ */ void zynq_platform_cpu_die(unsigned int cpu) { + zynq_slcr_cpu_state_write(cpu, true); + /* * there is no power-control hardware on this platform, so all * we can do is put the core into WFI; this is safe as the calling diff --git a/arch/arm/mach-zynq/platsmp.c b/arch/arm/mach-zynq/platsmp.c index 6c7843108c7f5..06415eeba7e6f 100644 --- a/arch/arm/mach-zynq/platsmp.c +++ b/arch/arm/mach-zynq/platsmp.c @@ -127,6 +127,12 @@ static void zynq_secondary_init(unsigned int cpu) #ifdef CONFIG_HOTPLUG_CPU static int zynq_cpu_kill(unsigned cpu) { + unsigned long timeout = jiffies + msecs_to_jiffies(50); + + while (zynq_slcr_cpu_state_read(cpu)) + if (time_after(jiffies, timeout)) + return 0; + zynq_slcr_cpu_stop(cpu); return 1; } diff --git a/arch/arm/mach-zynq/slcr.c b/arch/arm/mach-zynq/slcr.c index c43a2d16e223b..d4cb50cf97c02 100644 --- a/arch/arm/mach-zynq/slcr.c +++ b/arch/arm/mach-zynq/slcr.c @@ -138,6 +138,8 @@ void zynq_slcr_cpu_start(int cpu) zynq_slcr_write(reg, SLCR_A9_CPU_RST_CTRL_OFFSET); reg &= ~(SLCR_A9_CPU_CLKSTOP << cpu); zynq_slcr_write(reg, SLCR_A9_CPU_RST_CTRL_OFFSET); + + zynq_slcr_cpu_state_write(cpu, false); } /** @@ -154,8 +156,47 @@ void zynq_slcr_cpu_stop(int cpu) } /** - * zynq_slcr_init - Regular slcr driver init + * zynq_slcr_cpu_state - Read/write cpu state + * @cpu: cpu number * + * SLCR_REBOOT_STATUS save upper 2 bits (31/30 cpu states for cpu0 and cpu1) + * 0 means cpu is running, 1 cpu is going to die. + * + * Return: true if cpu is running, false if cpu is going to die + */ +bool zynq_slcr_cpu_state_read(int cpu) +{ + u32 state; + + state = readl(zynq_slcr_base + SLCR_REBOOT_STATUS_OFFSET); + state &= 1 << (31 - cpu); + + return !state; +} + +/** + * zynq_slcr_cpu_state - Read/write cpu state + * @cpu: cpu number + * @die: cpu state - true if cpu is going to die + * + * SLCR_REBOOT_STATUS save upper 2 bits (31/30 cpu states for cpu0 and cpu1) + * 0 means cpu is running, 1 cpu is going to die. + */ +void zynq_slcr_cpu_state_write(int cpu, bool die) +{ + u32 state, mask; + + state = readl(zynq_slcr_base + SLCR_REBOOT_STATUS_OFFSET); + mask = 1 << (31 - cpu); + if (die) + state |= mask; + else + state &= ~mask; + writel(state, zynq_slcr_base + SLCR_REBOOT_STATUS_OFFSET); +} + +/** + * zynq_slcr_init - Regular slcr driver init * Return: 0 on success, negative errno otherwise. * * Called early during boot from platform code to remap SLCR area. From caf86a73eab4132f870e883216850d9eee40b04b Mon Sep 17 00:00:00 2001 From: Soren Brinkmann Date: Tue, 2 Sep 2014 14:19:13 -0700 Subject: [PATCH 08/10] ARM: zynq: Remove hotplug.c The hotplug code contains only a single function, which is an SMP function. Move that to platsmp.c where all other SMP runctions reside. That allows removing hotplug.c and declaring the cpu_die function static. Signed-off-by: Soren Brinkmann Signed-off-by: Michal Simek --- arch/arm/mach-zynq/Makefile | 1 - arch/arm/mach-zynq/common.h | 3 --- arch/arm/mach-zynq/hotplug.c | 17 ----------------- arch/arm/mach-zynq/platsmp.c | 18 ++++++++++++++++++ 4 files changed, 18 insertions(+), 21 deletions(-) diff --git a/arch/arm/mach-zynq/Makefile b/arch/arm/mach-zynq/Makefile index 820dff6e1eba5..c85fb3f7d5cdf 100644 --- a/arch/arm/mach-zynq/Makefile +++ b/arch/arm/mach-zynq/Makefile @@ -6,5 +6,4 @@ obj-y := common.o slcr.o pm.o CFLAGS_REMOVE_hotplug.o =-march=armv6k CFLAGS_hotplug.o =-Wa,-march=armv7-a -mcpu=cortex-a9 -obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o obj-$(CONFIG_SMP) += headsmp.o platsmp.o diff --git a/arch/arm/mach-zynq/common.h b/arch/arm/mach-zynq/common.h index 24d6340d3fb6d..2bc71273c73c6 100644 --- a/arch/arm/mach-zynq/common.h +++ b/arch/arm/mach-zynq/common.h @@ -39,9 +39,6 @@ extern struct smp_operations zynq_smp_ops __initdata; extern void __iomem *zynq_scu_base; -/* Hotplug */ -extern void zynq_platform_cpu_die(unsigned int cpu); - void zynq_pm_late_init(void); static inline void zynq_core_pm_init(void) diff --git a/arch/arm/mach-zynq/hotplug.c b/arch/arm/mach-zynq/hotplug.c index fe44a05677e21..b685c89f11e48 100644 --- a/arch/arm/mach-zynq/hotplug.c +++ b/arch/arm/mach-zynq/hotplug.c @@ -12,20 +12,3 @@ */ #include -/* - * platform-specific code to shutdown a CPU - * - * Called with IRQs disabled - */ -void zynq_platform_cpu_die(unsigned int cpu) -{ - zynq_slcr_cpu_state_write(cpu, true); - - /* - * there is no power-control hardware on this platform, so all - * we can do is put the core into WFI; this is safe as the calling - * code will have already disabled interrupts - */ - for (;;) - cpu_do_idle(); -} diff --git a/arch/arm/mach-zynq/platsmp.c b/arch/arm/mach-zynq/platsmp.c index 06415eeba7e6f..f722b5a83a458 100644 --- a/arch/arm/mach-zynq/platsmp.c +++ b/arch/arm/mach-zynq/platsmp.c @@ -136,6 +136,24 @@ static int zynq_cpu_kill(unsigned cpu) zynq_slcr_cpu_stop(cpu); return 1; } + +/* + * platform-specific code to shutdown a CPU + * + * Called with IRQs disabled + */ +static void zynq_platform_cpu_die(unsigned int cpu) +{ + zynq_slcr_cpu_state_write(cpu, true); + + /* + * there is no power-control hardware on this platform, so all + * we can do is put the core into WFI; this is safe as the calling + * code will have already disabled interrupts + */ + for (;;) + cpu_do_idle(); +} #endif struct smp_operations zynq_smp_ops __initdata = { From ed62e330948dea39b455d94dc14522386291688a Mon Sep 17 00:00:00 2001 From: Soren Brinkmann Date: Tue, 2 Sep 2014 14:19:14 -0700 Subject: [PATCH 09/10] ARM: zynq: Rename 'zynq_platform_cpu_die' Match the naming pattern of all other SMP ops and rename zynq_platform_cpu_die --> zynq_cpu_die. Signed-off-by: Soren Brinkmann Signed-off-by: Michal Simek --- arch/arm/mach-zynq/platsmp.c | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/arch/arm/mach-zynq/platsmp.c b/arch/arm/mach-zynq/platsmp.c index f722b5a83a458..52d768ff78571 100644 --- a/arch/arm/mach-zynq/platsmp.c +++ b/arch/arm/mach-zynq/platsmp.c @@ -137,12 +137,14 @@ static int zynq_cpu_kill(unsigned cpu) return 1; } -/* - * platform-specific code to shutdown a CPU +/** + * zynq_cpu_die - Let a CPU core die + * @cpu: Dying CPU * - * Called with IRQs disabled + * Platform-specific code to shutdown a CPU. + * Called with IRQs disabled on the dying CPU. */ -static void zynq_platform_cpu_die(unsigned int cpu) +static void zynq_cpu_die(unsigned int cpu) { zynq_slcr_cpu_state_write(cpu, true); @@ -162,7 +164,7 @@ struct smp_operations zynq_smp_ops __initdata = { .smp_boot_secondary = zynq_boot_secondary, .smp_secondary_init = zynq_secondary_init, #ifdef CONFIG_HOTPLUG_CPU - .cpu_die = zynq_platform_cpu_die, + .cpu_die = zynq_cpu_die, .cpu_kill = zynq_cpu_kill, #endif }; From 8097171e19bb69f3e2226827440b71ececa5d74f Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Fri, 29 Aug 2014 16:08:58 +0200 Subject: [PATCH 10/10] ARM: zynq: Remove useless L2C AUX setting AUX setting has no effect that's why remove it. Warning log: L2C: platform provided aux values match the hardware, so have no effect. Please remove them. Signed-off-by: Michal Simek --- arch/arm/mach-zynq/common.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-zynq/common.c b/arch/arm/mach-zynq/common.c index 6bd13e5ce6b78..613c476872eb0 100644 --- a/arch/arm/mach-zynq/common.c +++ b/arch/arm/mach-zynq/common.c @@ -204,8 +204,8 @@ static const char * const zynq_dt_match[] = { DT_MACHINE_START(XILINX_EP107, "Xilinx Zynq Platform") /* 64KB way size, 8-way associativity, parity disabled */ - .l2c_aux_val = 0x02000000, - .l2c_aux_mask = 0xf0ffffff, + .l2c_aux_val = 0x00000000, + .l2c_aux_mask = 0xffffffff, .smp = smp_ops(zynq_smp_ops), .map_io = zynq_map_io, .init_irq = zynq_irq_init,