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octeontx2-af: Reset PTP config in FLR handler
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Upon receiving ptp config request from netdev interface , Octeontx2 MAC
block CGX is configured to append timestamp to every incoming packet
and NPC config is updated with DMAC offset change.

Currently this configuration is not reset in FLR handler. This patch
resets the same.

Signed-off-by: Harman Kalra <hkalra@marvell.com>
Signed-off-by: Hariprasad Kelam <hkelam@marvell.com>
Signed-off-by: Sunil Goutham <sgoutham@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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Harman Kalra authored and David S. Miller committed Sep 28, 2021
1 parent 128cfb8 commit e37e08f
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Showing 3 changed files with 18 additions and 0 deletions.
1 change: 1 addition & 0 deletions drivers/net/ethernet/marvell/octeontx2/af/rvu.h
Original file line number Diff line number Diff line change
Expand Up @@ -220,6 +220,7 @@ struct rvu_pfvf {
u16 maxlen;
u16 minlen;

bool hw_rx_tstamp_en; /* Is rx_tstamp enabled */
u8 mac_addr[ETH_ALEN]; /* MAC address of this PF/VF */
u8 default_mac[ETH_ALEN]; /* MAC address from FWdata */

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3 changes: 3 additions & 0 deletions drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
Original file line number Diff line number Diff line change
Expand Up @@ -694,6 +694,7 @@ int rvu_mbox_handler_cgx_promisc_disable(struct rvu *rvu, struct msg_req *req,

static int rvu_cgx_ptp_rx_cfg(struct rvu *rvu, u16 pcifunc, bool enable)
{
struct rvu_pfvf *pfvf = rvu_get_pfvf(rvu, pcifunc);
int pf = rvu_get_pf(pcifunc);
u8 cgx_id, lmac_id;
void *cgxd;
Expand All @@ -718,6 +719,8 @@ static int rvu_cgx_ptp_rx_cfg(struct rvu *rvu, u16 pcifunc, bool enable)
*/
if (npc_config_ts_kpuaction(rvu, pf, pcifunc, enable))
return -EINVAL;
/* This flag is required to clean up CGX conf if app gets killed */
pfvf->hw_rx_tstamp_en = enable;

return 0;
}
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14 changes: 14 additions & 0 deletions drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
Original file line number Diff line number Diff line change
Expand Up @@ -4516,6 +4516,9 @@ void rvu_nix_lf_teardown(struct rvu *rvu, u16 pcifunc, int blkaddr, int nixlf)
{
struct rvu_pfvf *pfvf = rvu_get_pfvf(rvu, pcifunc);
struct hwctx_disable_req ctx_req;
int pf = rvu_get_pf(pcifunc);
u8 cgx_id, lmac_id;
void *cgxd;
int err;

ctx_req.hdr.pcifunc = pcifunc;
Expand Down Expand Up @@ -4556,6 +4559,17 @@ void rvu_nix_lf_teardown(struct rvu *rvu, u16 pcifunc, int blkaddr, int nixlf)
rvu_npc_set_parse_mode(rvu, pcifunc, OTX2_PRIV_FLAGS_DEFAULT,
(PKIND_TX | PKIND_RX), 0, 0, 0, 0);

/* Disabling CGX and NPC config done for PTP */
if (pfvf->hw_rx_tstamp_en) {
rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_id, &lmac_id);
cgxd = rvu_cgx_pdata(cgx_id, rvu);
cgx_lmac_ptp_config(cgxd, lmac_id, false);
/* Undo NPC config done for PTP */
if (npc_config_ts_kpuaction(rvu, pf, pcifunc, false))
dev_err(rvu->dev, "NPC config for PTP failed\n");
pfvf->hw_rx_tstamp_en = false;
}

nix_ctx_free(rvu, pfvf);

nix_free_all_bandprof(rvu, pcifunc);
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