From c5a1e5375d19bd4001c59dc5d482ac5b1ba51cbf Mon Sep 17 00:00:00 2001 From: Nicolas Saenz Julienne Date: Fri, 10 Jan 2020 18:29:35 +0100 Subject: [PATCH 1/2] ARM: dts: bcm283x: Unify CMA configuration With the introduction of the Raspberry Pi 4 we were forced to explicitly configure CMA's location, since arm64 defaults it into the ZONE_DMA32 memory area, which is not good enough to perform DMA operations on that device. To bypass this limitation a dedicated CMA DT node was created, explicitly indicating the acceptable memory range and size. That said, compatibility between boards is a must on the Raspberry Pi ecosystem so this creates a common CMA DT node so as for DT overlays to be able to update CMA's properties regardless of the board being used. Signed-off-by: Nicolas Saenz Julienne Reviewed-by: Phil Elwell Signed-off-by: Florian Fainelli --- arch/arm/boot/dts/bcm2711.dtsi | 33 +++++++++++++-------------------- arch/arm/boot/dts/bcm283x.dtsi | 13 +++++++++++++ 2 files changed, 26 insertions(+), 20 deletions(-) diff --git a/arch/arm/boot/dts/bcm2711.dtsi b/arch/arm/boot/dts/bcm2711.dtsi index ccf917de5e1ae..5ff4ddca61258 100644 --- a/arch/arm/boot/dts/bcm2711.dtsi +++ b/arch/arm/boot/dts/bcm2711.dtsi @@ -12,26 +12,6 @@ interrupt-parent = <&gicv2>; - reserved-memory { - #address-cells = <2>; - #size-cells = <1>; - ranges; - - /* - * arm64 reserves the CMA by default somewhere in ZONE_DMA32, - * that's not good enough for the BCM2711 as some devices can - * only address the lower 1G of memory (ZONE_DMA). - */ - linux,cma { - compatible = "shared-dma-pool"; - size = <0x2000000>; /* 32MB */ - alloc-ranges = <0x0 0x00000000 0x40000000>; - reusable; - linux,cma-default; - }; - }; - - soc { /* * Defined ranges: @@ -826,6 +806,19 @@ }; }; +&rmem { + #address-cells = <2>; +}; + +&cma { + /* + * arm64 reserves the CMA by default somewhere in ZONE_DMA32, + * that's not good enough for the BCM2711 as some devices can + * only address the lower 1G of memory (ZONE_DMA). + */ + alloc-ranges = <0x0 0x00000000 0x40000000>; +}; + &i2c0 { compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c"; interrupts = ; diff --git a/arch/arm/boot/dts/bcm283x.dtsi b/arch/arm/boot/dts/bcm283x.dtsi index 5219339fc27c2..9fb0418595fce 100644 --- a/arch/arm/boot/dts/bcm283x.dtsi +++ b/arch/arm/boot/dts/bcm283x.dtsi @@ -30,6 +30,19 @@ stdout-path = "serial0:115200n8"; }; + rmem: reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + cma: linux,cma { + compatible = "shared-dma-pool"; + size = <0x4000000>; /* 64MB */ + reusable; + linux,cma-default; + }; + }; + thermal-zones { cpu_thermal: cpu-thermal { polling-delay-passive = <0>; From d5c8dc0d4c880fbde5293cc186b1ab23466254c4 Mon Sep 17 00:00:00 2001 From: Nicolas Saenz Julienne Date: Mon, 16 Dec 2019 12:01:08 +0100 Subject: [PATCH 2/2] ARM: dts: bcm2711: Enable PCIe controller This enables bcm2711's PCIe bus, which is hardwired to a VIA Technologies XHCI USB 3.0 controller. Signed-off-by: Nicolas Saenz Julienne Signed-off-by: Florian Fainelli --- arch/arm/boot/dts/bcm2711.dtsi | 31 ++++++++++++++++++++++++++++++- 1 file changed, 30 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/bcm2711.dtsi b/arch/arm/boot/dts/bcm2711.dtsi index 5ff4ddca61258..a10c5a68c7a0b 100644 --- a/arch/arm/boot/dts/bcm2711.dtsi +++ b/arch/arm/boot/dts/bcm2711.dtsi @@ -309,7 +309,36 @@ #address-cells = <2>; #size-cells = <1>; - ranges = <0x0 0x7c000000 0x0 0xfc000000 0x03800000>; + ranges = <0x0 0x7c000000 0x0 0xfc000000 0x03800000>, + <0x6 0x00000000 0x6 0x00000000 0x40000000>; + + pcie0: pcie@7d500000 { + compatible = "brcm,bcm2711-pcie"; + reg = <0x0 0x7d500000 0x9310>; + device_type = "pci"; + #address-cells = <3>; + #interrupt-cells = <1>; + #size-cells = <2>; + interrupts = , + ; + interrupt-names = "pcie", "msi"; + interrupt-map-mask = <0x0 0x0 0x0 0x7>; + interrupt-map = <0 0 0 1 &gicv2 GIC_SPI 143 + IRQ_TYPE_LEVEL_HIGH>; + msi-controller; + msi-parent = <&pcie0>; + + ranges = <0x02000000 0x0 0xf8000000 0x6 0x00000000 + 0x0 0x04000000>; + /* + * The wrapper around the PCIe block has a bug + * preventing it from accessing beyond the first 3GB of + * memory. + */ + dma-ranges = <0x02000000 0x0 0x00000000 0x0 0x00000000 + 0x0 0xc0000000>; + brcm,enable-ssc; + }; genet: ethernet@7d580000 { compatible = "brcm,bcm2711-genet-v5";