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drm/i915/psr: Include some basic PSR information in the state dump
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Currently no one can figure out what the PSR code is doing since
we're including any of it in the basic state dump. Add at least the
bare minimum there.

v2: Also dump has_panel_replay (Jouni)

Cc: Jouni Högander <jouni.hogander@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20231124082735.25470-1-ville.syrjala@linux.intel.com
Reviewed-by: Jouni Högander <jouni.hogander@intel.com>
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Ville Syrjälä committed Nov 29, 2023
1 parent b844c6b commit fcebbe2
Showing 1 changed file with 6 additions and 0 deletions.
6 changes: 6 additions & 0 deletions drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
Original file line number Diff line number Diff line change
Expand Up @@ -264,6 +264,12 @@ void intel_crtc_state_dump(const struct intel_crtc_state *pipe_config,

drm_dbg_kms(&i915->drm, "sdp split: %s\n",
str_enabled_disabled(pipe_config->sdp_split_enable));

drm_dbg_kms(&i915->drm, "psr: %s, psr2: %s, panel replay: %s, selective fetch: %s\n",
str_enabled_disabled(pipe_config->has_psr),
str_enabled_disabled(pipe_config->has_psr2),
str_enabled_disabled(pipe_config->has_panel_replay),
str_enabled_disabled(pipe_config->enable_psr2_sel_fetch));
}

drm_dbg_kms(&i915->drm, "framestart delay: %d, MSA timing delay: %d\n",
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