diff --git a/drivers/net/can/spi/mcp251xfd/mcp251xfd-core.c b/drivers/net/can/spi/mcp251xfd/mcp251xfd-core.c index 3638b474d86b9..3c5b92911d469 100644 --- a/drivers/net/can/spi/mcp251xfd/mcp251xfd-core.c +++ b/drivers/net/can/spi/mcp251xfd/mcp251xfd-core.c @@ -596,11 +596,9 @@ static int mcp251xfd_chip_clock_enable(const struct mcp251xfd_priv *priv) "Timeout waiting for Oscillator Ready (osc=0x%08x, osc_reference=0x%08x)\n", osc, osc_reference); return -ETIMEDOUT; - } else if (err) { - return err; } - return 0; + return err; } static int mcp251xfd_chip_softreset_do(const struct mcp251xfd_priv *priv) @@ -651,7 +649,7 @@ static int mcp251xfd_chip_softreset_check(const struct mcp251xfd_priv *priv) if (osc != osc_reference) { netdev_info(priv->ndev, - "Controller failed to reset. osc=0x%08x, reference value=0x%08x\n", + "Controller failed to reset. osc=0x%08x, reference value=0x%08x.\n", osc, osc_reference); return -ETIMEDOUT; } @@ -666,7 +664,7 @@ static int mcp251xfd_chip_softreset(const struct mcp251xfd_priv *priv) for (i = 0; i < MCP251XFD_SOFTRESET_RETRIES_MAX; i++) { if (i) netdev_info(priv->ndev, - "Retrying to reset Controller.\n"); + "Retrying to reset controller.\n"); err = mcp251xfd_chip_softreset_do(priv); if (err == -ETIMEDOUT) @@ -1239,7 +1237,7 @@ mcp251xfd_handle_tefif_recover(const struct mcp251xfd_priv *priv, const u32 seq) } netdev_info(priv->ndev, - "Transmit Event FIFO buffer %s. (seq=0x%08x, tef_tail=0x%08x, tef_head=0x%08x, tx_head=0x%08x)\n", + "Transmit Event FIFO buffer %s. (seq=0x%08x, tef_tail=0x%08x, tef_head=0x%08x, tx_head=0x%08x).\n", tef_sta & MCP251XFD_REG_TEFSTA_TEFFIF ? "full" : tef_sta & MCP251XFD_REG_TEFSTA_TEFNEIF ? "not empty" : "empty", @@ -1465,7 +1463,7 @@ mcp251xfd_hw_rx_obj_to_skb(const struct mcp251xfd_priv *priv, hw_rx_obj->id); } - dlc = FIELD_GET(MCP251XFD_OBJ_FLAGS_DLC, hw_rx_obj->flags); + dlc = FIELD_GET(MCP251XFD_OBJ_FLAGS_DLC_MASK, hw_rx_obj->flags); /* CANFD */ if (hw_rx_obj->flags & MCP251XFD_OBJ_FLAGS_FDF) { @@ -1891,7 +1889,7 @@ mcp251xfd_handle_modif(const struct mcp251xfd_priv *priv, bool *set_normal_mode) "Controller changed into %s Mode (%u).\n", mcp251xfd_get_mode_str(mode), mode); - /* After the application requests Normal mode, the Controller + /* After the application requests Normal mode, the controller * will automatically attempt to retransmit the message that * caused the TX MAB underflow. * @@ -2359,7 +2357,7 @@ mcp251xfd_tx_obj_from_skb(const struct mcp251xfd_priv *priv, priv->can.ctrlmode); } - flags |= FIELD_PREP(MCP251XFD_OBJ_FLAGS_DLC, dlc); + flags |= FIELD_PREP(MCP251XFD_OBJ_FLAGS_DLC_MASK, dlc); load_buf = &tx_obj->buf; if (priv->devtype_data.quirks & MCP251XFD_QUIRK_CRC_TX) @@ -2851,32 +2849,28 @@ static int mcp251xfd_probe(struct spi_device *spi) rx_int = devm_gpiod_get_optional(&spi->dev, "microchip,rx-int", GPIOD_IN); - if (PTR_ERR(rx_int) == -EPROBE_DEFER) - return -EPROBE_DEFER; - else if (IS_ERR(rx_int)) - return PTR_ERR(rx_int); + if (IS_ERR(rx_int)) + return dev_err_probe(&spi->dev, PTR_ERR(rx_int), + "Failed to get RX-INT!\n"); reg_vdd = devm_regulator_get_optional(&spi->dev, "vdd"); - if (PTR_ERR(reg_vdd) == -EPROBE_DEFER) - return -EPROBE_DEFER; - else if (PTR_ERR(reg_vdd) == -ENODEV) + if (PTR_ERR(reg_vdd) == -ENODEV) reg_vdd = NULL; else if (IS_ERR(reg_vdd)) - return PTR_ERR(reg_vdd); + return dev_err_probe(&spi->dev, PTR_ERR(reg_vdd), + "Failed to get VDD regulator!\n"); reg_xceiver = devm_regulator_get_optional(&spi->dev, "xceiver"); - if (PTR_ERR(reg_xceiver) == -EPROBE_DEFER) - return -EPROBE_DEFER; - else if (PTR_ERR(reg_xceiver) == -ENODEV) + if (PTR_ERR(reg_xceiver) == -ENODEV) reg_xceiver = NULL; else if (IS_ERR(reg_xceiver)) - return PTR_ERR(reg_xceiver); + return dev_err_probe(&spi->dev, PTR_ERR(reg_xceiver), + "Failed to get Transceiver regulator!\n"); clk = devm_clk_get(&spi->dev, NULL); - if (IS_ERR(clk)) { - dev_err(&spi->dev, "No Oscillator (clock) defined.\n"); - return PTR_ERR(clk); - } + if (IS_ERR(clk)) + dev_err_probe(&spi->dev, PTR_ERR(clk), + "Failed to get Oscillator (clock)!\n"); freq = clk_get_rate(clk); /* Sanity check */ @@ -2932,7 +2926,7 @@ static int mcp251xfd_probe(struct spi_device *spi) spi_get_device_id(spi)->driver_data; /* Errata Reference: - * mcp2517fd: DS80000789B, mcp2518fd: DS80000792C 4. + * mcp2517fd: DS80000792C 5., mcp2518fd: DS80000789C 4. * * The SPI can write corrupted data to the RAM at fast SPI * speeds: @@ -2945,18 +2939,16 @@ static int mcp251xfd_probe(struct spi_device *spi) * Ensure that FSCK is less than or equal to 0.85 * * (FSYSCLK/2). * - * Known good and bad combinations are: + * Known good combinations are: * - * MCP ext-clk SoC SPI SPI-clk max-clk parent-clk Status config + * MCP ext-clk SoC SPI SPI-clk max-clk parent-clk config * - * 2518 20 MHz allwinner,sun8i-h3 allwinner,sun8i-h3-spi 8333333 Hz 83.33% 600000000 Hz good assigned-clocks = <&ccu CLK_SPIx> - * 2518 20 MHz allwinner,sun8i-h3 allwinner,sun8i-h3-spi 9375000 Hz 93.75% 600000000 Hz bad assigned-clocks = <&ccu CLK_SPIx> - * 2518 40 MHz allwinner,sun8i-h3 allwinner,sun8i-h3-spi 16666667 Hz 83.33% 600000000 Hz good assigned-clocks = <&ccu CLK_SPIx> - * 2518 40 MHz allwinner,sun8i-h3 allwinner,sun8i-h3-spi 18750000 Hz 93.75% 600000000 Hz bad assigned-clocks = <&ccu CLK_SPIx> - * 2517 20 MHz fsl,imx8mm fsl,imx51-ecspi 8333333 Hz 83.33% 16666667 Hz good assigned-clocks = <&clk IMX8MM_CLK_ECSPIx_ROOT> - * 2517 20 MHz fsl,imx8mm fsl,imx51-ecspi 9523809 Hz 95.34% 28571429 Hz bad assigned-clocks = <&clk IMX8MM_CLK_ECSPIx_ROOT> - * 2517 40 MHz atmel,sama5d27 atmel,at91rm9200-spi 16400000 Hz 82.00% 82000000 Hz good default - * 2518 40 MHz atmel,sama5d27 atmel,at91rm9200-spi 16400000 Hz 82.00% 82000000 Hz good default + * 2518 20 MHz allwinner,sun8i-h3 allwinner,sun8i-h3-spi 8333333 Hz 83.33% 600000000 Hz assigned-clocks = <&ccu CLK_SPIx> + * 2518 40 MHz allwinner,sun8i-h3 allwinner,sun8i-h3-spi 16666667 Hz 83.33% 600000000 Hz assigned-clocks = <&ccu CLK_SPIx> + * 2517 40 MHz atmel,sama5d27 atmel,at91rm9200-spi 16400000 Hz 82.00% 82000000 Hz default + * 2518 40 MHz atmel,sama5d27 atmel,at91rm9200-spi 16400000 Hz 82.00% 82000000 Hz default + * 2518 40 MHz fsl,imx6dl fsl,imx51-ecspi 15000000 Hz 75.00% 30000000 Hz default + * 2517 20 MHz fsl,imx8mm fsl,imx51-ecspi 8333333 Hz 83.33% 16666667 Hz assigned-clocks = <&clk IMX8MM_CLK_ECSPIx_ROOT> * */ priv->spi_max_speed_hz_orig = spi->max_speed_hz; diff --git a/drivers/net/can/spi/mcp251xfd/mcp251xfd.h b/drivers/net/can/spi/mcp251xfd/mcp251xfd.h index cb6398c2a5606..480bd4480bdf5 100644 --- a/drivers/net/can/spi/mcp251xfd/mcp251xfd.h +++ b/drivers/net/can/spi/mcp251xfd/mcp251xfd.h @@ -305,7 +305,7 @@ #define MCP251XFD_OBJ_FLAGS_BRS BIT(6) #define MCP251XFD_OBJ_FLAGS_RTR BIT(5) #define MCP251XFD_OBJ_FLAGS_IDE BIT(4) -#define MCP251XFD_OBJ_FLAGS_DLC GENMASK(3, 0) +#define MCP251XFD_OBJ_FLAGS_DLC_MASK GENMASK(3, 0) #define MCP251XFD_REG_FRAME_EFF_SID_MASK GENMASK(28, 18) #define MCP251XFD_REG_FRAME_EFF_EID_MASK GENMASK(17, 0)