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MIPS: microMIPS: Optimise 'strncpy' core library function.
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Optimise 'strncpy' to use microMIPS instructions and/or optimisations
for binary size reduction. When the microMIPS ISA is not being used,
the library function compiles to the original binary code.

Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
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Steven J. Hill authored and Ralf Baechle committed May 9, 2013
1 parent 26c5e07 commit 0131f2b
Showing 1 changed file with 17 additions and 15 deletions.
32 changes: 17 additions & 15 deletions arch/mips/lib/strncpy_user.S
Original file line number Diff line number Diff line change
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* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Copyright (c) 1996, 1999 by Ralf Baechle
* Copyright (C) 1996, 1999 by Ralf Baechle
* Copyright (C) 2011 MIPS Technologies, Inc.
*/
#include <linux/errno.h>
#include <asm/asm.h>
Expand Down Expand Up @@ -33,26 +34,27 @@ LEAF(__strncpy_from_user_asm)
bnez v0, .Lfault

FEXPORT(__strncpy_from_user_nocheck_asm)
move v0, zero
move v1, a1
.set noreorder
1: EX(lbu, t0, (v1), .Lfault)
move t0, zero
move v1, a1
1: EX(lbu, v0, (v1), .Lfault)
PTR_ADDIU v1, 1
R10KCBARRIER(0(ra))
beqz t0, 2f
sb t0, (a0)
PTR_ADDIU v0, 1
.set reorder
PTR_ADDIU a0, 1
bne v0, a2, 1b
2: PTR_ADDU t0, a1, v0
xor t0, a1
bltz t0, .Lfault
beqz v0, 2f
sb v0, (a0)
PTR_ADDIU t0, 1
bne t0, a2, 1b
PTR_ADDIU a0, 1
2: PTR_ADDU v0, a1, t0
xor v0, a1
bltz v0, .Lfault
nop
jr ra # return n
move v0, t0
END(__strncpy_from_user_asm)

.Lfault: li v0, -EFAULT
jr ra
.Lfault: jr ra
li v0, -EFAULT

.section __ex_table,"a"
PTR 1b, .Lfault
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